diff options
38 files changed, 2940 insertions, 154 deletions
diff --git a/Documentation/devicetree/bindings/mfd/ac100.txt b/Documentation/devicetree/bindings/mfd/ac100.txt new file mode 100644 index 000000000000..b8ef00667599 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ac100.txt @@ -0,0 +1,54 @@ +X-Powers AC100 Codec/RTC IC Device Tree bindings + +AC100 is a audio codec and RTC subsystem combo IC. The 2 parts are +separated, including power supplies and interrupt lines, but share +a common register address space and host interface. + +Required properties: +- compatible: "x-powers,ac100" +- reg: The I2C slave address or RSB hardware address for the chip +- sub-nodes: + - codec + - compatible: "x-powers,ac100-codec" + - interrupt-parent: The parent interrupt controller + - interrupts: SoC NMI / GPIO interrupt connected to the + IRQ_AUDIO pin + - #clock-cells: Shall be 0 + - clock-output-names: "4M_adda" + + - see clock/clock-bindings.txt for common clock bindings + + - rtc + - compatible: "x-powers,ac100-rtc" + - interrupt-parent: The parent interrupt controller + - interrupts: SoC NMI / GPIO interrupt connected to the + IRQ_RTC pin + - clocks: A phandle to the codec's "4M_adda" clock + - #clock-cells: Shall be 1 + - clock-output-names: "cko1_rtc", "cko2_rtc", "cko3_rtc" + + - see clock/clock-bindings.txt for common clock bindings + +Example: + +ac100: codec@e89 { + compatible = "x-powers,ac100"; + reg = <0xe89>; + + ac100_codec: codec { + compatible = "x-powers,ac100-codec"; + interrupt-parent = <&r_pio>; + interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */ + #clock-cells = <0>; + clock-output-names = "4M_adda"; + }; + + ac100_rtc: rtc { + compatible = "x-powers,ac100-rtc"; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + clocks = <&ac100_codec>; + #clock-cells = <1>; + clock-output-names = "cko1_rtc", "cko2_rtc", "cko3_rtc"; + }; +}; diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt index 585a95546288..8f3ad9ab4637 100644 --- a/Documentation/devicetree/bindings/mfd/axp20x.txt +++ b/Documentation/devicetree/bindings/mfd/axp20x.txt @@ -10,7 +10,8 @@ axp809 (X-Powers) Required properties: - compatible: "x-powers,axp152", "x-powers,axp202", "x-powers,axp209", - "x-powers,axp221", "x-powers,axp223", "x-powers,axp809" + "x-powers,axp221", "x-powers,axp223", "x-powers,axp806", + "x-powers,axp809" - reg: The I2C slave address or RSB hardware address for the AXP chip - interrupt-parent: The parent interrupt controller - interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin @@ -47,7 +48,6 @@ Optional properties for DCDC regulators: probably makes sense for HiFi audio related applications that aren't battery constrained. - AXP202/AXP209 regulators, type, and corresponding input supply names: Regulator Type Supply Name Notes @@ -86,6 +86,30 @@ LDO_IO1 : LDO : ips-supply : GPIO 1 RTC_LDO : LDO : ips-supply : always on DRIVEVBUS : Enable output : drivevbus-supply : external regulator +AXP806 regulators, type, and corresponding input supply names: + +Regulator Type Supply Name Notes +--------- ---- ----------- ----- +DCDCA : DC-DC buck : vina-supply : poly-phase capable +DCDCB : DC-DC buck : vinb-supply : poly-phase capable +DCDCC : DC-DC buck : vinc-supply : poly-phase capable +DCDCD : DC-DC buck : vind-supply : poly-phase capable +DCDCE : DC-DC buck : vine-supply : poly-phase capable +ALDO1 : LDO : aldoin-supply : shared supply +ALDO2 : LDO : aldoin-supply : shared supply +ALDO3 : LDO : aldoin-supply : shared supply +BLDO1 : LDO : bldoin-supply : shared supply +BLDO2 : LDO : bldoin-supply : shared supply +BLDO3 : LDO : bldoin-supply : shared supply +BLDO4 : LDO : bldoin-supply : shared supply +CLDO1 : LDO : cldoin-supply : shared supply +CLDO2 : LDO : cldoin-supply : shared supply +CLDO3 : LDO : cldoin-supply : shared supply +SW : On/Off Switch : swin-supply + +Additionally, the AXP806 DC-DC regulators support poly-phase arrangements +for higher output current. The possible groupings are: A+B, A+B+C, D+E. + AXP809 regulators, type, and corresponding input supply names: Regulator Type Supply Name Notes diff --git a/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt b/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt index f24f33409164..37a088f9a648 100644 --- a/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt +++ b/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt @@ -62,6 +62,7 @@ The below bindings specify the set of valid subnodes. "qcom,pm8058-rtc" "qcom,pm8921-rtc" "qcom,pm8941-rtc" + "qcom,pm8018-rtc" - reg: Usage: required diff --git a/Documentation/devicetree/bindings/mfd/qcom-rpm.txt b/Documentation/devicetree/bindings/mfd/qcom-rpm.txt index b98b291a31ba..485bc59fcc48 100644 --- a/Documentation/devicetree/bindings/mfd/qcom-rpm.txt +++ b/Documentation/devicetree/bindings/mfd/qcom-rpm.txt @@ -13,6 +13,7 @@ frequencies. "qcom,rpm-msm8660" "qcom,rpm-msm8960" "qcom,rpm-ipq8064" + "qcom,rpm-mdm9615" - reg: Usage: required @@ -59,6 +60,7 @@ Regulator nodes are identified by their compatible: "qcom,rpm-pm8058-regulators" "qcom,rpm-pm8901-regulators" "qcom,rpm-pm8921-regulators" + "qcom,rpm-pm8018-regulators" - vdd_l0_l1_lvs-supply: - vdd_l2_l11_l12-supply: @@ -137,6 +139,15 @@ Regulator nodes are identified by their compatible: Definition: reference to regulator supplying the input pin, as described in the data sheet +- vin_lvs1-supply: +- vdd_l7-supply: +- vdd_l8-supply: +- vdd_l9_l10_l11_l12-supply: + Usage: optional (pm8018 only) + Value type: <phandle> + Definition: reference to regulator supplying the input pin, as + described in the data sheet + The regulator node houses sub-nodes for each regulator within the device. Each sub-node is identified using the node's name, with valid values listed for each of the pmics below. @@ -156,6 +167,10 @@ pm8921: l29, lvs1, lvs2, lvs3, lvs4, lvs5, lvs6, lvs7, usb-switch, hdmi-switch, ncp +pm8018: + s1, s2, s3, s4, s5, , l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, + l12, l14, lvs1 + The content of each sub-node is defined by the standard binding for regulators - see regulator.txt - with additional custom properties described below: diff --git a/Documentation/devicetree/bindings/mfd/rk808.txt b/Documentation/devicetree/bindings/mfd/rk808.txt index 4ca6aab4273a..9636ae8d8d41 100644 --- a/Documentation/devicetree/bindings/mfd/rk808.txt +++ b/Documentation/devicetree/bindings/mfd/rk808.txt @@ -1,7 +1,11 @@ -RK808 Power Management Integrated Circuit +RK8XX Power Management Integrated Circuit + +The rk8xx family current members: +rk808 +rk818 Required properties: -- compatible: "rockchip,rk808" +- compatible: "rockchip,rk808", "rockchip,rk818" - reg: I2C slave address - interrupt-parent: The parent interrupt controller. - interrupts: the interrupt outputs of the controller. @@ -13,6 +17,8 @@ Optional properties: default output clock name - rockchip,system-power-controller: Telling whether or not this pmic is controlling the system power. + +Optional RK808 properties: - vcc1-supply: The input supply for DCDC_REG1 - vcc2-supply: The input supply for DCDC_REG2 - vcc3-supply: The input supply for DCDC_REG3 @@ -29,7 +35,20 @@ Optional properties: the gpio controller. If DVS GPIOs aren't present, voltage changes will happen very quickly with no slow ramp time. -Regulators: All the regulators of RK808 to be instantiated shall be +Optional RK818 properties: +- vcc1-supply: The input supply for DCDC_REG1 +- vcc2-supply: The input supply for DCDC_REG2 +- vcc3-supply: The input supply for DCDC_REG3 +- vcc4-supply: The input supply for DCDC_REG4 +- boost-supply: The input supply for DCDC_BOOST +- vcc6-supply: The input supply for LDO_REG1 and LDO_REG2 +- vcc7-supply: The input supply for LDO_REG3, LDO_REG5 and LDO_REG7 +- vcc8-supply: The input supply for LDO_REG4, LDO_REG6 and LDO_REG8 +- vcc9-supply: The input supply for LDO_REG9 and SWITCH_REG +- h_5v-supply: The input supply for HDMI_SWITCH +- usb-supply: The input supply for OTG_SWITCH + +Regulators: All the regulators of RK8XX to be instantiated shall be listed in a child node named 'regulators'. Each regulator is represented by a child node of the 'regulators' node. @@ -48,6 +67,18 @@ number as described in RK808 datasheet. - SWITCH_REGn - valid values for n are 1 to 2 +Following regulators of the RK818 PMIC block are supported. Note that +the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO +number as described in RK818 datasheet. + + - DCDC_REGn + - valid values for n are 1 to 4. + - LDO_REGn + - valid values for n are 1 to 9. + - SWITCH_REG + - HDMI_SWITCH + - OTG_SWITCH + Standard regulator bindings are used inside regulator subnodes. Check Documentation/devicetree/bindings/regulator/regulator.txt for more details diff --git a/Documentation/devicetree/bindings/mfd/stmpe.txt b/Documentation/devicetree/bindings/mfd/stmpe.txt index 3fb68bfefc8b..f9065a5781a2 100644 --- a/Documentation/devicetree/bindings/mfd/stmpe.txt +++ b/Documentation/devicetree/bindings/mfd/stmpe.txt @@ -4,7 +4,7 @@ STMPE is an MFD device which may expose the following inbuilt devices: gpio, keypad, touchscreen, adc, pwm, rotator. Required properties: - - compatible : "st,stmpe[610|801|811|1601|2401|2403]" + - compatible : "st,stmpe[610|801|811|1600|1601|2401|2403]" - reg : I2C/SPI address of the device Optional properties: diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 98dd47a30fc7..346e9a9b4397 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -874,6 +874,16 @@ config GPIO_LP3943 LP3943 can be used as a GPIO expander which provides up to 16 GPIOs. Open drain outputs are required for this usage. +config GPIO_LP873X + tristate "TI LP873X GPO" + depends on MFD_TI_LP873X + help + This driver supports the GPO on TI Lp873x PMICs. 2 GPOs are present + on LP873X PMICs. + + This driver can also be built as a module. If so, the module will be + called gpio-lp873x. + config GPIO_MAX77620 tristate "GPIO support for PMIC MAX77620 and MAX20024" depends on MFD_MAX77620 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 2a035ed8f168..d60432f2a126 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o obj-$(CONFIG_GPIO_LPC18XX) += gpio-lpc18xx.o obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o +obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o obj-$(CONFIG_GPIO_MAX7300) += gpio-max7300.o diff --git a/drivers/gpio/gpio-lp873x.c b/drivers/gpio/gpio-lp873x.c new file mode 100644 index 000000000000..f10d49da1554 --- /dev/null +++ b/drivers/gpio/gpio-lp873x.c @@ -0,0 +1,193 @@ +/* + * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ + * Keerthy <j-keerthy@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether expressed or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License version 2 for more details. + * + * Based on the TPS65218 driver + */ + +#include <linux/gpio.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include <linux/mfd/lp873x.h> + +#define BITS_PER_GPO 0x4 +#define LP873X_GPO_CTRL_OD 0x2 + +struct lp873x_gpio { + struct gpio_chip chip; + struct lp873x *lp873; +}; + +static int lp873x_gpio_get_direction(struct gpio_chip *chip, + unsigned int offset) +{ + /* This device is output only */ + return 0; +} + +static int lp873x_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + /* This device is output only */ + return -EINVAL; +} + +static int lp873x_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct lp873x_gpio *gpio = gpiochip_get_data(chip); + + /* Set the initial value */ + return regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, + BIT(offset * BITS_PER_GPO), + value ? BIT(offset * BITS_PER_GPO) : 0); +} + +static int lp873x_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct lp873x_gpio *gpio = gpiochip_get_data(chip); + int ret, val; + + ret = regmap_read(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, &val); + if (ret < 0) + return ret; + + return val & BIT(offset * BITS_PER_GPO); +} + +static void lp873x_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + struct lp873x_gpio *gpio = gpiochip_get_data(chip); + + regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, + BIT(offset * BITS_PER_GPO), + value ? BIT(offset * BITS_PER_GPO) : 0); +} + +static int lp873x_gpio_request(struct gpio_chip *gc, unsigned int offset) +{ + struct lp873x_gpio *gpio = gpiochip_get_data(gc); + int ret; + + switch (offset) { + case 0: + /* No MUX Set up Needed for GPO */ + break; + case 1: + /* Setup the CLKIN_PIN_SEL MUX to GPO2 */ + ret = regmap_update_bits(gpio->lp873->regmap, LP873X_REG_CONFIG, + LP873X_CONFIG_CLKIN_PIN_SEL, 0); + if (ret) + return ret; + + break; + default: + return -EINVAL; + } + + return 0; +} + +static int lp873x_gpio_set_single_ended(struct gpio_chip *gc, + unsigned int offset, + enum single_ended_mode mode) +{ + struct lp873x_gpio *gpio = gpiochip_get_data(gc); + + switch (mode) { + case LINE_MODE_OPEN_DRAIN: + return regmap_update_bits(gpio->lp873->regmap, + LP873X_REG_GPO_CTRL, + BIT(offset * BITS_PER_GPO + + LP873X_GPO_CTRL_OD), + BIT(offset * BITS_PER_GPO + + LP873X_GPO_CTRL_OD)); + case LINE_MODE_PUSH_PULL: + return regmap_update_bits(gpio->lp873->regmap, + LP873X_REG_GPO_CTRL, + BIT(offset * BITS_PER_GPO + + LP873X_GPO_CTRL_OD), 0); + default: + return -ENOTSUPP; + } +} + +static struct gpio_chip template_chip = { + .label = "lp873x-gpio", + .owner = THIS_MODULE, + .request = lp873x_gpio_request, + .get_direction = lp873x_gpio_get_direction, + .direction_input = lp873x_gpio_direction_input, + .direction_output = lp873x_gpio_direction_output, + .get = lp873x_gpio_get, + .set = lp873x_gpio_set, + .set_single_ended = lp873x_gpio_set_single_ended, + .base = -1, + .ngpio = 2, + .can_sleep = true, +}; + +static int lp873x_gpio_probe(struct platform_device *pdev) +{ + struct lp873x_gpio *gpio; + int ret; + + gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); + if (!gpio) + return -ENOMEM; + + platform_set_drvdata(pdev, gpio); + + gpio->lp873 = dev_get_drvdata(pdev->dev.parent); + gpio->chip = template_chip; + gpio->chip.parent = gpio->lp873->dev; + + ret = gpiochip_add_data(&gpio->chip, gpio); + if (ret < 0) { + dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); + return ret; + } + + return 0; +} + +static int lp873x_gpio_remove(struct platform_device *pdev) +{ + struct lp873x_gpio *gpio = platform_get_drvdata(pdev); + + gpiochip_remove(&gpio->chip); + + return 0; +} + +static const struct platform_device_id lp873x_gpio_id_table[] = { + { "lp873x-gpio", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, lp873x_gpio_id_table); + +static struct platform_driver lp873x_gpio_driver = { + .driver = { + .name = "lp873x-gpio", + }, + .probe = lp873x_gpio_probe, + .remove = lp873x_gpio_remove, + .id_table = lp873x_gpio_id_table, +}; +module_platform_driver(lp873x_gpio_driver); + +MODULE_AUTHOR("Keerthy <j-keerthy@ti.com>"); +MODULE_DESCRIPTION("LP873X GPIO driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c index f675132de10e..5c0d8189a304 100644 --- a/drivers/gpio/gpio-stmpe.c +++ b/drivers/gpio/gpio-stmpe.c @@ -20,6 +20,8 @@ */ enum { REG_RE, REG_FE, REG_IE }; +enum { LSB, CSB, MSB }; + #define CACHE_NR_REGS 3 /* No variant has more than 24 GPIOs */ #define CACHE_NR_BANKS (24 / 8) @@ -39,7 +41,7 @@ static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset) { struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; - u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8); + u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB + (offset / 8)]; u8 mask = 1 << (offset % 8); int ret; @@ -55,7 +57,7 @@ static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val) struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB; - u8 reg = stmpe->regs[which] - (offset / 8); + u8 reg = stmpe->regs[which + (offset / 8)]; u8 mask = 1 << (offset % 8); /* @@ -89,7 +91,7 @@ static int stmpe_gpio_direction_output(struct gpio_chip *chip, { struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; - u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); + u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; u8 mask = 1 << (offset % 8); stmpe_gpio_set(chip, offset, val); @@ -102,7 +104,7 @@ static int stmpe_gpio_direction_input(struct gpio_chip *chip, { struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; - u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); + u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; u8 mask = 1 << (offset % 8); return stmpe_set_bits(stmpe, reg, mask, 0); @@ -142,8 +144,9 @@ static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (type & IRQ_TYPE_LEVEL_LOW || type & IRQ_TYPE_LEVEL_HIGH) return -EINVAL; - /* STMPE801 doesn't have RE and FE registers */ - if (stmpe_gpio->stmpe->partnum == STMPE801) + /* STMPE801 and STMPE 1600 don't have RE and FE registers */ + if (stmpe_gpio->stmpe->partnum == STMPE801 || + stmpe_gpio->stmpe->partnum == STMPE1600) return 0; if (type & IRQ_TYPE_EDGE_RISING) @@ -173,17 +176,24 @@ static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); struct stmpe *stmpe = stmpe_gpio->stmpe; int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); - static const u8 regmap[] = { - [REG_RE] = STMPE_IDX_GPRER_LSB, - [REG_FE] = STMPE_IDX_GPFER_LSB, - [REG_IE] = STMPE_IDX_IEGPIOR_LSB, + static const u8 regmap[CACHE_NR_REGS][CACHE_NR_BANKS] = { + [REG_RE][LSB] = STMPE_IDX_GPRER_LSB, + [REG_RE][CSB] = STMPE_IDX_GPRER_CSB, + [REG_RE][MSB] = STMPE_IDX_GPRER_MSB, + [REG_FE][LSB] = STMPE_IDX_GPFER_LSB, + [REG_FE][CSB] = STMPE_IDX_GPFER_CSB, + [REG_FE][MSB] = STMPE_IDX_GPFER_MSB, + [REG_IE][LSB] = STMPE_IDX_IEGPIOR_LSB, + [REG_IE][CSB] = STMPE_IDX_IEGPIOR_CSB, + [REG_IE][MSB] = STMPE_IDX_IEGPIOR_MSB, }; int i, j; for (i = 0; i < CACHE_NR_REGS; i++) { - /* STMPE801 doesn't have RE and FE registers */ - if ((stmpe->partnum == STMPE801) && - (i != REG_IE)) + /* STMPE801 and STMPE1600 don't have RE and FE registers */ + if ((stmpe->partnum == STMPE801 || + stmpe->partnum == STMPE1600) && + (i != REG_IE)) continue; for (j = 0; j < num_banks; j++) { @@ -194,7 +204,7 @@ static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) continue; stmpe_gpio->oldregs[i][j] = new; - stmpe_reg_write(stmpe, stmpe->regs[regmap[i]] - j, new); + stmpe_reg_write(stmpe, stmpe->regs[regmap[i][j]], new); } } @@ -216,11 +226,21 @@ static void stmpe_gpio_irq_unmask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); + struct stmpe *stmpe = stmpe_gpio->stmpe; int offset = d->hwirq; int regoffset = offset / 8; int mask = 1 << (offset % 8); stmpe_gpio->regs[REG_IE][regoffset] |= mask; + + /* + * STMPE1600 workaround: to be able to get IRQ from pins, + * a read must be done on GPMR register, or a write in + * GPSR or GPCR registers + */ + if (stmpe->partnum == STMPE1600) + stmpe_reg_read(stmpe, + stmpe->regs[STMPE_IDX_GPMR_LSB + regoffset]); } static void stmpe_dbg_show_one(struct seq_file *s, @@ -230,9 +250,9 @@ static void stmpe_dbg_show_one(struct seq_file *s, struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); struct stmpe *stmpe = stmpe_gpio->stmpe; const char *label = gpiochip_is_requested(gc, offset); - int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); bool val = !!stmpe_gpio_get(gc, offset); - u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); + u8 bank = offset / 8; + u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB + bank]; u8 mask = 1 << (offset % 8); int ret; u8 dir; @@ -247,39 +267,72 @@ static void stmpe_dbg_show_one(struct seq_file *s, gpio, label ?: "(none)", val ? "hi" : "lo"); } else { - u8 edge_det_reg = stmpe->regs[STMPE_IDX_GPEDR_MSB] + num_banks - 1 - (offset / 8); - u8 rise_reg = stmpe->regs[STMPE_IDX_GPRER_LSB] - (offset / 8); - u8 fall_reg = stmpe->regs[STMPE_IDX_GPFER_LSB] - (offset / 8); - u8 irqen_reg = stmpe->regs[STMPE_IDX_IEGPIOR_LSB] - (offset / 8); - bool edge_det; - bool rise; - bool fall; + u8 edge_det_reg; + u8 rise_reg; + u8 fall_reg; + u8 irqen_reg; + + char *edge_det_values[] = {"edge-inactive", + "edge-asserted", + "not-supported"}; + char *rise_values[] = {"no-rising-edge-detection", + "rising-edge-detection", + "not-supported"}; + char *fall_values[] = {"no-falling-edge-detection", + "falling-edge-detection", + "not-supported"}; + #define NOT_SUPPORTED_IDX 2 + u8 edge_det = NOT_SUPPORTED_IDX; + u8 rise = NOT_SUPPORTED_IDX; + u8 fall = NOT_SUPPORTED_IDX; bool irqen; - ret = stmpe_reg_read(stmpe, edge_det_reg); - if (ret < 0) - return; - edge_det = !!(ret & mask); - ret = stmpe_reg_read(stmpe, rise_reg); - if (ret < 0) + switch (stmpe->partnum) { + case STMPE610: + case STMPE811: + case STMPE1601: + case STMPE2401: + case STMPE2403: + edge_det_reg = stmpe->regs[STMPE_IDX_GPEDR_LSB + bank]; + ret = stmpe_reg_read(stmpe, edge_det_reg); + if (ret < 0) + return; + edge_det = !!(ret & mask); + + case STMPE1801: + rise_reg = stmpe->regs[STMPE_IDX_GPRER_LSB + bank]; + fall_reg = stmpe->regs[STMPE_IDX_GPFER_LSB + bank]; + + ret = stmpe_reg_read(stmpe, rise_reg); + if (ret < 0) + return; + rise = !!(ret & mask); + ret = stmpe_reg_read(stmpe, fall_reg); + if (ret < 0) + return; + fall = !!(ret & mask); + + case STMPE801: + case STMPE1600: + irqen_reg = stmpe->regs[STMPE_IDX_IEGPIOR_LSB + bank]; + break; + + default: return; - rise = !!(ret & mask); - ret = stmpe_reg_read(stmpe, fall_reg); - if (ret < 0) - return; - fall = !!(ret & mask); + } + ret = stmpe_reg_read(stmpe, irqen_reg); if (ret < 0) return; irqen = !!(ret & mask); - seq_printf(s, " gpio-%-3d (%-20.20s) in %s %s %s%s%s", + seq_printf(s, " gpio-%-3d (%-20.20s) in %s %13s %13s %25s %25s", gpio, label ?: "(none)", val ? "hi" : "lo", - edge_det ? "edge-asserted" : "edge-inactive", - irqen ? "IRQ-enabled" : "", - rise ? " rising-edge-detection" : "", - fall ? " falling-edge-detection" : ""); + edge_det_values[edge_det], + irqen ? "IRQ-enabled" : "IRQ-disabled", + rise_values[rise], + fall_values[fall]); } } @@ -307,18 +360,32 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev) { struct stmpe_gpio *stmpe_gpio = dev; struct stmpe *stmpe = stmpe_gpio->stmpe; - u8 statm |