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-rw-r--r--Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml50
-rw-r--r--Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt5
-rw-r--r--Documentation/devicetree/bindings/clock/fsl,plldig.yaml54
-rw-r--r--Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml55
-rw-r--r--Documentation/devicetree/bindings/clock/imx8mp-clock.yaml68
-rw-r--r--Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt2
-rw-r--r--Documentation/devicetree/bindings/clock/ti-clkctrl.txt11
-rw-r--r--Documentation/devicetree/bindings/clock/ti/dra7-atl.txt4
-rw-r--r--Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml64
-rw-r--r--arch/arm/boot/dts/dra7-evm-common.dtsi2
-rw-r--r--arch/arm/boot/dts/dra72-evm-common.dtsi2
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi14
-rw-r--r--drivers/clk/Kconfig24
-rw-r--r--drivers/clk/Makefile2
-rw-r--r--drivers/clk/at91/at91sam9260.c2
-rw-r--r--drivers/clk/at91/at91sam9rl.c2
-rw-r--r--drivers/clk/at91/at91sam9x5.c2
-rw-r--r--drivers/clk/at91/clk-sam9x60-pll.c8
-rw-r--r--drivers/clk/at91/pmc.c2
-rw-r--r--drivers/clk/at91/sam9x60.c1
-rw-r--r--drivers/clk/at91/sama5d2.c2
-rw-r--r--drivers/clk/at91/sama5d4.c2
-rw-r--r--drivers/clk/clk-asm9260.c8
-rw-r--r--drivers/clk/clk-bm1880.c3
-rw-r--r--drivers/clk/clk-composite.c56
-rw-r--r--drivers/clk/clk-divider.c91
-rw-r--r--drivers/clk/clk-fixed-rate.c113
-rw-r--r--drivers/clk/clk-fsl-sai.c92
-rw-r--r--drivers/clk/clk-gate.c35
-rw-r--r--drivers/clk/clk-gpio.c172
-rw-r--r--drivers/clk/clk-mux.c58
-rw-r--r--drivers/clk/clk-plldig.c286
-rw-r--r--drivers/clk/clk-qoriq.c29
-rw-r--r--drivers/clk/clk.c153
-rw-r--r--drivers/clk/imx/Kconfig6
-rw-r--r--drivers/clk/imx/Makefile3
-rw-r--r--drivers/clk/imx/clk-composite-7ulp.c2
-rw-r--r--drivers/clk/imx/clk-composite-8m.c6
-rw-r--r--drivers/clk/imx/clk-divider-gate.c12
-rw-r--r--drivers/clk/imx/clk-frac-pll.c7
-rw-r--r--drivers/clk/imx/clk-imx6q.c5
-rw-r--r--drivers/clk/imx/clk-imx7ulp.c183
-rw-r--r--drivers/clk/imx/clk-imx8mm.c565
-rw-r--r--drivers/clk/imx/clk-imx8mn.c498
-rw-r--r--drivers/clk/imx/clk-imx8mp.c764
-rw-r--r--drivers/clk/imx/clk-imx8mq.c584
-rw-r--r--drivers/clk/imx/clk-imx8qxp-lpcg.c11
-rw-r--r--drivers/clk/imx/clk-pfdv2.c2
-rw-r--r--drivers/clk/imx/clk-pll14xx.c31
-rw-r--r--drivers/clk/imx/clk-pllv1.c14
-rw-r--r--drivers/clk/imx/clk-pllv2.c14
-rw-r--r--drivers/clk/imx/clk-pllv4.c2
-rw-r--r--drivers/clk/imx/clk-sscg-pll.c (renamed from drivers/clk/imx/clk-sccg-pll.c)152
-rw-r--r--drivers/clk/imx/clk.c12
-rw-r--r--drivers/clk/imx/clk.h162
-rw-r--r--drivers/clk/mediatek/Kconfig44
-rw-r--r--drivers/clk/meson/Makefile2
-rw-r--r--drivers/clk/meson/clk-mpll.c4
-rw-r--r--drivers/clk/meson/clk-phase.c4
-rw-r--r--drivers/clk/meson/clk-pll.c13
-rw-r--r--drivers/clk/meson/g12a.c1
-rw-r--r--drivers/clk/meson/meson8-ddr.c149
-rw-r--r--drivers/clk/meson/meson8b.c124
-rw-r--r--drivers/clk/meson/sclk-div.c4
-rw-r--r--drivers/clk/microchip/clk-core.c8
-rw-r--r--drivers/clk/mmp/clk-frac.c4
-rw-r--r--drivers/clk/mmp/clk-mix.c4
-rw-r--r--drivers/clk/mvebu/Kconfig2
-rw-r--r--drivers/clk/qcom/Kconfig4
-rw-r--r--drivers/clk/qcom/clk-hfpll.c6
-rw-r--r--drivers/clk/qcom/gcc-sc7180.c6
-rw-r--r--drivers/clk/qcom/gpucc-msm8998.c2
-rw-r--r--drivers/clk/renesas/Kconfig4
-rw-r--r--drivers/clk/renesas/r7s9210-cpg-mssr.c1
-rw-r--r--drivers/clk/renesas/rcar-gen2-cpg.h8
-rw-r--r--drivers/clk/renesas/rcar-gen3-cpg.c6
-rw-r--r--drivers/clk/rockchip/clk-pll.c28
-rw-r--r--drivers/clk/samsung/clk-exynos5420.c8
-rw-r--r--drivers/clk/sunxi-ng/ccu-sun50i-a64.c28
-rw-r--r--drivers/clk/sunxi-ng/ccu-sun50i-a64.h1
-rw-r--r--drivers/clk/sunxi-ng/ccu-sun6i-a31.h4
-rw-r--r--drivers/clk/sunxi-ng/ccu-sun8i-a23-a33.h4
-rw-r--r--drivers/clk/sunxi-ng/ccu-sun8i-r40.h4
-rw-r--r--drivers/clk/sunxi/clk-sun6i-apb0-gates.c6
-rw-r--r--drivers/clk/tegra/clk-dfll.c3
-rw-r--r--drivers/clk/tegra/clk-divider.c9
-rw-r--r--drivers/clk/tegra/clk-tegra-periph.c6
-rw-r--r--drivers/clk/tegra/clk-tegra20.c4
-rw-r--r--drivers/clk/tegra/clk-tegra30.c4
-rw-r--r--drivers/clk/tegra/clk.c4
-rw-r--r--drivers/clk/ti/clk-54xx.c15
-rw-r--r--drivers/clk/ti/clk-7xx.c62
-rw-r--r--drivers/clk/ti/clk.c4
-rw-r--r--drivers/clk/ti/clkctrl.c96
-rw-r--r--drivers/clk/ti/clock.h2
-rw-r--r--drivers/clk/ti/clockdomain.c8
-rw-r--r--drivers/clk/uniphier/clk-uniphier-peri.c13
-rw-r--r--drivers/clk/ux500/u8500_of_clk.c2
-rw-r--r--drivers/clk/versatile/Kconfig2
-rw-r--r--drivers/clk/zynqmp/clkc.c3
-rw-r--r--drivers/clk/zynqmp/divider.c118
-rw-r--r--drivers/clk/zynqmp/pll.c6
-rw-r--r--drivers/firmware/xilinx/zynqmp.c2
-rw-r--r--drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c4
-rw-r--r--drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c4
-rw-r--r--drivers/net/phy/mdio-mux-meson-g12a.c4
-rw-r--r--include/dt-bindings/clock/dra7.h23
-rw-r--r--include/dt-bindings/clock/imx8mp-clock.h300
-rw-r--r--include/dt-bindings/clock/meson8-ddr-clkc.h4
-rw-r--r--include/dt-bindings/clock/omap5.h1
-rw-r--r--include/dt-bindings/clock/sun50i-a64-ccu.h1
-rw-r--r--include/dt-bindings/clock/sun6i-a31-ccu.h2
-rw-r--r--include/dt-bindings/clock/sun8i-a23-a33-ccu.h2
-rw-r--r--include/dt-bindings/clock/sun8i-r40-ccu.h2
-rw-r--r--include/dt-bindings/clock/ti-dra7-atl.h (renamed from include/dt-bindings/clk/ti-dra7-atl.h)0
-rw-r--r--include/dt-bindings/clock/xlnx-versal-clk.h123
-rw-r--r--include/linux/clk-provider.h444
-rw-r--r--include/linux/clk.h3
-rw-r--r--include/linux/firmware/xlnx-zynqmp.h2
119 files changed, 4583 insertions, 1691 deletions
diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml
new file mode 100644
index 000000000000..4b8669f870ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/amlogic,meson8-ddr-clkc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic DDR Clock Controller Device Tree Bindings
+
+maintainers:
+ - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+
+properties:
+ compatible:
+ enum:
+ - amlogic,meson8-ddr-clkc
+ - amlogic,meson8b-ddr-clkc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: xtal
+
+ "#clock-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ ddr_clkc: clock-controller@400 {
+ compatible = "amlogic,meson8-ddr-clkc";
+ reg = <0x400 0x20>;
+ clocks = <&xtal>;
+ clock-names = "xtal";
+ #clock-cells = <1>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
index 4d94091c1d2d..cc51e4746b3b 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
+++ b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
@@ -11,6 +11,11 @@ Required Properties:
- "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
- #clock-cells: should be 1.
- #reset-cells: should b