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2022-07-08arm64: tegra: Enable OPE on various platformsSameer Pujar6-0/+340
Enable OPE module usage on various Jetson platforms. This can be plugged into an audio path using ALSA mixer controls. Add audio-graph-port binding to use OPE device with generic audio-graph based sound card. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08arm64: tegra: Add OPE device on Tegra210 and laterSameer Pujar4-0/+109
Output Processing Engine (OPE) is a client of AHUB and is present on Tegra210 and later generations of Tegra SoC. Add this device on the relevant SoC DTSI files. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-04arm64: tegra: Add missing DFLL reset on Tegra210Diogo Ivo1-2/+3
Commit 4782c0a5dd88 ("clk: tegra: Don't deassert reset on enabling clocks") removed deassertion of reset lines when enabling peripheral clocks. This breaks the initialization of the DFLL driver which relied on this behaviour. In order to be able to fix this, add the corresponding reset to the DT. Tested on Google Pixel C. Cc: stable@vger.kernel.org Fixes: 4782c0a5dd88 ("clk: tegra: Don't deassert reset on enabling clocks") Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-29arm64: tegra: Add memory controller channelsAshish Mhetre3-7/+49
From tegra186 onwards, memory controller support multiple channels. During the error interrupts from memory controller, corresponding channels need to be accessed for logging error info and clearing the interrupt. So add address and size of these channels in device tree node of tegra186, tegra194 and tegra234 memory controller. Also add reg-names for each of these reg items which are used by driver for mapping. Signed-off-by: Ashish Mhetre <amhetre@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-26arm64: tegra: Enable ASRC on various platformsSameer Pujar4-0/+892
Enable ASRC module usage on various Jetson Platforms. This can be plugged into an audio path using ALSA mixer controls. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-26arm64: tegra: Add ASRC device on Tegra186 and laterSameer Pujar3-0/+23
Asynchronous Sample Rate Converter (ASRC) is a client of AHUB and is present on Tegra186 and later generations of Tegra SoC. Add this device on the relevant SoC DTSI files. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-25arm64: tegra: Update PWM fan node nameJon Hunter4-4/+4
According to the device-tree binding document for PWM fans [0], the PWM fan node name should be 'pwm-fan'. Update the PWM fan node name to align with this. [0] Documentation/devicetree/bindings/hwmon/pwm-fan.txt Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-25arm64: tegra: Add node for Tegra234 CCPLEX clusterSumit Gupta1-0/+7
Adding CCPLEX cluster node to represent Tegra234 cpufreq. Tegra234 uses some of the CRAB (Control Register Access Bus) registers for CPU frequency requests. These registers are memory mapped to the CCPLEX_MMCRAB_ARM region. In this node, mapping the range of MMCRAB registers is required only for CPU frequency info. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-06arm64: tegra: Add QSPI controllers on Tegra234Ashish Singhal2-0/+40
This adds the QSPI controllers on the Tegra234 SoC and populates the SPI NOR flash device for the Jetson AGX Orin platform. Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-06arm64: tegra: Update SDMMC1/3 clock source for Tegra194Aniruddha Rao1-0/+10
The default parent for SDMMC1/3 clock sources can provide maximum frequency of 136MHz for SDR104 mode. Update parent clock source for SDMMC1/SDMMC3 instances to increase the output clock frequency to 195MHz and improve the perf. Signed-off-by: Aniruddha Rao <anrao@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-03-23Merge tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds6-8/+2962
Pull ARM devicetree updates from Arnd Bergmann: "After a somewhat quiet 5.17 release, the size of the DT changes is a bit larger again. There are nine new SoC that get added, all of them related to existing platforms: - Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB - Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G tablet - Microchip Lan966 networking SoC and it evaluation board - Qualcomm Snapdragon 625/632 midrange phone SoCs, with the LG Nexus 5X and Fairphone FP3 phones - Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs, along with their evaluation boards - Samsung Exynos 850 phone SoC and reference board - Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone - Tesla FSD (Fully Self-Driving), an automotive SoC loosely derived from the Samsung Exynos family. - TI K3/AM62 SoC and reference board Support for additional functionality in existing dts files is added all over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91, Allwinner, i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and Broadcom. Samsung has a rework for its pinctrl schema that is a bit tricky and requires driver changes to be included here. A few more platforms only have smaller cleanups and DT Schema fixes, this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno. The new machines are really too many to list, but I'll do it anyway: Allwinner: - A20-Marsboard development board Amlogic: - Amediatek X96-AIR (Amlogic S905X3) - CYX A95XF3-AIR (Amlogic S905X3) - Haochuangy H96-Max (Amlogic S905X3) - Amlogic AQ222 (Amlogic S4) - OSMC Vero 4K+ (Amlogic S905D) Arm Juno: - Separate DT depending on SCMI firmware version Aspeed: - Quanta S6Q BMC (AST2600) - ASRock ROMED8HM3 (AST2500) Broadcom: - Raspberry Pi Zero 2 W Marvell MVEBU/Armada: - Ctera C200 V1 NAS (kirkwood) - Ctera C200 V2 NAS (armada-370) Mstar: - DongShanPiOne, a low-end embedded board - Miyoo Mini handheld game console NXP i.MX: - Numerous i.MX8M Mini based boards in even more variations, but none based on other SoCs this time: Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and Gateworks GW7903 Qualcomm: - Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3) - SHIFT6mq phone (Snapdragon 845) - Samsung Galaxy Book2 (Snapdragon 850) - Snapdragon 8 Gen 1 Hardware Development Kit TI OMAP: - SanCloud BeagleBone Enhanced WiFi Rockchip: - Pine64 PineNote ereader tablet (rk356x) - Bananapi-R2-Pro (rk356x) STM32: - emtrion emSBS-Argon embedded board (stm32mp157c)" * tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (627 commits) arm64: dts: n5x: drop invalid property and fix edac node name arm64: dts: fsd: Add the MCT support arm64: dts: stingray: Fix spi clock name arm64: dts: ns2: Fix spi clock name ARM: dts: rockchip: Update regulator name for PX3 ARM: dts: rockchip: Add #clock-cells value for rk805 arm64: dts: rockchip: Add #clock-cells value for rk805 arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808 arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-firefly ARM: dts: at91: sama7g5: Add NAND support ARM: dts: at91: sama7g5: add eic node ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15 arm64: dts: lg: align pl330 node name with dtschema arm64: dts: lg: add dma-cells to pl330 node arm64: dts: juno: align pl330 node name with dtschema arm64: dts: broadcom: Fix sata nodename arm64: dts: n5x: add sdr edac support arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node dt-bindings: usb: dwc2: add disable-over-current ...
2022-03-07Merge tag 'tegra-for-5.17-arm64-dt-fixes' of ↵Arnd Bergmann1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes arm64: tegra: Device tree fixes for v5.17 This contains a single, last-minute fix to disable the display SMMU by default because under some circumstances leaving it enabled by default can cause SMMU faults on boot. * tag 'tegra-for-5.17-arm64-dt-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Disable ISO SMMU for Tegra194 Link: https://lore.kernel.org/r/20220307182120.2169598-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25arm64: tegra: Drop arm,armv8-pmuv3 compatible stringThierry Reding2-3/+3
The arm,armv8-pmuv3 compatible string is meant to be used only for software models and not silicon chips. Drop them and use silicon- specific compatible strings instead. Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Enable Jetson Xavier NX USB device modeWayne Chang1-0/+25
This commit enables USB device mode at J5 micro-B USB port of Jetson Xavier NX. Signed-off-by: Wayne Chang <waynec@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Enable UART instance on 40-pin headerkartik1-0/+6
On P3737 board, UART-A is available on 40-pin header. Enable UART-A for P3737 and change the compatible string to "nvidia,tegra194-hsuart". This allows supporting HW flow control and is the preferred choice for higher baud rates. Signed-off-by: kartik <kkartik@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Add HDA device tree node for Tegra234Mohan Kumar2-0/+21
Add HDA device tree node for Tegra234 chip and for Jetson AGX Orin platform. Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Enable device-tree overlay supportJon Hunter1-0/+11
Add the '-@' DTC option for the Jetson TX1, Jetson Nano, Jetson TX2, Jetson TX2 NX, Jetson AGX Xavier, Jetson Xavier NX and Jetson AGX Orin platforms. This option populates the '__symbols__' node that contains all the necessary symbols for supporting device-tree overlays on these platforms. These Jetson platforms have various expansion headers, including a 40-pin GPIO header, that allow various add-on modules to be connected and this permits users to create device-tree overlays for these modules. Please note that this change does increase the size of the resulting DTB from between 30-50%. For example, with v5.17-rc1 increase in size is as follows: tegra210-p2371-2180.dtb: 79580 -> 105744 bytes tegra210-p3450-0000.dtb: 57465 -> 81357 bytes tegra186-p2771-0000.dtb: 64763 -> 99553 bytes tegra186-p3509-0000+p3636-0001.dtb: 48078 -> 62464 bytes tegra194-p2972-0000.dtb: 75303 -> 111545 bytes tegra194-p3509-0000+p3668-0000.dtb: 74762 -> 111995 bytes tegra194-p3509-0000+p3668-0001.dtb: 74578 -> 111748 bytes tegra234-p3737-0000+p3701-0000.dtb: 11229 -> 12917 bytes Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: APE sound card for Jetson AGX OrinSameer Pujar2-0/+1797
Add audio-graph based sound card support on Jetson AGX Orin platform. The sound card binds following modules: * I/O interfaces such as I2S and DMIC (to be specific I2S1, I2S2, I2S4, I2S6 and DMIC3 instances). * HW accelerators such as MVC, SFC, AMX, ADX and Mixer (all the available instances). Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Add audio devices on Tegra234Sameer Pujar1-0/+419
Add following devices which are part of APE subsystem * ACONNECT, AGIC and ADMA * AHUB and children (ADMAIF, I2S, DMIC, DSPK, MVC, SFC, AMX, ADX and Mixer) Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Move audio IOMMU properties to ADMAIF nodeThierry Reding1-5/+4
The ADMAIF node represents the device that accesses memory in the Tegra audio subsystem, so that's where the iommus and interconnects properties should reside. Move them out of the sound card node and into the ADMAIF node to properly reflect the memory data path. Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Add Tegra234 IOMMUsThierry Reding1-0/+426
The NVIDIA Tegra234 SoC comes with one single-instance ARM SMMU used by isochronous memory clients and two dual-instance ARM SMMUs used by non- isochronous memory clients. Add the corresponding device tree nodes and hook up existing memory clients (SDHCI and BPMP). Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Enable gpio-keys on Jetson AGX Orin Developer KitThierry Reding2-0/+32
Expose power, force-recovery and sleep buttons via a gpio-keys device so that userspace can receive events from them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Add GPCDMA node for tegra186 and tegra194Akhil R2-0/+85
Add device tree node for GPCDMA controller on Tegra186 target and Tegra194 target. Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com> Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Add Tegra234 PWM devicetree nodesAkhil R1-0/+12
Add device tree nodes for Tegra234 PWM Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24arm64: tegra: Add Tegra234 I2C devicetree nodesAkhil R1-0/+121
Add device tree nodes for Tegra234 I2C controllers Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-01-27arm64: tegra: Disable ISO SMMU for Tegra194Jon Hunter1-1/+1
Commit e762232f9466 ("arm64: tegra: Add ISO SMMU controller for Tegra194") added the ISO SMMU for display devices on Tegra194. The SMMU is enabled by default but not hooked up to the display controllers yet because we do not have a way to pass frame-buffer memory from the bootloader to the kernel. However, even though the SMMU is not hooked up to the display controllers' SMMU faults are being seen if a display is connected. Therefore, keep the ISO SMMU disabled by default for now. Fixes: e762232f9466 ("arm64: tegra: Add ISO SMMU controller for Tegra194") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-01-14Merge tag 'sound-5.17-rc1' of ↵Linus Torvalds1-3/+2
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound updates from Takashi Iwai: "It's a relatively calm development cycle, but still lots of updates in the driver side like Intel SOF. Below are some highlights: ALSA / ASoC core: - A new kselftest for ALSA control API - PCM NO_REWINDS support - Potential race fixes around control removals - Unify x86 SG-buffer memory allocation code - Cleanups and race fixes for ASoC DPCM locking ASoC: - Refinements and cleanups around the delay() APIs - Wider use of dev_err_probe(). - Continuing cleanups and improvements to the SOF code - Support for pin switches in simple-card derived cards - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20 S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments TLV320ADC3xxx HD-audio / USB-audio: - Fix deadlock at HD-audio codec unbinding - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device Misc: - Fix virmidi drain behavior Note that the merge of CS35L41 codec support is still half-baked, and at least one ACPI change is missing. Although this won't hinder the kernel build itself, we're going to catch up before RC1" * tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (415 commits) ALSA: hda: intel-dsp-config: reorder the config table ALSA: hda: intel-dsp-config: add JasperLake support ALSA: hda: cs35l41: fix double free on error in probe() ALSA: hda: Fix dependencies of CS35L41 on SPI/I2C buses ALSA: hda: Fix dependency on ASoC cs35l41 codec ASoC: cs35l41: Add support for hibernate memory retention mode ASoC: cs35l41: Update handling of test key registers ALSA: intel_hdmi: Check for error num after setting mask ASoC: wcd9335: Keep a RX port value for each SLIM RX mux ASoC: amd: acp: acp-mach: Change default RT1019 amp dev id ALSA: virmidi: Remove duplicated code ALSA: seq: virmidi: Add a drain operation ASoC: topology: Fix typo ASoC: fsl_asrc: refine the check of available clock divider ASoC: Intel: bytcr_rt5640: Add support for external GPIO jack-detect ASoC: Intel: bytcr_rt5640: Support retrieving the codec IRQ from the AMCR0F28 ACPI dev ASoC: rt5640: Add support for boards with an external jack-detect GPIO ASoC: rt5640: Allow snd_soc_component_set_jack() to override the codec IRQ ASoC: rt5640: Change jack_work to a delayed_work ASoC: rt5640: Fix possible NULL pointer deref on resume ...
2022-01-01arm64: tegra: Remove non existent Tegra194 resetSameer Pujar1-3/+2
Tegra194 does not really have "hda2codec_2x" related reset. Hence drop this entry to reflect actual HW. Fixes: 4878cc0c9fab ("arm64: tegra: Add HDA controller on Tegra194") Signed-off-by: Sameer Pujar <spujar@nvidia.com> Link: https://lore.kernel.org/r/1640260431-11613-4-git-send-email-spujar@nvidia.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
2021-12-17arm64: tegra: Add host1x hotflush reset on Tegra210Thierry Reding1-2/+2
Add the host1x memory client hotflush reset on Tegra210. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Hook up MMC and BPMP to memory controllerThierry Reding1-0/+8
Use the interconnects property to hook up the MMC and BPMP to the memory controller. This is needed to set the correct bus-level DMA mask, which is a prerequisite for adding IOMMU support. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add memory controller on Tegra234Thierry Reding1-0/+49
This adds the memory controller and the embedded external memory controller found on the Tegra234 SoC. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add EMC general interrupt on Tegra194Thierry Reding1-0/+1
Add the missing EMC general interrupt for the external memory controller on Tegra194. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Update SDMMC4 speeds for Tegra194Prathamesh Shete1-0/+5
Add required device-tree properties to populate all speed modes supported by SDMMC4 instance of Tegra194 SDHCI controller. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add dma-coherent for Tegra194 VICJon Hunter1-0/+1
DMA operations for the Tegra194 Video Image Compositor (VIC) are coherent and so populate the 'dma-coherent' property. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename Ethernet PHY nodesThierry Reding4-4/+4
Name the Ethernet PHY device tree nodes as expected by the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Remove unused only-1-8-v propertiesThierry Reding2-2/+0
The only-1-8-v property is not support by an DT schema, so drop it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Sort Tegra210 XUSB clocks correctlyThierry Reding1-2/+2
Make the order of the clocks and clock-names properties match the order in the device tree bindings. This isn't strictly necessary from a point of view of the operating system because matching will be done based on the clock-names, but it makes it easier to validate the device trees against the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add missing TSEC properties on Tegra210Thierry Reding1-0/+11
Add missing interrupts, clocks, clock-names, reset and reset-names properties for the TSEC blocks found on Tegra210. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: jetson-nano: Remove extra PLL power supplies for PCIe and XUSBThierry Reding1-8/+0
The XUSB pad controller handles the various PLL power supplies, so remove any references to them from the PCIe and XUSB controller device tree nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: smaug: Remove extra PLL power supplies for XUSBThierry Reding1-4/+0
The XUSB pad controller handles the various PLL power supplies, so remove any references to them from the XUSB controller device tree node. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: jetson-tx1: Remove extra PLL power supplies for PCIe and XUSBThierry Reding2-8/+0
The XUSB pad controller handles the various PLL power supplies, so remove any references to them from the PCIe and XUSB controller device tree nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename GPIO hog nodes to match schemaThierry Reding1-1/+1
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to the DT schema. Rename all such nodes to allow validation to pass. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Remove unsupported regulator propertiesThierry Reding2-13/+0
Remove the unsupported "regulator-disable-ramp-delay" properties which ended up in various DTS files for some reason. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename TCU node to "serial"Thierry Reding1-1/+1
The TCU is basically a serial port (albeit a fancy one), so it should be named "serial". Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Remove undocumented Tegra194 PCIe "core_m" clockThierry Reding1-3/+2
The "core_m" clock is not documented in the Tegra194 PCIe device tree bindings, so remove it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Drop unused properties for Tegra194 PCIeThierry Reding1-15/+0
The num-viewport property is never used and can be dropped, whereas the "iommus" property is not needed since we use "iommu-map-mask" and "iommu-map" already. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Fix Tegra194 HSP compatible stringThierry Reding1-2/+2
The HSP instances on Tegra194 are not fully compatible with the version found on Tegra186, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Drop unsupported nvidia,lpdr propertyThierry Reding1-2/+0
The Tegra194 pinmux DT bindings do not define the nvidia,lpdr property, so drop them from the device trees that have listed them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Use JEDEC vendor prefix for SPI NOR flash chipsThierry Reding2-2/+2
The standard "jedec," vendor prefix should be used for SPI NOR flash chips. This allows the right DT schema to be picked for validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Drop unit-address for audio card graph endpointsThierry Reding3-7/+7
Audio graph endpoints don't have a "reg" property, so they shouldn't have a unit-address either. Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-09-08 02:00:03 +0000