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2024-08-29ARM: tegra: tf701t: Add Bluetooth nodeSvyatoslav Ryhel1-1/+27
Add serial node along with bluetooth node to ASUS TF701T device-tree. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29ARM: tegra: tf701t: Add HDMI bindingsSvyatoslav Ryhel1-2/+31
Add HDMI nodes to ASUS TF701T device-tree. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29ARM: tegra: tf701t: Correct and complete PMIC and PMC bindingsSvyatoslav Ryhel1-68/+195
Add missing parts of PMIC complex, extend PMC binding and add missing fixed regulators. Additionally, refresh naming to better reflect regulator purpose. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29ARM: tegra: tf701t: Bind VDE deviceSvyatoslav Ryhel1-0/+6
Add Video Decoder Engine node to ASUS TF701T device-tree. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29ARM: tegra: tf701t: Use unimomentary pinmux setupSvyatoslav Ryhel1-108/+993
Mimic original downstream board behavior to set up all pinmux at once. Per-device pinmux is good but we have no complete board schematics to allow such luxury. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29x86/EISA: Dereference memory directly instead of using readl()Maciej W. Rozycki1-2/+2
Sparse expect an __iomem pointer, but after converting the EISA probe to memremap() the pointer is a regular memory pointer. Access it directly instead. [ tglx: Converted it to fix the already applied version ] Fixes: 80a4da05642c ("x86/EISA: Use memremap() to probe for the EISA BIOS signature") Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/alpine.DEB.2.21.2408261015270.30766@angie.orcam.me.uk
2024-08-29Merge patch series "riscv: mm: Do not restrict mmap address based on hint"Palmer Dabbelt1-24/+2
Charlie Jenkins <charlie@rivosinc.com> says: There have been a couple of reports that using the hint address to restrict the address returned by mmap hint address has caused issues in applications. A different solution for restricting addresses returned by mmap is necessary to avoid breakages. [Palmer: This also just wasn't doing the right thing in the first place, as it didn't handle the sv39 cases we were trying to deal with.] * b4-shazam-merge: riscv: mm: Do not restrict mmap address based on hint riscv: selftests: Remove mmap hint address checks Revert "RISC-V: mm: Document mmap changes" Link: https://lore.kernel.org/r/20240826-riscv_mmap-v1-0-cd8962afe47f@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2024-08-29riscv: mm: Do not restrict mmap address based on hintCharlie Jenkins1-24/+2
The hint address should not forcefully restrict the addresses returned by mmap as this causes mmap to report ENOMEM when there is memory still available. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> Fixes: b5b4287accd7 ("riscv: mm: Use hint address in mmap if available") Fixes: add2cc6b6515 ("RISC-V: mm: Restrict address space for sv39,sv48,sv57") Closes: https://lore.kernel.org/linux-kernel/ZbxTNjQPFKBatMq+@ghost/T/#mccb1890466bf5a488c9ce7441e57e42271895765 Link: https://lore.kernel.org/r/20240826-riscv_mmap-v1-3-cd8962afe47f@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2024-08-29arm64: dts: rockchip: add Mask Rom key on NanoPC-T6Marcin Juszkiewicz1-0/+15
Mask Rom key is connected to SARADC and can be read from OS. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-9-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: enable USB-C on NanoPC-T6Marcin Juszkiewicz1-4/+72
Enable the USB-C port on FriendlyELEC NanoPC-T6. Works one way so far but still better than before. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-8-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: enable GPU on NanoPC-T6Marcin Juszkiewicz1-0/+5
Enable the Mali GPU on FriendlyELEC NanoPC-T6 Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-7-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: add IR-receiver to NanoPC-T6Marcin Juszkiewicz1-1/+14
FriendlyELEC NanoPC-T6 has IR receiver connected to PWM3_IR_M0 line which ends as GPIO0_D4. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-6-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: add SPI flash on NanoPC-T6Marcin Juszkiewicz1-0/+15
FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board. It is populated with 32MB one on LTS version. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: add NanoPC-T6 LTSMarcin Juszkiewicz2-0/+61
In the LTS (2310) version the miniPCIe slot got removed and USB 2.0 setup has changed. There are two external accessible ports and two ports on the internal header. There is an on-board USB hub which provides: - one external connector (bottom one) - two internal ports on pin header - one port for m.2 E connector The top USB 2.0 connector comes directly from the SoC. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-4-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: move NanoPC-T6 parts to DTSMarcin Juszkiewicz2-17/+23
MiniPCIe slot is present only in first version of NanoPC-T6 (2301). Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-3-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: prepare NanoPC-T6 for LTS boardMarcin Juszkiewicz2-930/+947
FriendlyELEC introduced a second version of NanoPC-T6 SBC. Create common include file and make NanoPC-T6 use it. Following patches will add LTS version. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-2-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29powerpc/pseries/dlpar: Use helper function for_each_child_of_node()Zhang Zekun1-4/+1
for_each_child_of_node can help to iterate through the device_node, and we don't need to use while loop. No functional change with this conversion. Signed-off-by: Zhang Zekun <zhangzekun11@huawei.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240822085430.25753-3-zhangzekun11@huawei.com
2024-08-29powerpc/powermac/pfunc_base: Use helper function for_each_child_of_node()Zhang Zekun1-1/+1
for_each_child_of_node() can help to iterate through the device_node, and we don't need to do it manually. No functional change with this conversion. Signed-off-by: Zhang Zekun <zhangzekun11@huawei.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240822085430.25753-2-zhangzekun11@huawei.com
2024-08-29powerpc/64s/mm: Move __real_pte stubs into hash-4k.hMichael Ellerman2-26/+20
The stub versions of __real_pte() etc are only used with HPT & 4K pages, so move them into the hash-4k.h header. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240821080729.872034-1-mpe@ellerman.id.au
2024-08-29powerpc/configs/64s: Enable DEFERRED_STRUCT_PAGE_INITMichael Ellerman1-0/+1
It can speed up initialisation of page structs at boot on large machines. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240820065705.660812-1-mpe@ellerman.id.au
2024-08-29arm64: dts: rockchip: Fix compatibles for RK3588 VO{0,1}_GRFCristian Ciocaltea1-3/+3
RK3588 VO0 and VO1 GRFs are not identical (though quite similar in terms of layout) and, therefore, incorrectly shared the compatible string. Since the related binding document has been updated to use dedicated strings, update the compatibles for vo{0,1}_grf DT nodes accordingly. Additionally, for consistency, set the full region size (16KB) for VO1_GRF. Reported-by: Conor Dooley <conor@kernel.org> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240828-rk3588-vo-grf-compat-v2-2-4db2f791593f@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29mips: Remove posix_types.h include from sigcontext.hXi Ruoyao1-1/+0
Nothing in sigcontext.h seems to require anything from linux/posix_types.h. It seems only a relict: in a Linux 2.6.11-rc2 patch [1] the linux/types.h include was unexplainedly changed to a linux/posix_types.h include. I can only assume it was just an error. Finally headers_check complained "found __[us]{8,16,32,64} type without #include <linux/types.h>" and commit ae612fb05b0f ("headers_check fix: mips, sigcontext.h") added back the linux/types.h include, but it didn't remove the posix_types.h include. Remove it now. [1]:https://kernel.org/pub/linux/kernel/people/akpm/patches/2.6/2.6.11-rc2/2.6.11-rc2-mm2/broken-out/mips-generic-mips-updates.patch Signed-off-by: Xi Ruoyao <xry111@xry111.site> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-08-29MIPS: dec: prom: Remove unused unregister_prom_console() declarationGaosheng Cui1-1/+0
The unregister_prom_console() has been removed since commit 36a885306fdf ("[MIPS] Fix and cleanup the mess that a dozen prom_printf variants are."), so remove it. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Acked-by: Maciej W. Rozycki <macro@orcam.me.uk> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-08-29MIPS: Remove unused mips_display/_scroll_message() declarationsGaosheng Cui1-3/+0
The mips_display/_scroll_message() have been removed since commit 0b0037490f37 ("MIPS: malta: Use img-ascii-lcd driver for LCD display"), so remove them. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-08-29MIPS: Remove unused declarations in asm/cmp.hGaosheng Cui1-8/+0
These functions have been removed since commit 7fb6f7b0af67 ("MIPS: Remove deprecated CONFIG_MIPS_CMP"), so remove them. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-08-29MIPS: MT: Remove unused function mips_mt_regdump()Gaosheng Cui2-79/+0
The mips_mt_regdump() has not been used since commit b633648c5ad3 ("MIPS: MT: Remove SMTC support"), so remove it. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Reviewed-by: Ricardo B. Marliere <ricardo@marliere.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-08-29arm64: dts: renesas: r9a07g043u11-smarc: Enable DUBiju Das3-0/+141
Enable the Display Unit and link with the HDMI add-on board connected to the parallel connector on the RZ/G2UL SMARC EVK by using a Device Tree overlay. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20240826101648.176647-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-08-29mips/jazz: remove unused jazz_handle_int() declarationGaosheng Cui1-2/+0
The jazz_handle_int() has been removed since commit e4ac58afdfac ("[MIPS] Rewrite all the assembler interrupt handlers to C."), so remove it. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-08-29arm64: dts: renesas: rzg2lc-smarc: Enable HDMI audioBiju Das2-0/+36
Enable HDMI audio on the RZ/G2LC SMARC EVK. Set SW 1.5 on the SoM module to the OFF position to turn on HDMI audio. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20240826090803.56176-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-08-29arm64: dts: renesas: rzg2l-smarc: Enable HDMI audioBiju Das2-0/+36
Enable HDMI audio on the RZ/{G2L,V2L} SMARC EVK. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20240826090803.56176-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-08-29MIPS: Remove unused function dump_au1000_dma_channel() in dma.cGaosheng Cui2-24/+0
The dump_au1000_dma_channel() has not been used since commit d56b9b9c464a ("[PATCH] The scheduled removal of some OSS drivers"), so remove it. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-08-29MIPS: ralink: Fix missing `get_c0_perfcount_int` prototypeVincent Legoll1-0/+1
Fix the following warning: CC arch/mips/ralink/irq-gic.o arch/mips/ralink/irq-gic.c:15:5: warning: no previous prototype for 'get_c0_perfcount_int' [-Wmissing-prototypes] 15 | int get_c0_perfcount_int(void) | ^~~~~~~~~~~~~~~~~~~~ Signed-off-by: Vincent Legoll <vincent.legoll@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-08-29MIPS: ralink: Fix missing `plat_time_init` prototypeVincent Legoll1-0/+2
Fix the following warning: CC arch/mips/ralink/timer-gic.o arch/mips/ralink/timer-gic.c:18:13: warning: no previous prototype for 'plat_time_init' [-Wmissing-prototypes] 18 | void __init plat_time_init(void) | ^~~~~~~~~~~~~~ Signed-off-by: Vincent Legoll <vincent.legoll@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-08-29powerpc/qspinlock: Fix deadlock in MCS queueNysal Jan K.A.1-1/+9
If an interrupt occurs in queued_spin_lock_slowpath() after we increment qnodesp->count and before node->lock is initialized, another CPU might see stale lock values in get_tail_qnode(). If the stale lock value happens to match the lock on that CPU, then we write to the "next" pointer of the wrong qnode. This causes a deadlock as the former CPU, once it becomes the head of the MCS queue, will spin indefinitely until it's "next" pointer is set by its successor in the queue. Running stress-ng on a 16 core (16EC/16VP) shared LPAR, results in occasional lockups similar to the following: $ stress-ng --all 128 --vm-bytes 80% --aggressive \ --maximize --oomable --verify --syslog \ --metrics --times --timeout 5m watchdog: CPU 15 Hard LOCKUP ...... NIP [c0000000000b78f4] queued_spin_lock_slowpath+0x1184/0x1490 LR [c000000001037c5c] _raw_spin_lock+0x6c/0x90 Call Trace: 0xc000002cfffa3bf0 (unreliable) _raw_spin_lock+0x6c/0x90 raw_spin_rq_lock_nested.part.135+0x4c/0xd0 sched_ttwu_pending+0x60/0x1f0 __flush_smp_call_function_queue+0x1dc/0x670 smp_ipi_demux_relaxed+0xa4/0x100 xive_muxed_ipi_action+0x20/0x40 __handle_irq_event_percpu+0x80/0x240 handle_irq_event_percpu+0x2c/0x80 handle_percpu_irq+0x84/0xd0 generic_handle_irq+0x54/0x80 __do_irq+0xac/0x210 __do_IRQ+0x74/0xd0 0x0 do_IRQ+0x8c/0x170 hardware_interrupt_common_virt+0x29c/0x2a0 --- interrupt: 500 at queued_spin_lock_slowpath+0x4b8/0x1490 ...... NIP [c0000000000b6c28] queued_spin_lock_slowpath+0x4b8/0x1490 LR [c000000001037c5c] _raw_spin_lock+0x6c/0x90 --- interrupt: 500 0xc0000029c1a41d00 (unreliable) _raw_spin_lock+0x6c/0x90 futex_wake+0x100/0x260 do_futex+0x21c/0x2a0 sys_futex+0x98/0x270 system_call_exception+0x14c/0x2f0 system_call_vectored_common+0x15c/0x2ec The following code flow illustrates how the deadlock occurs. For the sake of brevity, assume that both locks (A and B) are contended and we call the queued_spin_lock_slowpath() function. CPU0 CPU1 ---- ---- spin_lock_irqsave(A) | spin_unlock_irqrestore(A) | spin_lock(B) | | | ▼ | id = qnodesp->count++; | (Note that nodes[0].lock == A) | | | ▼ | Interrupt | (happens before "nodes[0].lock = B") | | | ▼ | spin_lock_irqsave(A) | | | ▼ | id = qnodesp->count++ | nodes[1].lock = A | | | ▼ | Tail of MCS queue | | spin_lock_irqsave(A) ▼ | Head of MCS queue ▼ | CPU0 is previous tail ▼ | Spin indefinitely ▼ (until "nodes[1].next != NULL") prev = get_tail_qnode(A, CPU0) | ▼ prev == &qnodes[CPU0].nodes[0] (as qnodes[CPU0].nodes[0].lock == A) | ▼ WRITE_ONCE(prev->next, node) | ▼ Spin indefinitely (until nodes[0].locked == 1) Thanks to Saket Kumar Bhaskar for help with recreating the issue Fixes: 84990b169557 ("powerpc/qspinlock: add mcs queueing for contended waiters") Cc: stable@vger.kernel.org # v6.2+ Reported-by: Geetika Moolchandani <geetika@linux.ibm.com> Reported-by: Vaishnavi Bhat <vaish123@in.ibm.com> Reported-by: Jijo Varghese <vargjijo@in.ibm.com> Signed-off-by: Nysal Jan K.A. <nysal@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240829022830.1164355-1-nysal@linux.ibm.com
2024-08-29arm64: mm: fix DMA zone when dma-ranges is missingBaruch Siach1-0/+3
Some platforms, like Rockchip RK3568 based Odroid M1, do not provide DMA limits information in device-tree dma-ranges property. Still some device drivers set DMA limit that relies on DMA zone at low 4GB memory area. Until commit ba0fb44aed47 ("dma-mapping: replace zone_dma_bits by zone_dma_limit"), zone_sizes_init() restricted DMA zone to low 32-bit. Restore DMA zone 32-bit limit when the platform provides no DMA bus limit information. Fixes: ba0fb44aed47 ("dma-mapping: replace zone_dma_bits by zone_dma_limit") Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/53d988b1-bdce-422a-ae4e-158f305ad703@samsung.com Suggested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
2024-08-28Merge tag 'qcom-arm64-fixes-for-6.11' of ↵Arnd Bergmann6-35/+209
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm Arm64 DeviceTree fixes for v6.11 On X1E the GPU node is disabled by default, to be enabled in the individual devices once the developers install the required firmware. The generic EDP panel driver used on the X1E CRD is replaced with the Samsung ATNA45AF01 driver, in order to ensure backlight is brought back up after being turned off. The pin configuration for PCIe-related pins are corrected across all the X1E targets. The PCIe controllers gain a minimum OPP vote, and PCIe domain numbers are corrected. WiFi calibration variant information is added to the Lenovo Yoga Slim 7x, to pick the right data from the firmware packages. The incorrect Adreno SMMU global interrupt is corrected. For IPQ5332, the IRQ triggers for the USB controller are corrected. * tag 'qcom-arm64-fixes-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits) arm64: dts: qcom: x1e80100: Fix Adreno SMMU global interrupt arm64: dts: qcom: disable GPU on x1e80100 by default arm64: dts: qcom: x1e80100-crd: Fix backlight arm64: dts: qcom: x1e80100-yoga-slim7x: fix missing PCIe4 gpios arm64: dts: qcom: x1e80100-yoga-slim7x: disable PCIe6a perst pull down arm64: dts: qcom: x1e80100-yoga-slim7x: fix up PCIe6a pinctrl node arm64: dts: qcom: x1e80100-yoga-slim7x: fix PCIe4 PHY supply arm64: dts: qcom: x1e80100-vivobook-s15: fix missing PCIe4 gpios arm64: dts: qcom: x1e80100-vivobook-s15: disable PCIe6a perst pull down arm64: dts: qcom: x1e80100-vivobook-s15: fix up PCIe6a pinctrl node arm64: dts: qcom: x1e80100-vivobook-s15: fix PCIe4 PHY supply arm64: dts: qcom: x1e80100-qcp: fix missing PCIe4 gpios arm64: dts: qcom: x1e80100-qcp: disable PCIe6a perst pull down arm64: dts: qcom: x1e80100-qcp: fix up PCIe6a pinctrl node arm64: dts: qcom: x1e80100-qcp: fix PCIe4 PHY supply arm64: dts: qcom: x1e80100-crd: fix missing PCIe4 gpios arm64: dts: qcom: x1e80100-crd: disable PCIe6a perst pull down arm64: dts: qcom: x1e80100-crd: fix up PCIe6a pinctrl node arm64: dts: qcom: x1e80100: add missing PCIe minimum OPP arm64: dts: qcom: x1e80100: fix PCIe domain numbers ... Link: https://lore.kernel.org/r/20240826152426.1648383-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-08-28Merge tag 'qcom-arm64-defconfig-fixes-for-6.11' of ↵Arnd Bergmann1-0/+1
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm Arm64 defconfig fix for 6.11 Enable the Samsung ATNA33XC20 display panel driver, as we switched from the generic EDP panel for some of the X1E devices in v6.11. * tag 'qcom-arm64-defconfig-fixes-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: defconfig: Add CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 Link: https://lore.kernel.org/r/20240826145736.1646729-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-08-28Merge tag 'imx-fixes-6.11' of ↵Arnd Bergmann14-34/+33
https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 6.11: - One imx8mp-beacon-kit change from Adam Ford to fix the broken WM8962 audio support - One pinctrl property typo fix for imx8mm-phygate - One layerscape fix from Krzysztof Kozlowski to get thermal nodes correct name length - A couple of imx93-tqma9352 fixes from Markus Niebel, one on CMA alloc-ranges and the other on SD-Card cd-gpios typo - One change from Michal Vokáč to fix imx6dl-yapp43 LED current to match the HW design - A couple of imx95 fixes from Peng Fan, one to correct a55 power domains and the other to correct L3Cache cache-sets - One tqma9352 watchdog reset fix from Sascha Hauer - One imx93 change from Shenwei Wang to fix the default value for STMMAC EQOS snps,clk-csr * tag 'imx-fixes-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: imx8mm-phygate: fix typo pinctrcl-0 arm64: dts: imx95: correct L3Cache cache-sets arm64: dts: imx95: correct a55 power-domains arm64: dts: freescale: imx93-tqma9352-mba93xxla: fix typo arm64: dts: freescale: imx93-tqma9352: fix CMA alloc-ranges ARM: dts: imx6dl-yapp43: Increase LED current to match the yapp4 HW design arm64: dts: imx93: update default value for snps,clk-csr arm64: dts: freescale: tqma9352: Fix watchdog reset arm64: dts: imx8mp-beacon-kit: Fix Stereo Audio on WM8962 arm64: dts: layerscape: fix thermal node names length Link: https://lore.kernel.org/r/ZrtsTO1+jXhJ6GSM@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-08-28Merge tag 'omap-for-v6.11/fixes-signed' of ↵Arnd Bergmann1-1/+1
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into arm/fixes OMAP fixes for v6.11-rc - omap3-n900: fix accelerometer orientation * tag 'omap-for-v6.11/fixes-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap: ARM: dts: omap3-n900: correct the accelerometer orientation Link: https://lore.kernel.org/r/7h4j7eyhyh.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-08-28arm64: dts: ti: k3-am62a: Add E5010 JPEG EncoderDevarsh Thakkar2-0/+12
This adds node for E5010 JPEG Encoder which is a stateful JPEG Encoder present in AM62A SoC [1], supporting baseline encoding of semiplanar based YUV420 and YUV422 raw video formats to JPEG encoding, with resolutions supported from 64x64 to 8kx8k. E5010 JPEG Encoder IP is present in main domain, so this also adds address range for core and mmu regions of E5010 IP in cbass_main node. Link: https://www.ti.com/lit/pdf/spruj16 [1] Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Link: https://lore.kernel.org/r/20240826162250.380005-2-devarsht@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28arm64: dts: ti: k3-j722s-evm: Add support for multiple CAN instancesBhavya Kapoor1-0/+74
CAN instances 0 and 1 in the mcu domain and 0 in the main domain are brought on the evm through headers J5, J8 and J10 respectively. Thus, add their respective transceiver's 0, 1 and 2 dt nodes as well as add the required pinmux to add support for these CAN instances. Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Reviewed-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240827105644.575862-2-b-kapoor@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28arm64: dts: ti: k3-j722s-evm: Describe main_uart5Bhavya Kapoor1-0/+15
System firmware uses main_uart5 in J722S EVM for trace data. Thus, describe it in device tree for completeness, adding the pinmux and mark it as reserved. Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240827105644.575862-3-b-kapoor@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28arm64: dts: ti: k3-am62p5-sk: Remove CTS/RTS from wkup_uart0 pinctrlVibhore Vardhan1-2/+0
wkup_uart0 is a reserved node that is used by Device Manager firmware. Only TX and RX pins are required for the firmware and enabling pinctrl for CTS and RTS breaks the wakeup functionality of wkup_uart0. Drop the conflicting muxes. Signed-off-by: Vibhore Vardhan <vibhore@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20240826-am62p-v1-1-b713b48628d1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28arm64: dts: ti: k3-am69-sk: Change timer nodes status to reservedBeleswar Padhi1-0/+41
The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain use timers. Therefore, change the status of the timer nodes to "reserved" to avoid any clash. Usage is described as below: +===================+=============+ | Remoteproc node | Timer Node | +===================+=============+ | main_r5fss0_core0 | main_timer4 | +-------------------+-------------+ | main_r5fss0_core1 | main_timer5 | +-------------------+-------------+ | main_r5fss1_core0 | main_timer6 | +-------------------+-------------+ | main_r5fss1_core1 | main_timer7 | +-------------------+-------------+ | main_r5fss2_core0 | main_timer8 | +-------------------+-------------+ | main_r5fss2_core1 | main_timer9 | +-------------------+-------------+ | c71_0 | main_timer0 | +-------------------+-------------+ | c71_1 | main_timer1 | +-------------------+-------------+ | c71_2 | main_timer2 | +-------------------+-------------+ | c71_3 | main_timer3 | +-------------------+-------------+ Signed-off-by: Beleswar Padhi <b-padhi@ti.com> Link: https://lore.kernel.org/r/20240826104821.1516344-8-b-padhi@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28arm64: dts: ti: k3-j784s4-evm: Change timer nodes status to reservedBeleswar Padhi1-0/+41
The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain use timers. Therefore, change the status of the timer nodes to "reserved" to avoid any clash. Usage is described as below: +===================+=============+ | Remoteproc node | Timer Node | +===================+=============+ | main_r5fss0_core0 | main_timer4 | +-------------------+-------------+ | main_r5fss0_core1 | main_timer5 | +-------------------+-------------+ | main_r5fss1_core0 | main_timer6 | +-------------------+-------------+ | main_r5fss1_core1 | main_timer7 | +-------------------+-------------+ | main_r5fss2_core0 | main_timer8 | +-------------------+-------------+ | main_r5fss2_core1 | main_timer9 | +-------------------+-------------+ | c71_0 | main_timer0 | +-------------------+-------------+ | c71_1 | main_timer1 | +-------------------+-------------+ | c71_2 | main_timer2 | +-------------------+-------------+ | c71_3 | main_timer3 | +-------------------+-------------+ Signed-off-by: Beleswar Padhi <b-padhi@ti.com> Link: https://lore.kernel.org/r/20240826104821.1516344-7-b-padhi@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28arm64: dts: ti: k3-am68-sk-som: Change timer nodes status to reservedBeleswar Padhi1-0/+25
The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain use timers. Therefore, change the status of the timer nodes to "reserved" to avoid any clash. Usage is described as below: +===================+=============+ | Remoteproc node | Timer Node | +===================+=============+ | main_r5fss0_core0 | main_timer2 | +-------------------+-------------+ | main_r5fss0_core1 | main_timer3 | +-------------------+-------------+ | main_r5fss1_core0 | main_timer4 | +-------------------+-------------+ | main_r5fss1_core1 | main_timer5 | +-------------------+-------------+ | c71_0 | main_timer0 | +-------------------+-------------+ | c71_1 | main_timer1 | +-------------------+-------------+ Signed-off-by: Beleswar Padhi <b-padhi@ti.com> Link: https://lore.kernel.org/r/20240826104821.1516344-6-b-padhi@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28arm64: dts: ti: k3-j721s2-som-p0: Change timer nodes status to reservedBeleswar Padhi1-0/+25
The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain use timers. Therefore, change the status of the timer nodes to "reserved" to avoid any clash. Usage is described as below: +===================+=============+ | Remoteproc node | Timer Node | +===================+=============+ | main_r5fss0_core0 | main_timer2 | +-------------------+-------------+ | main_r5fss0_core1 | main_timer3 | +-------------------+-------------+ | main_r5fss1_core0 | main_timer4 | +-------------------+-------------+ | main_r5fss1_core1 | main_timer5 | +-------------------+-------------+ | c71_0 | main_timer0 | +-------------------+-------------+ | c71_1 | main_timer1 | +-------------------+-------------+ Signed-off-by: Beleswar Padhi <b-padhi@ti.com> Link: https://lore.kernel.org/r/20240826104821.1516344-5-b-padhi@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28arm64: dts: ti: k3-j721e-sk: Change timer nodes status to reservedBeleswar Padhi1-0/+29
The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain use timers. Therefore, change the status of the timer nodes to "reserved" to avoid any clash. Usage is described as below: +===================+==============+ | Remoteproc node | Timer Node | +===================+==============+ | main_r5fss0_core0 | main_timer12 | +-------------------+--------------+ | main_r5fss0_core1 | main_timer13 | +-------------------+--------------+ | main_r5fss1_core0 | main_timer14 | +-------------------+--------------+ | main_r5fss1_core1 | main_timer15 | +-------------------+--------------+ | c66_0 | main_timer0 | +-------------------+--------------+ | c66_1 | main_timer1 | +-------------------+--------------+ | c71_0 | main_timer2 | +-------------------+--------------+ Signed-off-by: Beleswar Padhi <b-padhi@ti.com> Link: https://lore.kernel.org/r/20240826104821.1516344-4-b-padhi@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28arm64: dts: ti: k3-j721e-som-p0: Change timer nodes status to reservedBeleswar Padhi1-0/+29
The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain use timers. Therefore, change the status of the timer nodes to "reserved" to avoid any clash. Usage is described as below: +===================+==============+ | Remoteproc node | Timer Node | +===================+==============+ | main_r5fss0_core0 | main_timer12 | +-------------------+--------------+ | main_r5fss0_core1 | main_timer13 | +-------------------+--------------+ | main_r5fss1_core0 | main_timer14 | +-------------------+--------------+ | main_r5fss1_core1 | main_timer15 | +-------------------+--------------+ | c66_0 | main_timer0 | +-------------------+--------------+ | c66_1 | main_timer1 | +-------------------+--------------+ | c71_0 | main_timer2 | +-------------------+--------------+ Signed-off-by: Beleswar Padhi <b-padhi@ti.com> Link: https://lore.kernel.org/r/20240826104821.1516344-3-b-padhi@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28arm64: dts: ti: k3-j7200-som-p0: Change timer nodes status to reservedBeleswar Padhi1-0/+13
The remoteproc firmware of R5F in the MAIN voltage domain use timers. Therefore, change the status of the timer nodes to "reserved" to avoid any clash. Usage is described as below: +===================+==========================+ | Remoteproc node | Timer Node | +===================+==========================+ | main_r5fss0_core0 | main_timer0, main_timer2 | +-------------------+--------------------------+ | main_r5fss0_core1 | main_timer1 | +-------------------+--------------------------+ Signed-off-by: Beleswar Padhi <b-padhi@ti.com> Link: https://lore.kernel.org/r/20240826104821.1516344-2-b-padhi@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-04-03 06:17:46 +0000