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2025-03-18i2c: axxia: Use i2c_10bit_addr_*_from_msg() helpersAndy Shevchenko1-18/+3
Use i2c_10bit_addr_*_from_msg() helpers instead of local copy. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20250213141045.2716943-3-andriy.shevchenko@linux.intel.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-03-18i2c: qup: Vote for interconnect bandwidth to DRAMStephan Gerhold1-0/+36
When the I2C QUP controller is used together with a DMA engine it needs to vote for the interconnect path to the DRAM. Otherwise it may be unable to access the memory quickly enough. The requested peak bandwidth is dependent on the I2C core clock. To avoid sending votes too often the bandwidth is always requested when a DMA transfer starts, but dropped only on runtime suspend. Runtime suspend should only happen if no transfer is active. After resumption we can defer the next vote until the first DMA transfer actually happens. The implementation is largely identical to the one introduced for spi-qup in commit ecdaa9473019 ("spi: qup: Vote for interconnect bandwidth to DRAM") since both drivers represent the same hardware block. Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20231128-i2c-qup-dvfs-v1-3-59a0e3039111@kernkonzept.com
2025-03-18i2c: amd-asf: Set cmd variable when encountering an errorShyam Sundar S K1-1/+1
In the event of ASF error during the transfer, update the cmd and exit the process, as data processing is not performed when a command fails. Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250217090258.398540-2-Shyam-sundar.S-k@amd.com
2025-03-18i2c: amd-asf: Modify callbacks of i2c_algorithm to align with the latest ↵Shyam Sundar S K1-3/+3
revision Adjust the i2c_algorithm callbacks to be consistent with the most recent revision by updating the callback names from master_xfer, reg_slave, and unreg_slave to the current naming convention: xfer, reg_target, and unreg_target. Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250217090258.398540-1-Shyam-sundar.S-k@amd.com
2025-03-18i2c: dw: Update the master_xfer callback nameShyam Sundar S K1-1/+1
In light of the recent updates to the i2c subsystem, ensure to use the correct callback names. Specifically, replace '.master_xfer' with '.xfer'. Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250217124709.3121848-2-Shyam-sundar.S-k@amd.com
2025-03-18i2c: amd: Switch to guard(mutex)Shyam Sundar S K1-17/+9
Instead of using the 'goto label; mutex_unlock()' pattern use 'guard(mutex)' which will release the mutex when it goes out of scope. Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250217124709.3121848-1-Shyam-sundar.S-k@amd.com
2025-03-18i2c: pxa: fix call balance of i2c->clk handling routinesVitalii Mordan1-1/+4
If the clock i2c->clk was not enabled in i2c_pxa_probe(), it should not be disabled in any path. Found by Linux Verification Center (linuxtesting.org) with Klever. Signed-off-by: Vitalii Mordan <mordan@ispras.ru> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250212172803.1422136-1-mordan@ispras.ru
2025-03-18i2c: octeon: refactor common i2c operationsAryan Srivastava1-37/+49
Refactor the current implementation of the high-level composite read and write operations in preparation of the addition of block-mode read/write operations. The sending of the i2c command is generic and will apply for both the block-mode and non-block-mode ops. Extract this from the current hlc ops, and place into a generic function, octeon_i2c_hlc_cmd_send. The considerations made for extended addresses in the command construction are almost common for all cases, extract these into octeon_i2c_hlc_ext. There is one difference between the extended read and write cases. When performing extended read or writes the SW_TWSI_EXT must be written with an extended internal address, but the data field is only filled in the write case (read back in read case). This results in the original code block for the read case immediately writing this register, while the write case fills in any data and then writes the register. To create a common block of code for both processes remove the SW_TWSI_EXT write from within the code block and instead in it's place a variable is set, set_ext, which is returned and used as a condition to do the register write, in the read command case. There are parts of the commands construction which are common (only in the read case), extract this and place into generic function octeon_i2c_hlc_read_cmd. This function also reads the return from octeon_i2c_hlc_ext and completes the write to SW_TWSI_EXT if required. The write commands cannot be made entirely into common code as there are distinct differences in the block mode and non-block-mode process. Particularly the writing of data into the buffer. Signed-off-by: Aryan Srivastava <aryan.srivastava@alliedtelesis.co.nz> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20241010025317.2040470-2-aryan.srivastava@alliedtelesis.co.nz
2025-03-12i2c: sis630: Fix an error handling path in sis630_probe()Christophe JAILLET1-1/+11
If i2c_add_adapter() fails, the request_region() call in sis630_setup() must be undone by a corresponding release_region() call, as done in the remove function. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/3d607601f2c38e896b10207963c6ab499ca5c307.1741033587.git.christophe.jaillet@wanadoo.fr Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-03-12i2c: ali15x3: Fix an error handling path in ali15x3_probe()Christophe JAILLET1-1/+11
If i2c_add_adapter() fails, the request_region() call in ali15x3_setup() must be undone by a corresponding release_region() call, as done in the remove function. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/9b2090cbcc02659f425188ea05f2e02745c4e67b.1741031878.git.christophe.jaillet@wanadoo.fr
2025-03-12i2c: ali1535: Fix an error handling path in ali1535_probe()Christophe JAILLET1-1/+11
If i2c_add_adapter() fails, the request_region() call in ali1535_setup() must be undone by a corresponding release_region() call, as done in the remove function. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/0daf63d7a2ce74c02e2664ba805bbfadab7d25e5.1741031571.git.christophe.jaillet@wanadoo.fr
2025-03-12i2c: omap: fix IRQ stormsAndreas Kemnade1-19/+7
On the GTA04A5 writing a reset command to the gyroscope causes IRQ storms because NACK IRQs are enabled and therefore triggered but not acked. Sending a reset command to the gyroscope by i2cset 1 0x69 0x14 0xb6 with an additional debug print in the ISR (not the thread) itself causes [ 363.353515] i2c i2c-1: ioctl, cmd=0x720, arg=0xbe801b00 [ 363.359039] omap_i2c 48072000.i2c: addr: 0x0069, len: 2, flags: 0x0, stop: 1 [ 363.366180] omap_i2c 48072000.i2c: IRQ LL (ISR = 0x1110) [ 363.371673] omap_i2c 48072000.i2c: IRQ (ISR = 0x0010) [ 363.376892] omap_i2c 48072000.i2c: IRQ LL (ISR = 0x0102) [ 363.382263] omap_i2c 48072000.i2c: IRQ LL (ISR = 0x0102) [ 363.387664] omap_i2c 48072000.i2c: IRQ LL (ISR = 0x0102) repeating till infinity [...] (0x2 = NACK, 0x100 = Bus free, which is not enabled) Apparently no other IRQ bit gets set, so this stalls. Do not ignore enabled interrupts and make sure they are acked. If the NACK IRQ is not needed, it should simply not enabled, but according to the above log, caring about it is necessary unless the Bus free IRQ is enabled and handled. The assumption that is will always come with a ARDY IRQ, which was the idea behind ignoring it, proves wrong. It is true for simple reads from an unused address. To still avoid the i2cdetect trouble which is the reason for commit c770657bd261 ("i2c: omap: Fix standard mode false ACK readings"), avoid doing much about NACK in omap_i2c_xfer_data() which is used by both IRQ mode and polling mode, so also the false detection fix is extended to polling usage and IRQ storms are avoided. By changing this, the hardirq handler is not needed anymore to filter stuff. The mentioned gyro reset now just causes a -ETIMEDOUT instead of hanging the system. Fixes: c770657bd261 ("i2c: omap: Fix standard mode false ACK readings"). CC: stable@kernel.org Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Tested-by: Nishanth Menon <nm@ti.com> Reviewed-by: Aniket Limaye <a-limaye@ti.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250228140420.379498-1-andreas@kemnade.info
2025-02-26i2c: amd-asf: Fix EOI register write to enable successive interruptsShyam Sundar S K1-0/+1
The commit b1f8921dfbaa ("i2c: amd-asf: Clear remote IRR bit to get successive interrupt") introduced a method to enable successive interrupts but inadvertently omitted the necessary write to the EOI register, resulting in a failure to receive successive interrupts. Fix this by adding the required write to the EOI register. Fixes: b1f8921dfbaa ("i2c: amd-asf: Clear remote IRR bit to get successive interrupt") Cc: stable@vger.kernel.org # v6.13+ Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Fixes: 9b25419ad397 ("i2c: amd-asf: Add routine to handle the ASF slave process") Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250219135747.3251182-1-Shyam-sundar.S-k@amd.com
2025-02-26i2c: ls2x: Fix frequency division register accessBinbin Zhou1-4/+12
According to the chip manual, the I2C register access type of Loongson-2K2000/LS7A is "B", so we can only access registers in byte form (readb()/writeb()). Although Loongson-2K0500/Loongson-2K1000 do not have similar constraints, register accesses in byte form also behave correctly. Also, in hardware, the frequency division registers are defined as two separate registers (high 8-bit and low 8-bit), so we just access them directly as bytes. Fixes: 015e61f0bffd ("i2c: ls2x: Add driver for Loongson-2K/LS7A I2C controller") Co-developed-by: Hongliang Wang <wanghongliang@loongson.cn> Signed-off-by: Hongliang Wang <wanghongliang@loongson.cn> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Cc: stable@vger.kernel.org # v6.3+ Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250220125612.1910990-1-zhoubinbin@loongson.cn
2025-02-26i2c: npcm: disable interrupt enable bit before devm_request_irqTyrone Ting1-0/+7
The customer reports that there is a soft lockup issue related to the i2c driver. After checking, the i2c module was doing a tx transfer and the bmc machine reboots in the middle of the i2c transaction, the i2c module keeps the status without being reset. Due to such an i2c module status, the i2c irq handler keeps getting triggered since the i2c irq handler is registered in the kernel booting process after the bmc machine is doing a warm rebooting. The continuous triggering is stopped by the soft lockup watchdog timer. Disable the interrupt enable bit in the i2c module before calling devm_request_irq to fix this issue since the i2c relative status bit is read-only. Here is the soft lockup log. [ 28.176395] watchdog: BUG: soft lockup - CPU#0 stuck for 26s! [swapper/0:1] [ 28.183351] Modules linked in: [ 28.186407] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.15.120-yocto-s-dirty-bbebc78 #1 [ 28.201174] pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 28.208128] pc : __do_softirq+0xb0/0x368 [ 28.212055] lr : __do_softirq+0x70/0x368 [ 28.215972] sp : ffffff8035ebca00 [ 28.219278] x29: ffffff8035ebca00 x28: 0000000000000002 x27: ffffff80071a3780 [ 28.226412] x26: ffffffc008bdc000 x25: ffffffc008bcc640 x24: ffffffc008be50c0 [ 28.233546] x23: ffffffc00800200c x22: 0000000000000000 x21: 000000000000001b [ 28.240679] x20: 0000000000000000 x19: ffffff80001c3200 x18: ffffffffffffffff [ 28.247812] x17: ffffffc02d2e0000 x16: ffffff8035eb8b40 x15: 00001e8480000000 [ 28.254945] x14: 02c3647e37dbfcb6 x13: 02c364f2ab14200c x12: 0000000002c364f2 [ 28.262078] x11: 00000000fa83b2da x10: 000000000000b67e x9 : ffffffc008010250 [ 28.269211] x8 : 000000009d983d00 x7 : 7fffffffffffffff x6 : 0000036d74732434 [ 28.276344] x5 : 00ffffffffffffff x4 : 0000000000000015 x3 : 0000000000000198 [ 28.283476] x2 : ffffffc02d2e0000 x1 : 00000000000000e0 x0 : ffffffc008bdcb40 [ 28.290611] Call trace: [ 28.293052] __do_softirq+0xb0/0x368 [ 28.296625] __irq_exit_rcu+0xe0/0x100 [ 28.300374] irq_exit+0x14/0x20 [ 28.303513] handle_domain_irq+0x68/0x90 [ 28.307440] gic_handle_irq+0x78/0xb0 [ 28.311098] call_on_irq_stack+0x20/0x38 [ 28.315019] do_interrupt_handler+0x54/0x5c [ 28.319199] el1_interrupt+0x2c/0x4c [ 28.322777] el1h_64_irq_handler+0x14/0x20 [ 28.326872] el1h_64_irq+0x74/0x78 [ 28.330269] __setup_irq+0x454/0x780 [ 28.333841] request_threaded_irq+0xd0/0x1b4 [ 28.338107] devm_request_threaded_irq+0x84/0x100 [ 28.342809] npcm_i2c_probe_bus+0x188/0x3d0 [ 28.346990] platform_probe+0x6c/0xc4 [ 28.350653] really_probe+0xcc/0x45c [ 28.354227] __driver_probe_device+0x8c/0x160 [ 28.358578] driver_probe_device+0x44/0xe0 [ 28.362670] __driver_attach+0x124/0x1d0 [ 28.366589] bus_for_each_dev+0x7c/0xe0 [ 28.370426] driver_attach+0x28/0x30 [ 28.373997] bus_add_driver+0x124/0x240 [ 28.377830] driver_register+0x7c/0x124 [ 28.381662] __platform_driver_register+0x2c/0x34 [ 28.386362] npcm_i2c_init+0x3c/0x5c [ 28.389937] do_one_initcall+0x74/0x230 [ 28.393768] kernel_init_freeable+0x24c/0x2b4 [ 28.398126] kernel_init+0x28/0x130 [ 28.401614] ret_from_fork+0x10/0x20 [ 28.405189] Kernel panic - not syncing: softlockup: hung tasks [ 28.411011] SMP: stopping secondary CPUs [ 28.414933] Kernel Offset: disabled [ 28.418412] CPU features: 0x00000000,00000802 [ 28.427644] Rebooting in 20 seconds.. Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver") Signed-off-by: Tyrone Ting <kfting@nuvoton.com> Cc: <stable@vger.kernel.org> # v5.8+ Reviewed-by: Tali Perry <tali.perry1@gmail.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250220040029.27596-2-kfting@nuvoton.com
2025-02-18i2c: Switch to use hrtimer_setup()Nam Cao1-2/+2
hrtimer_setup() takes the callback function pointer as argument and initializes the timer completely. Replace hrtimer_init() and the open coded initialization of hrtimer::function with the new setup mechanism. Patch was created by using Coccinelle. Signed-off-by: Nam Cao <namcao@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Zack Rusin <zack.rusin@broadcom.com> Link: https://lore.kernel.org/all/6a0d31244560b76cc7e76954bf68dbe14a4761e3.1738746904.git.namcao@linutronix.de
2025-01-30Merge tag 'i2c-for-6.14-rc1-take2' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c fixes from Wolfram Sang: - add a missing Kconfig dependency for imx-lpi2c - in the core, handle the new per-client debugfs directory during probe/remove, not during {un}register * tag 'i2c-for-6.14-rc1-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: Fix core-managed per-client debugfs handling i2c: imx-lpi2c: select CONFIG_I2C_SLAVE
2025-01-26i2c: imx-lpi2c: select CONFIG_I2C_SLAVEArnd Bergmann1-0/+1
The addition of target mode causes a build failure when CONFIG_I2C_SLAVE is turned off: drivers/i2c/busses/i2c-imx-lpi2c.c:1273:10: error: 'const struct i2c_algorithm' has no member named 'reg_target' 1273 | .reg_target = lpi2c_imx_register_target, | ^~~~~~~~~~ drivers/i2c/busses/i2c-imx-lpi2c.c:1274:10: error: 'const struct i2c_algorithm' has no member named 'unreg_target' 1274 | .unreg_target = lpi2c_imx_unregister_target, | ^~~~~~~~~~~~ Select the Kconfig symbol like we do for other similar drivers. Fixes: 1ee867e465c1 ("i2c: imx-lpi2c: add target mode support") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Carlos Song <carlos.song@nxp.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-24Merge tag 'platform-drivers-x86-v6.14-1' of ↵Linus Torvalds1-125/+0
git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 Pull x86 platform driver updates from Ilpo Järvinen: "acer-wmi: - Add support for PH14-51, PH16-72, and Nitro AN515-58 - Add proper hwmon support - Improve error handling when reading "gaming system info" - Replace direct EC reads for the current platform profile with WMI calls to handle EC address variations - Replace custom platform_profile cycling with the generic one ACPI: - platform_profile: Major refactoring and improvements - Support registering multiple platform_profile handlers concurrently to avoid the need to quirk which handler takes precedence - Support reporting "custom" profile for cases where the current profile is ambiguous or when settings tweaks are done outside the pre-defined profile - Abstract and layer platform_profile API better using the class_dev and drvdata - Various minor improvements - Add Documentation and kerneldoc amd/hsmp: - Add support for HSMP protocol v7 amd/pmc: - Support AMD 1Ah family 70h - Support STB with Ryzen desktop SoCs amd/pmf: - Support Custom BIOS inputs for PMF TA - Support passing SRA sensor data from AMD SFH (HID) to PMF TA dell-smo8800: - Move SMO88xx quirk away from the generic i2c-i801 driver - Add accelerometer support for Dell Latitude E6330/E6430 and XPS 9550 - Support probing accelerometer for models yet to be listed in the DMI mapping table because ACPI lacks i2c-address for the accelerometer (behind a module parameter because probing might be dangerous) HID: - amd_sfh: Add support for exporting SRA sensor data hp-wmi: - Add fan and thermal support for Victus 16-s1000 input: - Add key for phone linking - i8042: Add context for the i8042 filter to enable cleaning up the filter related global variables from pdx86 drivers lenovo-wmi-camera: - Use SW_CAMERA_LENS_COVER instead of KEY_CAMERA_ACCESS mellanox mlxbf-pmc: - Add support for monitoring cycle count - Add Documentation thinkpad_acpi: - Add support for phone link key tools/power/x86/intel-speed-select: - Fix Turbo Ratio Limit restore x86-android-tables: - Add support for Vexia EDU ATLA 10 Bluetooth and EC battery driver And miscellaneous cleanups / refactoring / improvements" * tag 'platform-drivers-x86-v6.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (133 commits) platform/x86: acer-wmi: Fix initialization of last_non_turbo_profile platform/x86: acer-wmi: Ignore AC events platform/mellanox: mlxreg-io: use sysfs_emit() instead of sprintf() platform/mellanox: mlxreg-hotplug: use sysfs_emit() instead of sprintf() platform/mellanox: mlxbf-bootctl: use sysfs_emit() instead of sprintf() platform/x86: hp-wmi: Add fan and thermal profile support for Victus 16-s1000 ACPI: platform_profile: Add a prefix to log messages ACPI: platform_profile: Add documentation ACPI: platform_profile: Clean platform_profile_handler ACPI: platform_profile: Move platform_profile_handler ACPI: platform_profile: Remove platform_profile_handler from exported symbols platform/x86: thinkpad_acpi: Use devm_platform_profile_register() platform/x86: inspur_platform_profile: Use devm_platform_profile_register() platform/x86: hp-wmi: Use devm_platform_profile_register() platform/x86: ideapad-laptop: Use devm_platform_profile_register() platform/x86: dell-pc: Use devm_platform_profile_register() platform/x86: asus-wmi: Use devm_platform_profile_register() platform/x86: amd: pmf: sps: Use devm_platform_profile_register() platform/x86: acer-wmi: Use devm_platform_profile_register() platform/surface: surface_platform_profile: Use devm_platform_profile_register() ...
2025-01-22Merge tag 'i2c-for-6.14-rc1' of ↵Linus Torvalds16-379/+1621
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: "Core: - list-based mechanisms for handling auto-detected and userspace created clients are replaced with a flag-based approach. The resulting code is much simpler as well as the locking. - i2c clients now get a default debugfs dir managed by the I2C core. Drivers don't have to maintain their own directory anymore. Driver updates: - xiic: atomic_transfer support - imx-lpi2c: DMA and target mode support - riic cleanups - npcm: better timeout handling and more precise frequency setups - davinci: remove unused platform_data - at24: add new compatibles for variants from Giantec and Puya Semiconductor (together with a new vendor prefix)" * tag 'i2c-for-6.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (52 commits) i2c: add kdoc for the new debugfs entry of clients i2c: designware: Actually make use of the I2C_DW_COMMON and I2C_DW symbol namespaces i2c: add core-managed per-client directory in debugfs i2c: Force ELAN06FA touchpad I2C bus freq to 100KHz i2c: riic: Add `riic_bus_barrier()` to check bus availability i2c: riic: Use predefined macro and simplify clock tick calculation i2c: riic: Mark riic_irqs array as const i2c: riic: Make use of devres helper to request deasserted reset line i2c: riic: Use GENMASK() macro for bitmask definitions i2c: riic: Use BIT macro consistently i2c: riic: Use local `dev` pointer in `dev_err_probe()` i2c: riic: Use dev_err_probe in probe and riic_init_hw functions i2c: riic: Introduce a separate variable for IRQ i2c: amd756: Remove superfluous TODO Revert "i2c: amd756: Fix endianness handling for word data" i2c: i801: Add lis3lv02d for Dell Precision M6800 i2c: i801: Remove unnecessary PCI function call i2c: core: Allocate temp client on the stack in i2c_detect i2c: slave-eeprom: Constify 'struct bin_attribute' i2c: imx-lpi2c: make controller available until the system enters suspend_noirq() and from resume_noirq(). ...
2025-01-15i2c: rcar: fix NACK handling when being a targetWolfram Sang1-5/+15
When this controller is a target, the NACK handling had two issues. First, the return value from the backend was not checked on the initial WRITE_REQUESTED. So, the driver missed to send a NACK in this case. Also, the NACK always arrives one byte late on the bus, even in the WRITE_RECEIVED case. This seems to be a HW issue. We should then not rely on the backend to correctly NACK the superfluous byte as well. Fix both issues by introducing a flag which gets set whenever the backend requests a NACK and keep sending it until we get a STOP condition. Fixes: de20d1857dd6 ("i2c: rcar: add slave support") Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: designware: Actually make use of the I2C_DW_COMMON and I2C_DW symbol ↵Uwe Kleine-König3-6/+9
namespaces DEFAULT_SYMBOL_NAMESPACE must already be defined when <linux/export.h> is included. So move the define above the include block. Fixes: fd57a3325a77 ("i2c: designware: Move exports to I2C_DW namespaces") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: riic: Add `riic_bus_barrier()` to check bus availabilityLad Prabhakar1-4/+26
Introduce a new `riic_bus_barrier()` function to verify bus availability before initiating an I2C transfer. This function enhances the bus arbitration check by ensuring that the SDA and SCL lines are not held low, in addition to checking the BBSY flag using `readb_poll_timeout()`. Previously, only the BBSY flag was checked to determine bus availability. However, it is possible for the SDA line to remain low even when BBSY = 0. This new implementation performs an additional check on the SDA and SCL lines to avoid potential bus contention issues. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: riic: Use predefined macro and simplify clock tick calculationLad Prabhakar1-4/+6
Replace the hardcoded `1000000000` with the predefined `NSEC_PER_SEC` macro for clarity. Simplify the code by introducing a `ns_per_tick` variable to store `NSEC_PER_SEC / rate`, reducing redundancy and improving readability. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: riic: Mark riic_irqs array as constLad Prabhakar1-1/+1
The riic_irqs array describes the supported IRQs by the RIIC driver and does not change at runtime. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: riic: Make use of devres helper to request deasserted reset lineLad Prabhakar1-15/+2
Simplify the `riic_i2c_probe()` function by using the `devm_reset_control_get_optional_exclusive_deasserted()` API to request a deasserted reset line. This eliminates the need to manually deassert the reset control and the additional cleanup. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: riic: Use GENMASK() macro for bitmask definitionsLad Prabhakar1-2/+2
Replace raw bitmask values with the `GENMASK()` macro in the `i2c-riic` driver to improve readability and maintain consistency. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: riic: Use BIT macro consistentlyLad Prabhakar1-18/+19
Easier to read and ensures proper types. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: riic: Use local `dev` pointer in `dev_err_probe()`Lad Prabhakar1-1/+1
Update the `riic_init_hw()` function to use the local `dev` pointer in calls to `dev_err_probe()`. Previously, `riic_init_hw()` used `riic->adapter.dev` in error reporting. Since this function is invoked during the probe phase, the I2C adapter is not yet initialized, leading to `(null) ...` being printed in error messages. This patch fixes the issue by consistently using the local `dev` pointer, which points to `riic->adapter.dev.parent`. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: riic: Use dev_err_probe in probe and riic_init_hw functionsLad Prabhakar1-13/+9
Refactor error handling in the riic_i2c_probe() and riic_init_hw() functions by replacing multiple dev_err() calls with dev_err_probe(). Additionally, update the riic_init_hw() function to use a local `dev` pointer instead of `riic->adapter.dev` for dev_err_probe(), as the I2C adapter is not initialized at this stage. Drop the cast to (unsigned long) in the riic_init_hw() function when printing the bus frequency, and update the error message to display the frequency in Hz, improving clarity. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: riic: Introduce a separate variable for IRQLad Prabhakar1-4/+6
Refactor the IRQ handling in riic_i2c_probe by introducing a local variable `irq` to store IRQ numbers instead of assigning them to `ret`. This change improves code readability and clarity. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14i2c: amd756: Remove superfluous TODOAtharva Tiwari1-2/+2
This old driver has never been used on big-endian systems, so remove the todo. Suggested-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Atharva Tiwari <evepolonium@gmail.com> [wsa: reworded commit message] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-14Revert "i2c: amd756: Fix endianness handling for word data"Wolfram Sang1-3/+2
This reverts commit 70f3d3669c074efbcee32867a1ab71f5f7ead385. We concluded that removing the comments is the right thing to do. This will be done by an incremental patch. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-01-09i2c: i801: Add lis3lv02d for Dell Precision M6800Patrick Höhn1-0/+1
On the Dell Precision M6800/OXD1M5, BIOS A26 06/13/2029, Linux prints the warning below. i801_smbus 0000:00:1f.4: Accelerometer lis3lv02d is present on SMBus but its address is unknown, skipping registration Following the same suggestions by Wolfram Sang as for the Dell Precision 3540 [1], the accelerometer can be successfully found on I2C bus 0 at address 0x29. $ echo lis3lv02d 0x29 | sudo tee /sys/bus/i2c/devices/i2c-0/new_device lis3lv02d 0x29 $ dmesg | tail -5 [1185.385204] lis3lv02d_i2c 0-0029: supply Vdd not found, using dummy regulator [1185.385235] lis3lv02d_i2c 0-0029: supply Vdd_IO not found, using dummy regulator [1185.399689] lis3lv02d: 8 bits 3DC sensor found [1185.449391] input: ST LIS3LV02DL Accelerometer as /devices/platform/lis3lv02d/input/input371 [1185.449577] i2c i2c-0: new_device: Instantiated device lis3lv02d at 0x29 So, the device has that accelerometer. Add the I2C address to the mapping list, and test it successfully on the device. [1]: https://lore.kernel.org/linux-i2c/97708c11-ac85-fb62-2c8e-d37739ca826f@molgen.mpg.de/ Signed-off-by: Patrick Höhn <hoehnp@gmx.de> Acked-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20240312193132.26518-1-hoehnp@gmx.de Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-09i2c: i801: Remove unnecessary PCI function callPhilipp Stanner1-2/+5
Since the changes in commit f748a07a0b64 ("PCI: Remove legacy pcim_release()") all pcim_enable_device() does is set up a callback that disables the device from being disabled from driver detach. The function pcim_pin_device() prevents said disabling. pcim_enable_device(), therefore, sets up an action that is removed immediately afterwards by pcim_pin_device(). Replace pcim_enable_device() with pci_enable_device() and remove the unnecessary call to pcim_pin_device(). Signed-off-by: Philipp Stanner <pstanner@redhat.com> Link: https://lore.kernel.org/r/20241121195624.144839-2-pstanner@redhat.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-08i2c: imx-lpi2c: make controller available until the system enters ↵Carlos Song1-1/+35
suspend_noirq() and from resume_noirq(). This is a general i2c controller feature. Some I2C devices may need the I2C controller to remain active during resume_noirq() or suspend_noirq(). If the controller is autosuspended, there is no way to wake it up once runtime PM disabled (in suspend_late()). During system resume, the I2C controller will be available only after runtime PM is re-enabled (in resume_early()). However, this may be too late for some devices. Wake up the controller in the suspend() callback while runtime PM is still enabled. The I2C controller will remain available until the suspend_noirq() callback (pm_runtime_force_suspend()) is called. During resume, the I2C controller can be restored by the resume_noirq() callback (pm_runtime_force_resume()). Finally, the resume() callback re-enables autosuspend. As a result, the I2C controller can remain available until the system enters suspend_noirq() and from resume_noirq(). Signed-off-by: Carlos Song <carlos.song@nxp.com> Link: https://lore.kernel.org/r/20241227084736.1323943-1-carlos.song@nxp.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07i2c: davinci: use generic device property accessorsBartosz Golaszewski1-4/+3
Don't use generic OF APIs if the generic device-level ones will do. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20241211102337.37956-3-brgl@bgdev.pl Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07i2c: davinci: order includes alphabeticallyBartosz Golaszewski1-10/+11
For better readability order included headers alphabetically. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20241211102337.37956-2-brgl@bgdev.pl Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07i2c: davinci: kill platform dataBartosz Golaszewski1-65/+19
There are no more board file users of this driver. The platform data structure is only used internally. Two of the four fields it stores are not used at all anymore. Pull the remainder into the driver data struct and shrink code by removing parts that are now dead code. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20241211102337.37956-1-brgl@bgdev.pl Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07i2c: amd756: Fix endianness handling for word dataAtharva Tiwari1-2/+3
Ensure correct handling of "endianness" for word-sized data in amd756_access - Convert word data into little-endian using cpu_to_le16 - Convert word data from little-endian to cpu native format using le16_to_cpu This fixes poteential issues on big-endian systems and ensure proper byte ordering for SMBus word transacitions Signed-off-by: Atharva Tiwari <evepolonium@gmail.com> Link: https://lore.kernel.org/r/20250101103422.30523-1-evepolonium@gmail.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07i2c: imx-lpi2c: add target mode supportCarlos Song1-4/+247
LPI2C support master controller and target controller enabled simultaneously. Both controllers share the same SDA/SCL lines and interrupt source but has a separate control and status registers. When target is enabled and an interrupt has been triggered, target register status will be checked to determine IRQ source. Then enter the corresponding interrupt handler function of master or target to handle the interrupt event. This patch supports basic target data read/write operations in 7-bit target address. LPI2C target mode can be enabled by using I2C slave backend. I2C slave backend behaves like a standard I2C client. For simple use and test, Linux I2C slave EEPROM backend can be used. Signed-off-by: Carlos Song <carlos.song@nxp.com> Link: https://lore.kernel.org/r/20241230033846.2302500-1-carlos.song@nxp.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07i2c: qcom-geni: Simplify error handling in probe functionAndi Shyti1-15/+18
Avoid repeating the error handling pattern: geni_se_resources_off(&gi2c->se); clk_disable_unprepare(gi2c->core_clk); return; Introduce a single 'goto' exit label for cleanup in case of errors. While there are currently two distinct exit points, there is no overlap in their handling, allowing both branches to coexist cleanly. Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20241227223230.462395-3-andi.shyti@kernel.org Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07i2c: qcom-geni: Use dev_err_probe in the probe functionAndi Shyti1-19/+14
Replace classical dev_err with dev_err_probe in the probe function for better error reporting. Also, use dev_err_probe in cases where the error number is clear (e.g., -EIO or -EINVAL) to maintain consistency. Additionally, remove redundant logging to simplify the code. Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Acked-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com> Link: https://lore.kernel.org/r/20241227223230.462395-2-andi.shyti@kernel.org Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07i2c: exynos5: Add support for Exynos8895 SoCIvaylo Ivanov1-4/+31
Exynos8895 functioning logic mostly follows I2C_TYPE_EXYNOS7, but timing and temp calculations are slightly different according to the following logic: FPCLK / FI2C = (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 2 * ((FLT_CYCLE + 3) - (FLT_CYCLE + 3) % (CLK_DIV + 1)) temp := (FPCLK / FI2C) - (FLT_CYCLE + 3) * 2 Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Link: https://lore.kernel.org/r/20241228111509.896502-3-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07i2c: imx-lpi2c: add eDMA mode support for LPI2CCarlos Song1-7/+517
Add eDMA mode support for LPI2C. There are some differences between TX DMA mode and RX DMA mode. LPI2C MTDR register is Controller Transmit Data Register. When lpi2c send data, it is tx cmd register and tx data fifo. When lpi2c receive data, it is just a rx cmd register. LPI2C MRDR register is Controller Receive Data Register, received data are stored in this. MTDR[8:10] is CMD field and MTDR[0:7] is DATA filed. +-----------+-------------------------------+ | C M D | D A T A | +---+---+---+---+---+---+---+---+---+---+---+ | 10| 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +---+---+---+---+---+---+---+---+---+---+---+ MRDR is Controller Receive Data Register. MRDR[0:7] is DATA filed. +-------------------------------+ | D A T A | +---+---+---+---+---+---+---+---+ | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +---+---+---+---+---+---+---+---+ When the LPI2C controller needs to send data, tx cmd and 8-bit data should be written into MTDR: CMD: 000b: Transmit the value in DATA[7:0]. DATA: 8-bit data. If lpi2c controller needs to send N 8-bit data, just write N times (CMD(W) + DATA(u8)) to MTDR. When the LPI2C controller needs to receive data, rx cmd should be written into MTDR, the received data will be stored in the MRDR. MTDR(CMD): 001b: Receive (DATA[7:0] + 1) 8-bit data. MTDR(DATA): byte counter. MRDR(DATA): 8-bit data. So when lpi2c controller needs to receive N 8-bit data, 1. N <= 256: Write 1 time (CMD(R) + BYTE COUNT(N-1)) into MTDR and receive data from MRDR. 2. N > 256: Write N/256 times (CMD(R) + BYTE COUNT(255)) + 1 time (CMD(R) + BYTE COUNT(N%256)) into MTDR and receive data from MRDR. Due to these differences,