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path: root/drivers/net/wireless/realtek/rtw89/pci_be.c
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2024-03-05wifi: rtw89: update suspend/resume for different generationChin-Yen Lee1-0/+40
The setting during suspend or resume is different between different generation, so update it. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240302005828.13666-6-pkshih@realtek.com
2024-03-05wifi: rtw89: update DMA function with different generationChin-Yen Lee1-6/+18
The register of control and polling function for TX/RX DMA is different from different generation, so update them. Also rename polling_dma function to polling_dma_idle to avoid misunderstanding. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240302005828.13666-4-pkshih@realtek.com
2024-02-27wifi: rtw89: pci: implement PCI CLK/ASPM/L1SS for WiFi 7 chipsChin-Yen Lee1-0/+52
PCI CLK/ASPM/L1SS is power management mechanism used to reduce power consumption of PCI chip. The registers for setting of these features in WiFi 7 Chip are different from WiFi 6 chip, so separate them in generation information. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240222064258.59782-4-pkshih@realtek.com
2024-02-01wifi: rtw89: pci: update SER timer unit and timeout timePing-Ke Shih1-0/+5
Be higher resolution of SER timer unit from 32ms to 16ms to detect abnormal situation more accurately, and set hardware watchdog timer to 4ms. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240121071826.10159-2-pkshih@realtek.com
2023-11-14wifi: rtw89: pci: generalize interrupt status bits of interrupt handlersPing-Ke Shih1-0/+6
For WiFi 7, interrupt status registers and their definitions are changed a lot, but the logic is still the same, so define fields to reuse the code. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231110012319.12727-5-pkshih@realtek.com
2023-11-14wifi: rtw89: pci: add pre_deinit to be called after probe completePing-Ke Shih1-0/+18
At probe stage, we only do partial initialization to enable ability to download firmware and read capabilities. After that, we use this pre_deinit to disable HCI to save power. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231110012319.12727-4-pkshih@realtek.com
2023-11-14wifi: rtw89: pci: stop/start DMA for level 1 recovery according to chip genZong-Zhe Yang1-0/+55
Level 1 recovery is to recover TX/RX rings, so it needs PCI to stop/start DMA. But, different chip gen have different implementations, either register address/mask or function flow. So, configure callback of stop/start DMA by chip gen. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231110012319.12727-3-pkshih@realtek.com
2023-11-14wifi: rtw89: pci: reset BDRAM according to chip genZong-Zhe Yang1-0/+1
Configure callback of reset BDRAM (buffer descriptor RAM) by chip gen. Refine the one of 802.11ax chip gen and drop a redundant duplicate of it in 802.11ax chip gen. Then, assign right callback of rst_bdram for HCI ops which needs to do callback according to chip gen. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231110012319.12727-2-pkshih@realtek.com
2023-11-08wifi: rtw89: pci: implement PCI mac_post_init for WiFi 7 chipsPing-Ke Shih1-0/+36
For normal use, we do additional settings than mac_pre_init, such as more TX/RX DMA channels, interrupt mitigation and etc. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231101072149.21997-6-pkshih@realtek.com
2023-11-08wifi: rtw89: pci: add LTR v2 for WiFi 7 chipPing-Ke Shih1-0/+57
PCI LTR (Latency Tolerance Reporting) is a capability to yield expected power consumption, and we configure the parameters according to design. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231101072149.21997-5-pkshih@realtek.com
2023-11-08wifi: rtw89: pci: implement PCI mac_pre_init for WiFi 7 chipsPing-Ke Shih1-0/+324
Call this function when doing MAC initialization at probe stage. It does partial initial registers only, because we only need basic ability to download firmware. The function to clear index is the sub-function, so set its pointer as well. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231101072149.21997-4-pkshih@realtek.com
2023-11-08wifi: rtw89: pci: add PCI generation information to pci_info for each chipPing-Ke Shih1-0/+12
In order to reuse PCI initial and configuration flows, add struct rtw89_pci_gen_def to abstract the differences between WiFi 6/7 generations. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231101072149.21997-2-pkshih@realtek.com