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2025-03-18spi: sg2044-nor: fix a couple static checker bugsMark Brown1-3/+2
Merge series from Dan Carpenter <dan.carpenter@linaro.org>: Here are two fixes for Smatch warnings. Dan Carpenter (2): spi: sg2044-nor: fix signedness bug in sg2044_spifmc_write() spi: sg2044-nor: Fix uninitialized variable in probe drivers/spi/spi-sg2044-nor.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) -- 2.47.2
2025-03-18spi: stm32-ospi: Include "gpio/consumer.h"Peng Fan1-1/+1
of_gpio.h should be deprecated, use "gpio/consumer.h". Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://patch.msgid.link/20250318045549.1711502-1-peng.fan@oss.nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-18spi: Merge up fixesMark Brown2-27/+19
They are a dependency for applying some changes to the MAINTAINERS file.
2025-03-17spi: sg2044-nor: A couple of cleanupsMark Brown1-18/+7
Merge series from Andy Shevchenko <andriy.shevchenko@linux.intel.com>: The driver has one ordering issue and one missed case for dev_err_probe(). Address that in this mini-series.
2025-03-16spi: spi-qpic-snand: avoid memleak in qcom_spi_ecc_init_ctx_pipelined()Gabor Juhos1-1/+3
When the allocation of the OOB buffer fails, the qcom_spi_ecc_init_ctx_pipelined() function returns without freeing the memory allocated for 'ecc_cfg' thus it can cause a memory leak. Call kfree() to free 'ecc_cfg' before returning from the function to avoid that. Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface") Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Link: https://patch.msgid.link/20250313-qpic-snand-memleak-fix-v1-1-e54e78d1da3a@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-16spi: spi-mux: Fix coverity issue, unchecked return valueSergio Perez Gonzalez1-3/+1
The return value of spi_setup() is not captured within spi_mux_select() and it is assumed to be always success. CID: 1638374 Signed-off-by: Sergio Perez Gonzalez <sperezglz@gmail.com> Link: https://patch.msgid.link/20250316054651.13242-1-sperezglz@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-16spi: sophgo: fix incorrect type for ret in sg2044_spifmc_write()Qasim Ijaz1-1/+1
The sg2044_spifmc_write() function uses 'ret' of unsigned type size_t to capture return values from sg2044_spifmc_wait_xfer_size() and sg2044_spifmc_wait_int(). Since these functions may return negative error codes, using an unsigned type prevents proper error detection, as size_t cannot represent negative values. Change 'ret' to type int so that negative values are handled correctly. Fixes: de16c322eefb ("spi: sophgo: add SG2044 SPI NOR controller driver") Signed-off-by: Qasim Ijaz <qasdev00@gmail.com> Link: https://patch.msgid.link/20250313214545.7444-1-qasdev00@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-16spi: sg2044-nor: fix uninitialized variable in probeDan Carpenter1-3/+2
The "base" pointer is uninitialized. It should be "spifmc->io_base" instead. Fixes: de16c322eefb ("spi: sophgo: add SG2044 SPI NOR controller driver") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://patch.msgid.link/d343921b-16b8-429b-888a-f51bb6f2edc8@stanley.mountain Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-16spi: sg2044-nor: fix signedness bug in sg2044_spifmc_write()Dan Carpenter1-1/+1
The "ret" variable needs to be signed for the error handling to work. It should be type int, since it only holds zero and negative error codes. Fixes: de16c322eefb ("spi: sophgo: add SG2044 SPI NOR controller driver") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://patch.msgid.link/4e16e1bf-e5fb-4771-bc92-c5cba9aac473@stanley.mountain Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-16spi: sg2044-nor: Convert to dev_err_probe()Andy Shevchenko1-7/+3
One of the cases in sg2044_spifmc_probe() may be converted to use dev_err_probe(). Do it. While at it, use local device pointer in all such calls and drop unneeded __func__ parameter as dev_err_probe() is assumed to be called only during probe phase. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250313111423.322775-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-16spi: sg2044-nor: Fully convert to device managed resourcesAndy Shevchenko1-11/+4
The driver has a wrong order of the cleaning up the resources, i.e. it first will destroy the mutex and only then free the SPI which might still use it. Fix this by switching to devm_mutex_init(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250313111423.322775-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-13spi: spidev: Add an entry for the gocontroll moduline module slotMaud Spierings1-0/+2
The main point of the Moduline series of embedded controllers is its ecosystem of IO modules, these are currently operated through the spidev interface. Ideally there will be a full dedicated driver in the future. Add the gocontroll moduline-module-slot device to enable the required spidev interface. Signed-off-by: Maud Spierings <maudspierings@gocontroll.com> Link: https://patch.msgid.link/20250226-initial_display-v2-12-23fafa130817@gocontroll.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-13spi: Use inclusive languageAndy Shevchenko1-49/+47
Replace "master" by "[host] controller" in the SPI core code and comments. All the similar to the "slave" by "target [device]" changes. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250313140340.380359-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-12spi: cadence-qspi: Improve spi memory performanceMiquel Raynal1-1/+1
I do not know the controller enough to really understand what is happening under the hood, but most of the supported IPs just disable direct access without explicit reason. In practice we observe a significant speed improvement when using indirect mode, some kind of direct mapping, instead of DAC, Direct ACcess. Add the relevant quirk for all boards with the same defaults as AM654 to use INDAC (INDirect ACcess) instead. Speed tests show no change on the write speed on a SPI NAND chip clocked at 25MHz on the AM62A LP SK, but a read speed jumping from 3500kiB/s up to more than 10000kiB/s (approximately x3). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20250305200933.2512925-3-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-12spi: cadence-qspi: Fix probe on AM62A LP SKMiquel Raynal1-0/+6
In 2020, there's been an unnoticed change which rightfully attempted to report probe deferrals upon DMA absence by checking the return value of dma_request_chan_by_mask(). By doing so, it also reported errors which were simply ignored otherwise, likely on purpose. This change actually turned a void return into an error code. Hence, not only the -EPROBE_DEFER error codes but all error codes got reported to the callers, now failing to probe in the absence of Rx DMA channel, despite the fact that DMA seems to not be supported natively by many implementations. Looking at the history, this change probably led to: ad2775dc3fc5 ("spi: cadence-quadspi: Disable the DAC for Intel LGM SoC") f724c296f2f2 ("spi: cadence-quadspi: fix Direct Access Mode disable for SoCFPGA") In my case, the AM62A LP SK core octo-SPI node from TI does not advertise any DMA channel, hinting that there is likely no support for it, but yet when the support for the am654 compatible was added, DMA seemed to be used, so just discarding its use with the CQSPI_DISABLE_DAC_MODE quirk for this compatible does not seem the correct approach. Let's get change the return condition back to: - return a probe deferral error if we get one - ignore the return value otherwise The "error" log level was however likely too high for something that is expected to fail, so let's lower it arbitrarily to the info level. Fixes: 935da5e5100f ("mtd: spi-nor: cadence-quadspi: Handle probe deferral while requesting DMA channel") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20250305200933.2512925-2-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-11spi: sophgo: add Sophgo SPI NOR controller driverMark Brown3-0/+510
Merge series from Longbin Li <looong.bin@gmail.com>: Add SPI NOR driver for Sophgo, including read, write operations. This driver is only suitable for NOR flash.
2025-03-11spi: spi-qpic-snand: Fix ECC_CFG_ECC_DISABLE shift in qcom_spi_read_last_cw()Dan Carpenter1-1/+1
The ECC_CFG_ECC_DISABLE define is BIT(0). It's supposed to be used directly instead of used as a shifter. Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://patch.msgid.link/2f4b0a0b-2c03-41c0-8a4a-3d789a83832d@stanley.mountain Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-11spi: mt65xx: add PM QoS supportLeilk Liu1-0/+17
Enable Quality of Service(QoS) support to speed up interrupt service routine handle. Sometimes, a gic interrupt will be generated after SPI transmission, but at this time the CPU is in an idle state and the processing handler will be very slow. It takes time to exit the idle state and then become active. This will cause the SPI handler to execute slowly and cause SPI transfer timeouts. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Link: https://patch.msgid.link/20250304024045.7788-1-leilk.liu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-11spi: sophgo: add SG2044 SPI NOR controller driverLongbin Li3-0/+510
Add support for SG2044 SPI NOR controller in Sophgo SoC. Signed-off-by: Longbin Li <looong.bin@gmail.com> Link: https://patch.msgid.link/20250304083548.10101-3-looong.bin@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-06spi: stm32: Remove unnecessary print function dev_err()Jiapeng Chong1-3/+1
The print function dev_err() is redundant because platform_get_irq() already prints an error. ./drivers/spi/spi-stm32-ospi.c:798:2-9: line 798 is redundant because platform_get_irq() already prints an error. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=19220 Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Link: https://patch.msgid.link/20250306024716.27856-1-jiapeng.chong@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-06spi: stm32-ospi: Fix an IS_ERR() vs NULL bug in stm32_ospi_get_resources()Dan Carpenter1-2/+2
The devm_ioremap() function returns NULL on error, it doesn't return error pointers. Fix the check to match. Fixes: 79b8a705e26c ("spi: stm32: Add OSPI driver") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://patch.msgid.link/bc4c9123-df43-4616-962f-765801d30b4c@stanley.mountain Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-04Add STM32MP25 SPI NOR supportMark Brown6-3/+1082
Merge series from patrice.chotard@foss.st.com: This series adds SPI NOR support for STM32MP25 SoCs from STMicroelectronics. On STM32MP25 SoCs family, an Octo Memory Manager block manages the muxing, the memory area split, the chip select override and the time constraint between its 2 Octo SPI children. Due to these depedencies, this series adds support for: - Octo Memory Manager driver (not applied for SPI). - Octo SPI driver. - yaml schema for Octo Memory Manager and Octo SPI drivers. The device tree files adds Octo Memory Manager and its 2 associated Octo SPI chidren in stm32mp251.dtsi and adds SPI NOR support in stm32mp257f-ev1 board.
2025-03-03spi: spi-qpic: add driver for QCOM SPI NAND flash InterfaceMd Sadre Alam3-0/+1641
This driver implements support for the SPI-NAND mode of QCOM NAND Flash Interface as a SPI-MEM controller with pipelined ECC capability. Co-developed-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Link: https://patch.msgid.link/20250224111414.2809669-3-quic_mdalam@quicinc.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-03spi: stm32: Add OSPI driverPatrice Chotard3-0/+1076
Add STM32 OSPI driver, it supports : - support sNOR / sNAND devices. - Three functional modes: indirect, automatic-status polling, memory-mapped. - Single-, dual-, quad-, and octal-SPI communication. - Dual-quad communication. - Single data rate (SDR). - DMA channel for indirect mode. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://patch.msgid.link/20250219080059.367045-3-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-03-03spi: microchip-core: prevent RX overflows when transmit size > FIFO sizeConor Dooley1-23/+18
When the size of a transfer exceeds the size of the FIFO (32 bytes), RX overflows will be generated and receive data will be corrupted and warnings will be produced. For example, here's an error generated by a transfer of 36 bytes: spi_master spi0: mchp_corespi_interrupt: RX OVERFLOW: rxlen: 4, txlen: 0 The driver is currently split between handling receiving in the interrupt handler, and sending outside of it. Move all handling out of the interrupt handling, and explicitly link the number of bytes read of of the RX FIFO to the number written into the TX one. This both resolves the overflow problems as well as simplifying the flow of the driver. CC: stable@vger.kernel.org Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250303-veal-snooper-712c1dfad336@wendy Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-26spi: spi-imx: convert timeouts to secs_to_jiffies()Easwar Hariharan1-1/+1
Commit b35108a51cf7 ("jiffies: Define secs_to_jiffies()") introduced secs_to_jiffies(). As the value here is a multiple of 1000, use secs_to_jiffies() instead of msecs_to_jiffies() to avoid the multiplication This is converted using scripts/coccinelle/misc/secs_to_jiffies.cocci with the following Coccinelle rules: @depends on patch@ expression E; @@ -msecs_to_jiffies +secs_to_jiffies (E - * \( 1000 \| MSEC_PER_SEC \) ) Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Easwar Hariharan <eahariha@linux.microsoft.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://patch.msgid.link/20250225-converge-secs-to-jiffies-part-two-v3-13-a43967e36c88@linux.microsoft.com Acked-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-26spi: spi-fsl-lpspi: convert timeouts to secs_to_jiffies()Easwar Hariharan1-1/+1
Commit b35108a51cf7 ("jiffies: Define secs_to_jiffies()") introduced secs_to_jiffies(). As the value here is a multiple of 1000, use secs_to_jiffies() instead of msecs_to_jiffies() to avoid the multiplication This is converted using scripts/coccinelle/misc/secs_to_jiffies.cocci with the following Coccinelle rules: @depends on patch@ expression E; @@ -msecs_to_jiffies +secs_to_jiffies (E - * \( 1000 \| MSEC_PER_SEC \) ) Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Easwar Hariharan <eahariha@linux.microsoft.com> Link: https://patch.msgid.link/20250225-converge-secs-to-jiffies-part-two-v3-12-a43967e36c88@linux.microsoft.com Acked-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-19spi: s3c64xx: extend description of compatible's fifo_depthTudor Ambarus1-1/+3
The FIFO depth specified with the compatibles's data is used where all the instances of the IP define the same FIFO depth. It naturally has higher precedence than the FIFO depth specified via DT. Specifying FIFO depth in DT becomes superfluous in this case. Extend comment about compatible's FIFO depth. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://patch.msgid.link/20250214-spi-s3c64xx-fifo-depth-v1-1-e1b1915e3ee7@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-16spi: atmel-quadspi: remove references to runtime PM on error pathClaudiu Beznea1-4/+1
There is no need to call runtime PM put APIs on error path of `atmel_qspi_sama7g5_transfer()` as the caller (`atmel_qspi_exec_op()`) of it will take care of this if needed. Fixes: 5af42209a4d2 ("spi: atmel-quadspi: Add support for sama7g5 QSPI") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> Reported-by: Alexander Dahl <ada@thorsis.com> Closes: https://lore.kernel.org/linux-spi/20250109-carat-festivity-5f088e1add3c@thorsis.com/ [ csokas.bence: Rebase and clarify msg, fix/add tags ] Signed-off-by: Bence Csókás <csokas.bence@prolan.hu> Link: https://patch.msgid.link/20250207122145.162183-2-csokas.bence@prolan.hu Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-12spi: offload: fix use after freeDavid Lechner1-5/+8
Fix a use after free bug in devm_spi_offload_get() where a pointer was dereferenced after being freed. Instead, add a new local variable to avoid needing to use the resource pointer to access the offload pointer. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202502112344.7ggtFzyn-lkp@intel.com/ Fixes: 5a19e1985d01 ("spi: axi-spi-engine: implement offload support") Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250212-spi-offload-fixes-v1-2-e192c69e3bb3@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-11spi: spi-offload-trigger-pwm: add extra headersDavid Lechner1-1/+8
Add additional headers used in this driver. This is better than relying on implicit includes via other unrelated headers. Also sort the existing includes while doing so. Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250210-spi-offload-extra-headers-v1-2-0f3356362254@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-10spi: axi-spi-engine: add offload supportMark Brown6-7/+965
Merge series from David Lechner <dlechner@baylibre.com>: As a recap, here is the background and end goal of this series: The AXI SPI Engine is a SPI controller that has the ability to record a series of SPI transactions and then play them back using a hardware trigger. This allows operations to be performed, repeating many times, without any CPU intervention. This is needed for achieving high data rates (millions of samples per second) from ADCs and DACs that are connected via a SPI bus. The offload hardware interface consists of a trigger input and a data output for the RX data. These are connected to other hardware external to the SPI controller. To record one or more transactions, commands and TX data are written to memories in the controller (RX buffer is not used since RX data gets streamed to an external sink). This sequence of transactions can then be played back when the trigger input is asserted. This series includes core SPI support along with the first SPI controller (AXI SPI Engine) and SPI peripheral (AD7944 ADC) that use them. This enables capturing analog data at 2 million samples per second. The hardware setup looks like this: +-------------------------------+ +------------------+ | | | | | SOC/FPGA | | AD7944 ADC | | +---------------------+ | | | | | AXI SPI Engine | | | | | | SPI Bus ============ SPI Bus | | | | | | | | | +---------------+ | | | | | | | Offload 0 | | | +------------------+ | | | RX DATA OUT > > > > | | | | TRIGGER IN < < < v | | | +---------------+ | ^ v | | +---------------------+ ^ v | | | AXI PWM | ^ v | | | CH0 > ^ v | | +---------------------+ v | | | AXI DMA | v | | | CH0 < < < | | +---------------------+ | | | +-------------------------------+
2025-02-07spi: axi-spi-engine: implement offload supportDavid Lechner2-7/+309
Implement SPI offload support for the AXI SPI Engine. Currently, the hardware only supports triggering offload transfers with a hardware trigger so attempting to use an offload message in the regular SPI message queue will fail. Also, only allows streaming rx data to an external sink, so attempts to use a rx_buf in the offload message will fail. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250207-dlech-mainline-spi-engine-offload-2-v8-7-e48a489be48c@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-07spi: add offload TX/RX streaming APIsDavid Lechner2-0/+80
Most configuration of SPI offloads is handled opaquely using the offload pointer that is passed to the various offload functions. However, there are some offload features that need to be controlled on a per transfer basis. This patch adds a flag field to struct spi_transfer to allow specifying such features. The first feature to be added is the ability to stream data to/from a hardware sink/source rather than using a tx or rx buffer. Additional flags can be added in the future as needed. A flags field is also added to the offload struct for providers to indicate which flags are supported. This allows for generic checking of offload capabilities during __spi_validate() so that each offload provider doesn't have to implement their own validation. As a first users of this streaming capability, getter functions are added to get a DMA channel that is directly connected to the offload. Peripheral drivers will use this to get a DMA channel and configure it to suit their needs. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250207-dlech-mainline-spi-engine-offload-2-v8-5-e48a489be48c@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-07spi: offload-trigger: add PWM trigger driverDavid Lechner3-0/+177
Add a new driver for a generic PWM trigger for SPI offloads. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250207-dlech-mainline-spi-engine-offload-2-v8-4-e48a489be48c@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-07spi: offload: add support for hardware triggersDavid Lechner1-0/+281
Extend SPI offloading to support hardware triggers. This allows an arbitrary hardware trigger to be used to start a SPI transfer that was previously set up with spi_optimize_message(). A new struct spi_offload_trigger is introduced that can be used to configure any type of trigger. It has a type discriminator and a union to allow it to be extended in the future. Two trigger types are defined to start with. One is a trigger that indicates that the SPI peripheral is ready to read or write data. The other is a periodic trigger to repeat a SPI message at a fixed rate. There is also a spi_offload_hw_trigger_validate() function that works similar to clk_round_rate(). It basically asks the question of if we enabled the hardware trigger what would the actual parameters be. This can be used to test if the requested trigger type is actually supported by the hardware and for periodic triggers, it can be used to find the actual rate that the hardware is capable of. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250207-dlech-mainline-spi-engine-offload-2-v8-2-e48a489be48c@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-07spi: add basic support for SPI offloadingDavid Lechner3-0/+118
Add the basic infrastructure to support SPI offload providers and consumers. SPI offloading is a feature that allows the SPI controller to perform transfers without any CPU intervention. This is useful, e.g. for high-speed data acquisition. SPI controllers with offload support need to implement the get_offload and put_offload callbacks and can use the devm_spi_offload_alloc() to allocate offload instances. SPI peripheral drivers will call devm_spi_offload_get() to get a reference to the matching offload instance. This offload instance can then be attached to a SPI message to request offloading that message. It is expected that SPI controllers with offload support will check for the offload instance in the SPI message in the ctlr->optimize_message() callback and handle it accordingly. CONFIG_SPI_OFFLOAD is intended to be a select-only option. Both consumer and provider drivers should `select SPI_OFFLOAD` in their Kconfig to ensure that the SPI core is built with offload support. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250207-dlech-mainline-spi-engine-offload-2-v8-1-e48a489be48c@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-06spi: gpio: Enable a single always-selected deviceMark Brown1-38/+7
Merge series from Andy Shevchenko <andriy.shevchenko@linux.intel.com>: Enable a single always-selected device hardware setup for SPI GPIO driver, so some custom SPI bitbang code may be replaced with the generic implementation in the future (e.g. Up Board FPGA driver).
2025-02-06spi: sn-f-ospi: Fix division by zeroKunihiko Hayashi1-0/+3
When there is no dummy cycle in the spi-nor commands, both dummy bus cycle bytes and width are zero. Because of the cpu's warning when divided by zero, the warning should be avoided. Return just zero to avoid such calculations. Fixes: 1b74dd64c861 ("spi: Add Socionext F_OSPI SPI flash controller driver") Co-developed-by: Kohei Ito <ito.kohei@socionext.com> Signed-off-by: Kohei Ito <ito.kohei@socionext.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://patch.msgid.link/20250206085747.3834148-1-hayashi.kunihiko@socionext.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-05spi: Replace custom fsleep() implementationAndy Shevchenko1-4/+1
_spi_transfer_delay_ns() partially reimplements what fsleep() does. Replace that code by calling fsleep() instead. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250205130624.716039-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-05spi: gpio: Support a single always-selected deviceAndy Shevchenko1-6/+5
The generic SPI code, the SPI GPIO driver functions support a single always-connected device cases. The only impediment is that board instantiation prevents that from happening. Update spi_gpio_probe_pdata() checks to support the mentioned hardware setup. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250205132127.742750-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-05spi: gpio: Remove stale documentation partAndy Shevchenko1-32/+2
The SPI GPIO driver doesn't support hard coded absolute GPIO numbers anymore. However, it may still be instantiated from board files with help of GPIO lookup tables or device properties. Neither of this is covered by the old part of the documentation, it's the opposite, i.e. old documentation pretend that antique approach still works. With all this said, remove stale and confusing part of the documentation. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250205132127.742750-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-04spi: pxa2xx: Fix regression when toggling chip select on LPSS devicesMark Lord1-1/+1
The commit 78b435c9044a ("spi: pxa2xx: Introduce __lpss_ssp_update_priv() helper") broke speaker output on my ASUS UX5304MA laptop. The problem is in inverted value that got written in the private register. Simple bug, simple fix. Fixes: 78b435c9044a ("spi: pxa2xx: Introduce __lpss_ssp_update_priv() helper") Signed-off-by: Mark Lord <mlord@pobox.com> Tested-by: Mark Lord <mlord@pobox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250204174506.149978-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-03spi: fsi: Batch TX operationsEddie James1-0/+13
Batch sequential write transfers up to the max TX size (40 bytes). This controller must specify a max transfer size of only 8 bytes for RX operations. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20250131200158.732898-1-eajames@linux.ibm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-03spi: atmel-quadspi: Fix warning in doc-commentBence Csókás1-2/+2
The doc-comment for `struct atmel_qspi_pcal` had a typo in one of the struct members' name, causing a warning with the `W=1` option. Fixes: 5af42209a4d2 ("spi: atmel-quadspi: Add support for sama7g5 QSPI") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202501311707.Ltj0qXse-lkp@intel.com/ Signed-off-by: Bence Csókás <csokas.bence@prolan.hu> Link: https://patch.msgid.link/20250203151249.79876-2-csokas.bence@prolan.hu Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-03spi: zynqmp-gqspi: Clean up the driver a bitMark Brown1-92/+77
Merge series from Sean Anderson <sean.anderson@linux.dev>: Here are a few mostly independent cleanups I came up with while writing some other patches. Feel free to apply them in piecemeal if you like.
2025-02-03spi: realtek-rtl-snand: Drop unneeded assignment for cache_typeAndy Shevchenko1-1/+0
REGCACHE_NONE is the default type of the cache when not provided. Drop unneeded explicit assignment to it. Note, it's defined to 0, and if ever be redefined, it will break literally a lot of the drivers, so it very unlikely to happen. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250129152925.1804071-1-andriy.shevchenko@linux.intel.com Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-03spi: zynqmp-gqspi: Always acknowledge interruptsSean Anderson1-12/+8
RXEMPTY can cause an IRQ, even though we may not do anything about it (such as if we are waiting for more received data). We must still handle these IRQs because we can tell they were caused by the device. Signed-off-by: Sean Anderson <sean.anderson@linux.dev> Link: https://patch.msgid.link/20250116224130.2684544-6-sean.anderson@linux.dev Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-03spi: zynqmp-gqspi: Clean up fillgenfifoSean Anderson1-50/+28
This function does a lot more work (assigning things multiple times, masking unnecessarily, comparing to zero, using superfluous parentheses) than it needs to. This makes it difficult to understand and modify. Clean it up. No functional change intended. Signed-off-by: Sean Anderson <sean.anderson@linux.dev> Link: https://patch.msgid.link/20250116224130.2684544-5-sean.anderson@linux.dev Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-03spi: zynqmp-gqspi: Add helpers for enabling/disabling DMASean Anderson1-27/+34
DMA is enabled and disabled several times in the driver. Add some helper functions for this task. Signed-off-by: Sean Anderson <sean.anderson@linux.dev> Link: https://patch.msgid.link/20250116224130.2684544-4-sean.anderson@linux.dev Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-30 03:35:51 +0000