From e66104096a5630e75d135dc052867d32470c0bbc Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:33 +0900 Subject: dt-bindings: clock: Fix node descriptions in uniphier-clock example Prior to adding dt-bindings for SoC-dependent controllers, rename the clock nodes to the generic names in the example. And drop redundant examples and a parent node of the clock as it is not directly necessary. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-2-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../bindings/clock/socionext,uniphier-clock.yaml | 39 ++-------------------- 1 file changed, 3 insertions(+), 36 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml index 9a0cc7341630..4e82582fb2f3 100644 --- a/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml +++ b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml @@ -61,40 +61,7 @@ required: examples: - | - sysctrl@61840000 { - compatible = "socionext,uniphier-sysctrl", "simple-mfd", "syscon"; - reg = <0x61840000 0x4000>; - - clock { - compatible = "socionext,uniphier-ld11-clock"; - #clock-cells = <1>; - }; - - // other nodes ... - }; - - - | - mioctrl@59810000 { - compatible = "socionext,uniphier-mioctrl", "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - - clock { - compatible = "socionext,uniphier-ld11-mio-clock"; - #clock-cells = <1>; - }; - - // other nodes ... - }; - - - | - perictrl@59820000 { - compatible = "socionext,uniphier-perictrl", "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - - clock { - compatible = "socionext,uniphier-ld11-peri-clock"; - #clock-cells = <1>; - }; - - // other nodes ... + clock-controller { + compatible = "socionext,uniphier-ld11-clock"; + #clock-cells = <1>; }; -- cgit v1.2.3 From 3b67e62130dfd01f520697cbe4341be145a31ae8 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:34 +0900 Subject: dt-bindings: reset: Fix node descriptions in uniphier-reset example Prior to adding dt-bindings for SoC-dependent controllers, rename the reset nodes to the generic names in the example. And drop redundant examples and a parent node of the reset as it is not directly necessary. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-3-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../reset/socionext,uniphier-glue-reset.yaml | 23 ++++------ .../bindings/reset/socionext,uniphier-reset.yaml | 52 ++-------------------- 2 files changed, 11 insertions(+), 64 deletions(-) diff --git a/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml b/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml index 0a2c13e1e230..fa253c518d79 100644 --- a/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml +++ b/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml @@ -95,19 +95,12 @@ required: examples: - | - usb-glue@65b00000 { - compatible = "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - - usb_rst: reset@0 { - compatible = "socionext,uniphier-ld20-usb3-reset"; - reg = <0x0 0x4>; - #reset-cells = <1>; - clock-names = "link"; - clocks = <&sys_clk 14>; - reset-names = "link"; - resets = <&sys_rst 14>; - }; + usb_rst: reset-controller@0 { + compatible = "socionext,uniphier-ld20-usb3-reset"; + reg = <0x0 0x4>; + #reset-cells = <1>; + clock-names = "link"; + clocks = <&sys_clk 14>; + reset-names = "link"; + resets = <&sys_rst 14>; }; diff --git a/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml b/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml index 6566804ec567..033b252a3dfe 100644 --- a/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml +++ b/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml @@ -66,53 +66,7 @@ required: examples: - | - sysctrl@61840000 { - compatible = "socionext,uniphier-sysctrl", "simple-mfd", "syscon"; - reg = <0x61840000 0x4000>; - - reset { - compatible = "socionext,uniphier-ld11-reset"; - #reset-cells = <1>; - }; - - // other nodes ... - }; - - - | - mioctrl@59810000 { - compatible = "socionext,uniphier-mioctrl", "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - - reset { - compatible = "socionext,uniphier-ld11-mio-reset"; - #reset-cells = <1>; - }; - - // other nodes ... - }; - - - | - perictrl@59820000 { - compatible = "socionext,uniphier-perictrl", "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - - reset { - compatible = "socionext,uniphier-ld11-peri-reset"; - #reset-cells = <1>; - }; - - // other nodes ... - }; - - - | - adamv@57920000 { - compatible = "socionext,uniphier-ld11-adamv", "simple-mfd", "syscon"; - reg = <0x57920000 0x1000>; - - reset { - compatible = "socionext,uniphier-ld11-adamv-reset"; - #reset-cells = <1>; - }; - - // other nodes ... + reset-controller { + compatible = "socionext,uniphier-ld11-reset"; + #reset-cells = <1>; }; -- cgit v1.2.3 From 3fa1306d6a7f9baddc960ef8c5b5edde6dc46e66 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:35 +0900 Subject: dt-bindings: pinctrl: Fix node descriptions in uniphier-pinctrl example Drop parent node of the pinctrl as it is not directly necessary, and add more examples, that is "groups", "function", and a child node to set pin attributes, to express this pinctrl node in detail. Signed-off-by: Kunihiko Hayashi Link: https://lore.kernel.org/r/20221213082449.2721-4-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../bindings/pinctrl/socionext,uniphier-pinctrl.yaml | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml index 14a8c0215cc6..bc34e2c872bc 100644 --- a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause + %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/socionext,uniphier-pinctrl.yaml# @@ -69,11 +70,17 @@ examples: - | // The UniPhier pinctrl should be a subnode of a "syscon" compatible node. - soc-glue@5f800000 { - compatible = "socionext,uniphier-pro4-soc-glue", "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; + pinctrl { + compatible = "socionext,uniphier-ld20-pinctrl"; + + pinctrl_ether_rgmii: ether-rgmii { + groups = "ether_rgmii"; + function = "ether_rgmii"; - pinctrl: pinctrl { - compatible = "socionext,uniphier-pro4-pinctrl"; + tx { + pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1", + "RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL"; + drive-strength = <9>; + }; }; }; -- cgit v1.2.3 From d3df7f06e2a63780164aa2442ea7b639acc898bd Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:36 +0900 Subject: dt-bindings: regulator: Fix node descriptions in uniphier-regulator example Drop a parent node of the regulator as it is not directly necessary. Signed-off-by: Kunihiko Hayashi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-5-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../regulator/socionext,uniphier-regulator.yaml | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml b/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml index c0acf949753d..a6949a581cd1 100644 --- a/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml @@ -89,18 +89,11 @@ required: examples: - | - usb-glue@65b00000 { - compatible = "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - - usb_vbus0: regulators@100 { - compatible = "socionext,uniphier-ld20-usb3-regulator"; - reg = <0x100 0x10>; - clock-names = "link"; - clocks = <&sys_clk 14>; - reset-names = "link"; - resets = <&sys_rst 14>; - }; + usb_vbus0: regulators@100 { + compatible = "socionext,uniphier-ld20-usb3-regulator"; + reg = <0x100 0x10>; + clock-names = "link"; + clocks = <&sys_clk 14>; + reset-names = "link"; + resets = <&sys_rst 14>; }; -- cgit v1.2.3 From 8f31aa56efe6d35d5923218ca9fd5354f2c5e76d Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:37 +0900 Subject: dt-bindings: watchdog: Fix node descriptions in uniphier-wdt example Drop a parent node of the watchdog as it is not directly necessary. Signed-off-by: Kunihiko Hayashi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-6-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml b/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml index 90698cfa8f94..70c005fdd197 100644 --- a/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml @@ -25,12 +25,6 @@ examples: - | // The UniPhier watchdog should be a subnode of a "syscon" compatible node. - sysctrl@61840000 { - compatible = "socionext,uniphier-ld11-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - - watchdog { - compatible = "socionext,uniphier-wdt"; - }; + watchdog { + compatible = "socionext,uniphier-wdt"; }; -- cgit v1.2.3 From a1e616a5fccbef72e02b68ef0f43e4e829604faf Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:38 +0900 Subject: dt-bindings: thermal: Fix node descriptions in uniphier-thermal example Prior to adding dt-bindings for SoC-dependent controllers, rename the thermal node and its parent node to the generic names in the example. And drop a parent node of the thermal-sensor as it is not directly necessary. Signed-off-by: Kunihiko Hayashi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-7-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../bindings/thermal/socionext,uniphier-thermal.yaml | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml b/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml index c5b25ce44956..6f975821fa5e 100644 --- a/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml @@ -46,14 +46,9 @@ examples: - | // The UniPhier thermal should be a subnode of a "syscon" compatible node. - sysctrl@61840000 { - compatible = "socionext,uniphier-ld20-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - - pvtctl: thermal { - compatible = "socionext,uniphier-ld20-thermal"; - interrupts = <0 3 1>; - #thermal-sensor-cells = <0>; - }; + #include + pvtctl: thermal-sensor { + compatible = "socionext,uniphier-ld20-thermal"; + interrupts = ; + #thermal-sensor-cells = <0>; }; -- cgit v1.2.3 From 4278eabebc1679709d6b1904ca960dc0b69a6c99 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:39 +0900 Subject: dt-bindings: phy: Fix node descriptions in uniphier-phy example Prior to adding dt-bindings for SoC-dependent controllers, rename the phy nodes and their parent nodes to the generic names in the example. And drop parent nodes of each phy as they are not directly necessary here. Signed-off-by: Kunihiko Hayashi Acked-by: Krzysztof Kozlowski ] Link: https://lore.kernel.org/r/20221213082449.2721-8-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../bindings/phy/socionext,uniphier-ahci-phy.yaml | 24 +++++-------- .../bindings/phy/socionext,uniphier-usb2-phy.yaml | 41 ++++++++++------------ .../phy/socionext,uniphier-usb3hs-phy.yaml | 29 ++++++--------- .../phy/socionext,uniphier-usb3ss-phy.yaml | 26 +++++--------- 4 files changed, 46 insertions(+), 74 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml index a3cd45acea28..de3cffc850bc 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml @@ -117,20 +117,12 @@ additionalProperties: false examples: - | - ahci-glue@65700000 { - compatible = "socionext,uniphier-pxs3-ahci-glue", - "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65700000 0x100>; - - ahci_phy: phy@10 { - compatible = "socionext,uniphier-pxs3-ahci-phy"; - reg = <0x10 0x10>; - #phy-cells = <0>; - clock-names = "link", "phy"; - clocks = <&sys_clk 28>, <&sys_clk 30>; - reset-names = "link", "phy"; - resets = <&sys_rst 28>, <&sys_rst 30>; - }; + ahci_phy: phy@10 { + compatible = "socionext,uniphier-pxs3-ahci-phy"; + reg = <0x10 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 28>, <&sys_clk 30>; + reset-names = "link", "phy"; + resets = <&sys_rst 28>, <&sys_rst 30>; }; diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml index 63dab914a48d..19522c54f448 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml @@ -61,28 +61,23 @@ examples: - | // The UniPhier usb2-phy should be a subnode of a "syscon" compatible node. - soc-glue@5f800000 { - compatible = "socionext,uniphier-ld11-soc-glue", "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; - - usb-controller { - compatible = "socionext,uniphier-ld11-usb2-phy"; - #address-cells = <1>; - #size-cells = <0>; - - usb_phy0: phy@0 { - reg = <0>; - #phy-cells = <0>; - }; - - usb_phy1: phy@1 { - reg = <1>; - #phy-cells = <0>; - }; - - usb_phy2: phy@2 { - reg = <2>; - #phy-cells = <0>; - }; + usb-hub { + compatible = "socionext,uniphier-ld11-usb2-phy"; + #address-cells = <1>; + #size-cells = <0>; + + usb_phy0: phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + usb_phy1: phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + + usb_phy2: phy@2 { + reg = <2>; + #phy-cells = <0>; }; }; diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml index 21e4414eea60..2107d98ace15 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml @@ -146,22 +146,15 @@ additionalProperties: false examples: - | - usb-glue@65b00000 { - compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - - usb_hsphy0: hs-phy@200 { - compatible = "socionext,uniphier-ld20-usb3-hsphy"; - reg = <0x200 0x10>; - #phy-cells = <0>; - clock-names = "link", "phy"; - clocks = <&sys_clk 14>, <&sys_clk 16>; - reset-names = "link", "phy"; - resets = <&sys_rst 14>, <&sys_rst 16>; - vbus-supply = <&usb_vbus0>; - nvmem-cell-names = "rterm", "sel_t", "hs_i"; - nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, <&usb_hs_i0>; - }; + usb_hsphy0: phy@200 { + compatible = "socionext,uniphier-ld20-usb3-hsphy"; + reg = <0x200 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 14>, <&sys_clk 16>; + reset-names = "link", "phy"; + resets = <&sys_rst 14>, <&sys_rst 16>; + vbus-supply = <&usb_vbus0>; + nvmem-cell-names = "rterm", "sel_t", "hs_i"; + nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, <&usb_hs_i0>; }; diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml index 4c26d2d2303d..8f5aa6238bf3 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml @@ -131,21 +131,13 @@ additionalProperties: false examples: - | - usb-glue@65b00000 { - compatible = "socionext,uniphier-ld20-dwc3-glue", - "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - - usb_ssphy0: ss-phy@300 { - compatible = "socionext,uniphier-ld20-usb3-ssphy"; - reg = <0x300 0x10>; - #phy-cells = <0>; - clock-names = "link", "phy"; - clocks = <&sys_clk 14>, <&sys_clk 16>; - reset-names = "link", "phy"; - resets = <&sys_rst 14>, <&sys_rst 16>; - vbus-supply = <&usb_vbus0>; - }; + usb_ssphy0: phy@300 { + compatible = "socionext,uniphier-ld20-usb3-ssphy"; + reg = <0x300 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 14>, <&sys_clk 16>; + reset-names = "link", "phy"; + resets = <&sys_rst 14>, <&sys_rst 16>; + vbus-supply = <&usb_vbus0>; }; -- cgit v1.2.3 From e8c650f62787437f822bffa3c384ab1029d43ea7 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:40 +0900 Subject: dt-bindings: nvmem: Fix node descriptions in uniphier-efuse example Prior to adding dt-bindings for SoC-dependent controllers, rename the parent node to the generic name in the example. And drop a parent node of the nvmem as it is not directly necessary here. Signed-off-by: Kunihiko Hayashi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-9-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../bindings/nvmem/socionext,uniphier-efuse.yaml | 101 ++++++++++----------- 1 file changed, 46 insertions(+), 55 deletions(-) diff --git a/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml b/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml index 73a0c658dbfd..dc790d2cd9f0 100644 --- a/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml @@ -31,65 +31,56 @@ unevaluatedProperties: false examples: - | - // The UniPhier eFuse should be a subnode of a "soc-glue" node. + efuse@100 { + compatible = "socionext,uniphier-efuse"; + reg = <0x100 0x28>; + }; - soc-glue@5f900000 { - compatible = "simple-mfd"; + efuse@200 { + compatible = "socionext,uniphier-efuse"; + reg = <0x200 0x68>; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x5f900000 0x2000>; - efuse@100 { - compatible = "socionext,uniphier-efuse"; - reg = <0x100 0x28>; + /* Data cells */ + usb_rterm0: trim@54,4 { + reg = <0x54 1>; + bits = <4 2>; }; - - efuse@200 { - compatible = "socionext,uniphier-efuse"; - reg = <0x200 0x68>; - #address-cells = <1>; - #size-cells = <1>; - - /* Data cells */ - usb_rterm0: trim@54,4 { - reg = <0x54 1>; - bits = <4 2>; - }; - usb_rterm1: trim@55,4 { - reg = <0x55 1>; - bits = <4 2>; - }; - usb_rterm2: trim@58,4 { - reg = <0x58 1>; - bits = <4 2>; - }; - usb_rterm3: trim@59,4 { - reg = <0x59 1>; - bits = <4 2>; - }; - usb_sel_t0: trim@54,0 { - reg = <0x54 1>; - bits = <0 4>; - }; - usb_sel_t1: trim@55,0 { - reg = <0x55 1>; - bits = <0 4>; - }; - usb_sel_t2: trim@58,0 { - reg = <0x58 1>; - bits = <0 4>; - }; - usb_sel_t3: trim@59,0 { - reg = <0x59 1>; - bits = <0 4>; - }; - usb_hs_i0: trim@56,0 { - reg = <0x56 1>; - bits = <0 4>; - }; - usb_hs_i2: trim@5a,0 { - reg = <0x5a 1>; - bits = <0 4>; - }; + usb_rterm1: trim@55,4 { + reg = <0x55 1>; + bits = <4 2>; + }; + usb_rterm2: trim@58,4 { + reg = <0x58 1>; + bits = <4 2>; + }; + usb_rterm3: trim@59,4 { + reg = <0x59 1>; + bits = <4 2>; + }; + usb_sel_t0: trim@54,0 { + reg = <0x54 1>; + bits = <0 4>; + }; + usb_sel_t1: trim@55,0 { + reg = <0x55 1>; + bits = <0 4>; + }; + usb_sel_t2: trim@58,0 { + reg = <0x58 1>; + bits = <0 4>; + }; + usb_sel_t3: trim@59,0 { + reg = <0x59 1>; + bits = <0 4>; + }; + usb_hs_i0: trim@56,0 { + reg = <0x56 1>; + bits = <0 4>; + }; + usb_hs_i2: trim@5a,0 { + reg = <0x5a 1>; + bits = <0 4>; }; }; -- cgit v1.2.3 From 75c7aaa66f5fdabcbaf1e6775c5f85b35b7debaa Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:41 +0900 Subject: dt-bindings: soc: socionext: Add UniPhier system controller Add devicetree binding schema for the system controller implemented on Socionext Uniphier SoCs. This system controller has multiple functions such as clock control, reset control, internal watchdog timer, thermal management, and so on. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-10-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../soc/socionext/socionext,uniphier-sysctrl.yaml | 104 +++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml new file mode 100644 index 000000000000..3acb14201d1a --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sysctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier system controller + +maintainers: + - Kunihiko Hayashi + +description: |+ + System controller implemented on Socionext UniPhier SoCs has multiple + functions such as clock control, reset control, internal watchdog timer, + thermal management, and so on. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld4-sysctrl + - socionext,uniphier-pro4-sysctrl + - socionext,uniphier-pro5-sysctrl + - socionext,uniphier-pxs2-sysctrl + - socionext,uniphier-sld8-sysctrl + - socionext,uniphier-ld11-sysctrl + - socionext,uniphier-ld20-sysctrl + - socionext,uniphier-pxs3-sysctrl + - socionext,uniphier-nx1-sysctrl + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + $ref: /schemas/clock/socionext,uniphier-clock.yaml# + + reset-controller: + $ref: /schemas/reset/socionext,uniphier-reset.yaml# + + watchdog: + $ref: /schemas/watchdog/socionext,uniphier-wdt.yaml# + + thermal-sensor: + $ref: /schemas/thermal/socionext,uniphier-thermal.yaml# + +allOf: + - if: + properties: + compatible: + contains: + const: socionext,uniphier-ld4-sysctrl + then: + properties: + watchdog: false + + - if: + properties: + compatible: + contains: + enum: + - socionext,uniphier-ld4-sysctrl + - socionext,uniphier-pro4-sysctrl + - socionext,uniphier-sld8-sysctrl + - socionext,uniphier-ld11-sysctrl + then: + properties: + thermal-sensor: false + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include + syscon@61840000 { + compatible = "socionext,uniphier-ld20-sysctrl", + "simple-mfd", "syscon"; + reg = <0x61840000 0x4000>; + + clock-controller { + compatible = "socionext,uniphier-ld20-clock"; + #clock-cells = <1>; + }; + + reset-controller { + compatible = "socionext,uniphier-ld20-reset"; + #reset-cells = <1>; + }; + + watchdog { + compatible = "socionext,uniphier-wdt"; + }; + + thermal-sensor { + compatible = "socionext,uniphier-ld20-thermal"; + interrupts = ; + #thermal-sensor-cells = <0>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index f61eb221415b..5035336998a3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3103,6 +3103,7 @@ S: Maintained F: Documentation/devicetree/bindings/arm/socionext/uniphier.yaml F: Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml F: Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml +F: Documentation/devicetree/bindings/soc/socionext/socionext,uniphier*.yaml F: arch/arm/boot/dts/uniphier* F: arch/arm/include/asm/hardware/cache-uniphier.h F: arch/arm/mach-uniphier/ -- cgit v1.2.3 From 0611adff8b3a9f8e6217a643506451162726de3a Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:42 +0900 Subject: dt-bindings: soc: socionext: Add UniPhier SoC-glue logic Add devicetree binding schema for the SoC-glue logic implemented on Socionext Uniphier SoCs. This SoC-glue logic is a set of miscellaneous function registers handling signals for specific devices outside system components, and also has multiple functions such as I/O pinmux, usb-phy, debug, clock-mux for a specific SoC, and so on. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-11-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../soc/socionext/socionext,uniphier-soc-glue.yaml | 115 +++++++++++++++++++++ 1 file changed, 115 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml new file mode 100644 index 000000000000..4b6852db4747 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SoC-glue logic + +maintainers: + - Kunihiko Hayashi + +description: |+ + SoC-glue logic implemented on Socionext UniPhier SoCs is a collection of + miscellaneous function registers handling signals outside system components. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld4-soc-glue + - socionext,uniphier-pro4-soc-glue + - socionext,uniphier-pro5-soc-glue + - socionext,uniphier-pxs2-soc-glue + - socionext,uniphier-sld8-soc-glue + - socionext,uniphier-ld11-soc-glue + - socionext,uniphier-ld20-soc-glue + - socionext,uniphier-pxs3-soc-glue + - socionext,uniphier-nx1-soc-glue + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + +patternProperties: + pinctrl: + $ref: /schemas/pinctrl/socionext,uniphier-pinctrl.yaml# + + usb-hub: + $ref: /schemas/phy/socionext,uniphier-usb2-phy.yaml# + + clock-controller: + $ref: /schemas/clock/socionext,uniphier-clock.yaml# + +allOf: + - if: + not: + properties: + compatible: + contains: + enum: + - socionext,uniphier-pro4-soc-glue + - socionext,uniphier-ld11-soc-glue + then: + properties: + usb-hub: false + + - if: + not: + properties: + compatible: + contains: + const: socionext,uniphier-pro4-soc-glue + then: + properties: + clock-controller: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@5f800000 { + compatible = "socionext,uniphier-pro4-soc-glue", + "simple-mfd", "syscon"; + reg = <0x5f800000 0x2000>; + + pinctrl { + compatible = "socionext,uniphier-pro4-pinctrl"; + }; + + usb-hub { + compatible = "socionext,uniphier-pro4-usb2-phy"; + #address-cells = <1>; + #size-cells = <0>; + + phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + + phy@2 { + reg = <2>; + #phy-cells = <0>; + }; + + phy@3 { + reg = <3>; + #phy-cells = <0>; + }; + }; + + clock-controller { + compatible = "socionext,uniphier-pro4-sg-clock"; + #clock-cells = <1>; + }; + }; -- cgit v1.2.3 From ddbbb9766b85d736e5bf5ed607e0862a952691d7 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:43 +0900 Subject: dt-bindings: soc: socionext: Add UniPhier SoC-glue logic debug part Add devicetree binding schema for the SoC-glue logic debug part implemented on Socionext Uniphier SoCs. This SoC-glue logic debug part is a set of miscellaneous function registers handling signals for specific devices outside system components, and also has multiple functions such as efuse, debug unit, several monitors for specific SoC, and so on. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-12-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext,uniphier-soc-glue-debug.yaml | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml new file mode 100644 index 000000000000..1341544d1df5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue-debug.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SoC-glue logic debug part + +maintainers: + - Kunihiko Hayashi + +description: |+ + SoC-glue logic debug part implemented on Socionext UniPhier SoCs is + a collection of miscellaneous function registers handling signals outside + system components for debug and monitor use. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld4-soc-glue-debug + - socionext,uniphier-pro4-soc-glue-debug + - socionext,uniphier-pro5-soc-glue-debug + - socionext,uniphier-pxs2-soc-glue-debug + - socionext,uniphier-sld8-soc-glue-debug + - socionext,uniphier-ld11-soc-glue-debug + - socionext,uniphier-ld20-soc-glue-debug + - socionext,uniphier-pxs3-soc-glue-debug + - socionext,uniphier-nx1-soc-glue-debug + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "^efuse@[0-9a-f]+$": + $ref: /schemas/nvmem/socionext,uniphier-efuse.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@5f900000 { + compatible = "socionext,uniphier-pxs2-soc-glue-debug", + "simple-mfd", "syscon"; + reg = <0x5f900000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x5f900000 0x2000>; + + efuse@100 { + compatible = "socionext,uniphier-efuse"; + reg = <0x100 0x28>; + }; + }; -- cgit v1.2.3 From 9fb31379f061b7130a244dd0ff58e0f0cf0ca495 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:44 +0900 Subject: dt-bindings: soc: socionext: Add UniPhier peripheral block Add devicetree binding schema for the peripheral block implemented on Socionext Uniphier SoCs. Peripheral block implemented on Socionext UniPhier SoCs is an integrated component of the peripherals including UART, I2C/FI2C, and SCSSI. Peripheral block has some function logics to control the component. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-13-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../soc/socionext/socionext,uniphier-perictrl.yaml | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml new file mode 100644 index 000000000000..0adcffe859ab --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-perictrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier peripheral block controller + +maintainers: + - Kunihiko Hayashi + +description: |+ + Peripheral block implemented on Socionext UniPhier SoCs is an integrated + component of the peripherals including UART, I2C/FI2C, and SCSSI. + Peripheral block controller is a logic to control the component. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld4-perictrl + - socionext,uniphier-pro4-perictrl + - socionext,uniphier-pro5-perictrl + - socionext,uniphier-pxs2-perictrl + - socionext,uniphier-sld8-perictrl + - socionext,uniphier-ld11-perictrl + - socionext,uniphier-ld20-perictrl + - socionext,uniphier-pxs3-perictrl + - socionext,uniphier-nx1-perictrl + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + $ref: /schemas/clock/socionext,uniphier-clock.yaml# + + reset-controller: + $ref: /schemas/reset/socionext,uniphier-reset.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@59820000 { + compatible = "socionext,uniphier-ld20-perictrl", + "simple-mfd", "syscon"; + reg = <0x59820000 0x200>; + + clock-controller { + compatible = "socionext,uniphier-ld20-peri-clock"; + #clock-cells = <1>; + }; + + reset-controller { + compatible = "socionext,uniphier-ld20-peri-reset"; + #reset-cells = <1>; + }; + }; -- cgit v1.2.3 From b3ad9754505ab717915d4e644e78e7d7888f4ef1 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:45 +0900 Subject: dt-bindings: soc: socionext: Add UniPhier media I/O block Add devicetree binding schema for the media I/O block implemented on Socionext Uniphier SoCs. This block is implemented on LD4, sLD8, Pro4, and LD11 SoCs. Media I/O block implemented on Socionext UniPhier SoCs is an integrated component of the stream type peripherals including SD, USB2.0, eMMC, and MIO-DMAC. Media I/O block has a common logic to control the component. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-14-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../soc/socionext/socionext,uniphier-mioctrl.yaml | 65 ++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml new file mode 100644 index 000000000000..2cc38bb5038e --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-mioctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier media I/O block (MIO) controller + +maintainers: + - Kunihiko Hayashi + +description: |+ + Media I/O block implemented on Socionext UniPhier SoCs is a legacy + integrated component of the stream type peripherals including USB2.0, + SD/eMMC, and MIO-DMAC. + Media I/O block has a common logic to control the component. + + Recent SoCs have SD interface logic specialized only for SD functions + as a subset of media I/O block. See socionext,uniphier-sdctrl.yaml. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld4-mioctrl + - socionext,uniphier-pro4-mioctrl + - socionext,uniphier-sld8-mioctrl + - socionext,uniphier-ld11-mioctrl + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + $ref: /schemas/clock/socionext,uniphier-clock.yaml# + + reset-controller: + $ref: /schemas/reset/socionext,uniphier-reset.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@5b3e0000 { + compatible = "socionext,uniphier-ld11-mioctrl", + "simple-mfd", "syscon"; + reg = <0x5b3e0000 0x800>; + + clock-controller { + compatible = "socionext,uniphier-ld11-mio-clock"; + #clock-cells = <1>; + }; + + reset-controller { + compatible = "socionext,uniphier-ld11-mio-reset"; + #reset-cells = <1>; + resets = <&sys_rst 7>; + }; + }; + -- cgit v1.2.3 From 6796f54e8143671deb13701d122f6f029def853b Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:46 +0900 Subject: dt-bindings: soc: socionext: Add UniPhier SD interface block Add devicetree binding schema for the SD interface block implemented on Socionext Uniphier SoCs. This SD interface block is attached outside SDHC, and has some SD related functions such as clock control, reset control, mode switch, and so on. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-15-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../soc/socionext/socionext,uniphier-sdctrl.yaml | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml new file mode 100644 index 000000000000..cb3b0d42739f --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sdctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SD interface logic + +maintainers: + - Kunihiko Hayashi + +description: |+ + SD interface logic implemented on Socionext UniPhier SoCs is + attached outside SDHC, and has some SD related functions such as + clock control, reset control, mode switch, and so on. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-pro5-sdctrl + - socionext,uniphier-pxs2-sdctrl + - socionext,uniphier-ld11-sdctrl + - socionext,uniphier-ld20-sdctrl + - socionext,uniphier-pxs3-sdctrl + - socionext,uniphier-nx1-sdctrl + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + $ref: /schemas/clock/socionext,uniphier-clock.yaml# + + reset-controller: + $ref: /schemas/reset/socionext,uniphier-reset.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@59810000 { + compatible = "socionext,uniphier-ld20-sdctrl", + "simple-mfd", "syscon"; + reg = <0x59810000 0x400>; + + clock-controller { + compatible = "socionext,uniphier-ld20-sd-clock"; + #clock-cells = <1>; + }; + + reset-controller { + compatible = "socionext,uniphier-ld20-sd-reset"; + #reset-cells = <1>; + }; + }; -- cgit v1.2.3 From 0c00d8d315f09ef8639369a7f12e270b7a86bf79 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:47 +0900 Subject: dt-bindings: soc: socionext: Add UniPhier ADAMV block Add devicetree binding schema for the ADAMV block implemented on Socionext Uniphier SoCs. The ADAMV block is analog signal amplifier that is a part of the external video and audio I/O system. This block is implemented on LD11 and LD20, and this is defined for controlling audio I/O reset only. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-16-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../soc/socionext/socionext,uniphier-adamv.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml new file mode 100644 index 000000000000..32d9cc2d72a8 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-adamv.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier ADAMV block + +maintainers: + - Kunihiko Hayashi + +description: |+ + ADAMV block implemented on Socionext UniPhier SoCs is an analog signal + amplifier that is a part of the external video and audio I/O system. + + This block is defined for controlling audio I/O reset only. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld11-adamv + - socionext,uniphier-ld20-adamv + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + reset-controller: + $ref: /schemas/reset/socionext,uniphier-reset.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@57920000 { + compatible = "socionext,uniphier-ld20-adamv", + "simple-mfd", "syscon"; + reg = <0x57920000 0x1000>; + + reset-controller { + compatible = "socionext,uniphier-ld20-adamv-reset"; + #reset-cells = <1>; + }; + }; -- cgit v1.2.3 From 5993f6bd555e2696bb4d79cf54b976cb58793534 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:48 +0900 Subject: dt-bindings: soc: socionext: Add UniPhier DWC3 USB glue layer Add DT binding schema for components belonging to the platform-specific DWC3 USB glue layer implemented in UniPhier SoCs. This USB glue layer works as a sideband logic for the host controller, including core reset, vbus control, PHYs, and some signals to the controller. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-17-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext/socionext,uniphier-dwc3-glue.yaml | 106 +++++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml new file mode 100644 index 000000000000..bd0def7236b5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SoC DWC3 USB3.0 glue layer + +maintainers: + - Kunihiko Hayashi + +description: |+ + DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is + a sideband logic handling signals to DWC3 host controller inside + USB3.0 component. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-pro4-dwc3-glue + - socionext,uniphier-pro5-dwc3-glue + - socionext,uniphier-pxs2-dwc3-glue + - socionext,uniphier-ld20-dwc3-glue + - socionext,uniphier-pxs3-dwc3-glue + - socionext,uniphier-nx1-dwc3-glue + - const: simple-mfd + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "^reset-controller@[0-9a-f]+$": + $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml# + + "^regulator@[0-9a-f]+$": + $ref: /schemas/regulator/socionext,uniphier-regulator.yaml# + + "^phy@[0-9a-f]+$": + oneOf: + - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml# + - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + usb@65b00000 { + compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd"; + reg = <0x65b00000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x65b00000 0x400>; + + reset-controller@0 { + compatible = "socionext,uniphier-ld20-usb3-reset"; + reg = <0x0 0x4>; + #reset-cells = <1>; + clock-names = "link"; + clocks = <&sys_clk 14>; + reset-names = "link"; + resets = <&sys_rst 14>; + }; + + regulator@100 { + compatible = "socionext,uniphier-ld20-usb3-regulator"; + reg = <0x100 0x10>; + clock-names = "link"; + clocks = <&sys_clk 14>; + reset-names = "link"; + resets = <&sys_rst 14>; + }; + + phy@200 { + compatible = "socionext,uniphier-ld20-usb3-hsphy"; + reg = <0x200 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 14>, <&sys_clk 16>; + reset-names = "link", "phy"; + resets = <&sys_rst 14>, <&sys_rst 16>; + }; + + phy@300 { + compatible = "socionext,uniphier-ld20-usb3-ssphy"; + reg = <0x300 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 14>, <&sys_clk 18>; + reset-names = "link", "phy"; + resets = <&sys_rst 14>, <&sys_rst 18>; + }; + }; + -- cgit v1.2.3 From 9e699b8985e62c93cb1ca84b27197b5c1cdbd596 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:49 +0900 Subject: dt-bindings: soc: socionext: Add UniPhier AHCI glue layer Add DT binding schema for components belonging to the platform-specific AHCI glue layer implemented in UniPhier SoCs. This AHCI glue layer works as a sideband logic for the host controller, including core reset, PHYs, and some signals to the controller. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-18-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext/socionext,uniphier-ahci-glue.yaml | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml new file mode 100644 index 000000000000..09f861cc068f --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SoC AHCI glue layer + +maintainers: + - Kunihiko Hayashi + +description: |+ + AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband + logic handling signals to AHCI host controller inside AHCI component. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-pro4-ahci-glue + - socionext,uniphier-pxs2-ahci-glue + - socionext,uniphier-pxs3-ahci-glue + - const: simple-mfd + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "^reset-controller@[0-9a-f]+$": + $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml# + + "phy@[0-9a-f]+$": + $ref: /schemas/phy/socionext,uniphier-ahci-phy.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + sata-controller@65700000 { + compatible = "socionext,uniphier-pxs3-ahci-glue", "simple-mfd"; + reg = <0x65b00000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x65700000 0x100>; + + reset-controller@0 { + compatible = "socionext,uniphier-pxs3-ahci-reset"; + reg = <0x0 0x4>; + clock-names = "link"; + clocks = <&sys_clk 28>; + reset-names = "link"; + resets = <&sys_rst 28>; + #reset-cells = <1>; + }; + + phy@10 { + compatible = "socionext,uniphier-pxs3-ahci-phy"; + reg = <0x10 0x10>; + clock-names = "link", "phy"; + clocks = <&sys_clk 28>, <&sys_clk 30>; + reset-names = "link", "phy"; + resets = <&sys_rst 28>, <&sys_rst 30>; + #phy-cells = <0>; + }; + }; -- cgit v1.2.3 From ec201955a53be4b57a467f7160724ff06289cead Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 19 Dec 2022 19:32:33 -0600 Subject: kbuild: Optionally enable schema checks for %.dtb targets While not documented, schema checks for single dtb targets mostly work already by setting 'CHECK_DTBS=1'. However, the dependencies are not handled and it only works if 'make dt_bindings_check' was run first and generated processed-schema.json. In addition, changing a binding file doesn't cause the schema to be rebuilt and dtb to be revalidated. Making this work turns out to be simple. Whenever CHECK_DTBS is set, make 'dt_binding_check' a 'dtbs_prepare' dependency. I reimplemented here what Masahiro had originally come up with a while back. Suggested-by: Masahiro Yamada Acked-by: Masahiro Yamada Reviewed-by: Dmitry Baryshkov Tested-by: Dmitry Baryshkov Tested-by: Marek Vasut Link: https://lore.kernel.org/r/20221220013233.2890335-1-robh@kernel.org Signed-off-by: Rob Herring --- Makefile | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index d4b6af8c09e9..b74503aec68c 100644 --- a/Makefile +++ b/Makefile @@ -1481,7 +1481,10 @@ dtbs_prepare: include/config/kernel.release scripts_dtc ifneq ($(filter dtbs_check, $(MAKECMDGOALS)),) export CHECK_DTBS=y -dtbs: dt_binding_check +endif + +ifneq ($(CHECK_DTBS),) +dtbs_prepare: dt_binding_check endif dtbs_check: dtbs @@ -1779,6 +1782,10 @@ help: @echo ' 3: more obscure warnings, can most likely be ignored' @echo ' e: warnings are being treated as errors' @echo ' Multiple levels can be combined with W=12 or W=123' + @$(if $(dtstree), \ + echo ' make CHECK_DTBS=1 [targets] Check all generated dtb files against schema'; \ + echo ' This can be applied both to "dtbs" and to individual "foo.dtb" targets' ; \ + ) @echo '' @echo 'Execute "make" or "make all" to build all targets marked with [*] ' @echo 'For further info see the ./README file' -- cgit v1.2.3 From 8e5d0c68f23ab139e472f93ebbcfda9545e9953b Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Tue, 20 Dec 2022 23:20:32 +0100 Subject: of: overlay: Fix trivial typo MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Permitted is spelled with two t. Signed-off-by: Ricardo Ribalda Reviewed-by: Philippe Mathieu-Daudé Link: https://lore.kernel.org/r/20221220-permited-v1-3-52ea9857fa61@chromium.org Signed-off-by: Rob Herring --- drivers/of/overlay.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c index ed4e6c144a68..2e01960f1aeb 100644 --- a/drivers/of/overlay.c +++ b/drivers/of/overlay.c @@ -1121,7 +1121,7 @@ static int node_overlaps_later_cs(struct overlay_changeset *remove_ovcs, * The topmost check is done by exploiting this property. For each * affected device node in the log list we check if this overlay is * the one closest to the tail. If another overlay has affected this - * device node and is closest to the tail, then removal is not permited. + * device node and is closest to the tail, then removal is not permitted. */ static int overlay_removal_is_ok(struct overlay_changeset *remove_ovcs) { -- cgit v1.2.3 From 00f2a08cd785d262c760282ec027caa6ea8975d4 Mon Sep 17 00:00:00 2001 From: Colin Foster Date: Thu, 22 Dec 2022 10:23:09 -0800 Subject: dt-bindings: memory-controllers: ti,gpmc: fix typo in description Fix typo where 'GPMC driver implements an interrupt controller' instead of 'and interrupt controller' Signed-off-by: Colin Foster Link: https://lore.kernel.org/r/20221222182309.575069-1-colin.foster@in-advantage.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml index 4f30173ad747..bc9406929f6c 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml @@ -90,7 +90,7 @@ properties: interrupt-controller: description: | - The GPMC driver implements and interrupt controller for + The GPMC driver implements an interrupt controller for the NAND events "fifoevent" and "termcount" plus the rising/falling edges on the GPMC_WAIT pins. The interrupt number mapping is as follows -- cgit v1.2.3 From a98bf9df1c332a2c447083e1a2ca9578cd9f0721 Mon Sep 17 00:00:00 2001 From: Xu Panda Date: Fri, 23 Dec 2022 10:39:12 +0800 Subject: of: base: use strscpy() to instead of strncpy() The implementation of strscpy() is more robust and safer. That's now the recommended way to copy NUL terminated strings. Signed-off-by: Xu Panda Signed-off-by: Yang Yang Link: https://lore.kernel.org/r/202212231039128402297@zte.com.cn Signed-off-by: Rob Herring --- drivers/of/base.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index d5a5c35eba72..ac6fde53342f 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1884,8 +1884,7 @@ static void of_alias_add(struct alias_prop *ap, struct device_node *np, { ap->np = np; ap->id = id; - strncpy(ap->stem, stem, stem_len); - ap->stem[stem_len] = 0; + strscpy(ap->stem, stem, stem_len + 1); list_add_tail(&ap->link, &aliases_lookup); pr_debug("adding DT alias:%s: stem=%s id=%i node=%pOF\n", ap->alias, ap->stem, ap->id, np); -- cgit v1.2.3 From 5314187a603b4e1a1b26e4c2d1677914e22d9d22 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 9 Dec 2022 11:16:36 -0600 Subject: dt-bindings: interrupt-controller: Convert Synquacer EXIU to DT schema Convert the Socionext Synquacer EXIU interrupt controller to DT schema format. Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221209171636.3351602-1-robh@kernel.org Signed-off-by: Rob Herring --- .../socionext,synquacer-exiu.txt | 31 ------------- .../socionext,synquacer-exiu.yaml | 53 ++++++++++++++++++++++ 2 files changed, 53 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt b/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt deleted file mode 100644 index dac0846fe789..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt +++ /dev/null @@ -1,31 +0,0 @@ -Socionext SynQuacer External Interrupt Unit (EXIU) - -The Socionext Synquacer SoC has an external interrupt unit (EXIU) -that forwards a block of 32 configurable input lines to 32 adjacent -level-high type GICv3 SPIs. - -Required properties: - -- compatible : Should be "socionext,synquacer-exiu". -- reg : Specifies base physical address and size of the - control registers. -- interrupt-controller : Identifies the node as an interrupt controller. -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value must be 3. -- socionext,spi-base : The SPI number of the first SPI of the 32 adjacent - ones the EXIU forwards its interrups to. - -Notes: - -- Only SPIs can use the EXIU as an interrupt parent. - -Example: - - exiu: interrupt-controller@510c0000 { - compatible = "socionext,synquacer-exiu"; - reg = <0x0 0x510c0000 0x0 0x20>; - interrupt-controller; - interrupt-parent = <&gic>; - #interrupt-cells = <3>; - socionext