From 83bed3c159f44bf2e205875feb8d932bbcf1b656 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Mon, 2 Dec 2024 11:28:01 +0100 Subject: hwmon: (pmbus/core) add wp module param Add a module parameter to force the write protection mode of pmbus chips. 4 protections modes are provided to start with: * 0: Remove the write protection * 1: Disable all writes except to the WRITE_PROTECT, OPERATION, PAGE, ON_OFF_CONFIG and VOUT_COMMAND commands * 2: Disable all writes except to the WRITE_PROTECT, OPERATION and PAGE commands * 3: Disable all writes except to the WRITE_PROTECT command Of course, if the parameter is not provided, the default write protection status of the pmbus chips is left untouched. Suggested-by: Guenter Roeck Signed-off-by: Jerome Brunet Signed-off-by: Guenter Roeck --- Documentation/hwmon/pmbus-core.rst | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation/hwmon') diff --git a/Documentation/hwmon/pmbus-core.rst b/Documentation/hwmon/pmbus-core.rst index 0a251960f891..fdfb23773148 100644 --- a/Documentation/hwmon/pmbus-core.rst +++ b/Documentation/hwmon/pmbus-core.rst @@ -387,3 +387,24 @@ PMBUS_VOUT_PROTECTED Set if the chip VOUT_COMMAND command is protected and protection is not determined by the standard WRITE_PROTECT command. + +Module parameter +---------------- + +pmbus_core.wp: PMBus write protect forced mode + +PMBus may come up with a variety of write protection configuration. +'pmbus_core.wp' may be used if a particular write protection is necessary. +The ability to actually alter the protection may also depend on the chip +so the actual runtime write protection configuration may differ from +the requested one. pmbus_core currently support the following value: + +* 0: write protection removed. +* 1: Disable all writes except to the WRITE_PROTECT, OPERATION, + PAGE, ON_OFF_CONFIG and VOUT_COMMAND commands. +* 2: Disable all writes except to the WRITE_PROTECT, OPERATION and + PAGE commands. +* 3: Disable all writes except to the WRITE_PROTECT command. Note that + protection should include the PAGE register. This may be problematic + for multi-page chips, if the chips strictly follows the PMBus + specification, preventing the chip from changing the active page. -- cgit v1.2.3