From deae26bf6a10e47983606f5df080b91e97650ead Mon Sep 17 00:00:00 2001 From: Kyle McMartin Date: Mon, 28 Jul 2008 23:02:13 -0400 Subject: parisc: move include/asm-parisc to arch/parisc/include/asm --- include/asm-parisc/Kbuild | 3 - include/asm-parisc/a.out.h | 20 - include/asm-parisc/agp.h | 24 - include/asm-parisc/asmregs.h | 183 ------ include/asm-parisc/assembly.h | 519 ----------------- include/asm-parisc/atomic.h | 348 ----------- include/asm-parisc/auxvec.h | 4 - include/asm-parisc/bitops.h | 239 -------- include/asm-parisc/bug.h | 92 --- include/asm-parisc/bugs.h | 19 - include/asm-parisc/byteorder.h | 82 --- include/asm-parisc/cache.h | 60 -- include/asm-parisc/cacheflush.h | 121 ---- include/asm-parisc/checksum.h | 210 ------- include/asm-parisc/compat.h | 165 ------ include/asm-parisc/compat_rt_sigframe.h | 50 -- include/asm-parisc/compat_signal.h | 2 - include/asm-parisc/compat_ucontext.h | 17 - include/asm-parisc/cputime.h | 6 - include/asm-parisc/current.h | 15 - include/asm-parisc/delay.h | 43 -- include/asm-parisc/device.h | 7 - include/asm-parisc/div64.h | 1 - include/asm-parisc/dma-mapping.h | 253 -------- include/asm-parisc/dma.h | 186 ------ include/asm-parisc/eisa_bus.h | 23 - include/asm-parisc/eisa_eeprom.h | 153 ----- include/asm-parisc/elf.h | 342 ----------- include/asm-parisc/emergency-restart.h | 6 - include/asm-parisc/errno.h | 124 ---- include/asm-parisc/fb.h | 19 - include/asm-parisc/fcntl.h | 39 -- include/asm-parisc/fixmap.h | 30 - include/asm-parisc/floppy.h | 271 --------- include/asm-parisc/futex.h | 77 --- include/asm-parisc/grfioctl.h | 113 ---- include/asm-parisc/hardirq.h | 29 - include/asm-parisc/hardware.h | 127 ---- include/asm-parisc/hw_irq.h | 8 - include/asm-parisc/ide.h | 61 -- include/asm-parisc/io.h | 293 ---------- include/asm-parisc/ioctl.h | 44 -- include/asm-parisc/ioctls.h | 90 --- include/asm-parisc/ipcbuf.h | 27 - include/asm-parisc/irq.h | 57 -- include/asm-parisc/irq_regs.h | 1 - include/asm-parisc/kdebug.h | 1 - include/asm-parisc/kmap_types.h | 30 - include/asm-parisc/led.h | 42 -- include/asm-parisc/linkage.h | 31 - include/asm-parisc/local.h | 1 - include/asm-parisc/machdep.h | 16 - include/asm-parisc/mc146818rtc.h | 9 - include/asm-parisc/mckinley.h | 9 - include/asm-parisc/mman.h | 61 -- include/asm-parisc/mmu.h | 7 - include/asm-parisc/mmu_context.h | 75 --- include/asm-parisc/mmzone.h | 73 --- include/asm-parisc/module.h | 32 -- include/asm-parisc/msgbuf.h | 37 -- include/asm-parisc/mutex.h | 9 - include/asm-parisc/page.h | 173 ------ include/asm-parisc/param.h | 22 - include/asm-parisc/parisc-device.h | 64 --- include/asm-parisc/parport.h | 18 - include/asm-parisc/pci.h | 294 ---------- include/asm-parisc/pdc.h | 760 ------------------------ include/asm-parisc/pdc_chassis.h | 381 ------------ include/asm-parisc/pdcpat.h | 308 ---------- include/asm-parisc/percpu.h | 7 - include/asm-parisc/perf.h | 74 --- include/asm-parisc/pgalloc.h | 149 ----- include/asm-parisc/pgtable.h | 508 ---------------- include/asm-parisc/poll.h | 1 - include/asm-parisc/posix_types.h | 129 ----- include/asm-parisc/prefetch.h | 39 -- include/asm-parisc/processor.h | 357 ------------ include/asm-parisc/psw.h | 62 -- include/asm-parisc/ptrace.h | 58 -- include/asm-parisc/real.h | 5 - include/asm-parisc/resource.h | 7 - include/asm-parisc/ropes.h | 322 ----------- include/asm-parisc/rt_sigframe.h | 23 - include/asm-parisc/rtc.h | 131 ----- include/asm-parisc/runway.h | 12 - include/asm-parisc/scatterlist.h | 27 - include/asm-parisc/sections.h | 12 - include/asm-parisc/segment.h | 6 - include/asm-parisc/sembuf.h | 29 - include/asm-parisc/serial.h | 10 - include/asm-parisc/setup.h | 6 - include/asm-parisc/shmbuf.h | 58 -- include/asm-parisc/shmparam.h | 8 - include/asm-parisc/sigcontext.h | 20 - include/asm-parisc/siginfo.h | 14 - include/asm-parisc/signal.h | 153 ----- include/asm-parisc/smp.h | 68 --- include/asm-parisc/socket.h | 62 -- include/asm-parisc/sockios.h | 13 - include/asm-parisc/spinlock.h | 194 ------- include/asm-parisc/spinlock_types.h | 21 - include/asm-parisc/stat.h | 100 ---- include/asm-parisc/statfs.h | 58 -- include/asm-parisc/string.h | 10 - include/asm-parisc/superio.h | 85 --- include/asm-parisc/system.h | 182 ------ include/asm-parisc/termbits.h | 200 ------- include/asm-parisc/termios.h | 90 --- include/asm-parisc/thread_info.h | 74 --- include/asm-parisc/timex.h | 20 - include/asm-parisc/tlb.h | 27 - include/asm-parisc/tlbflush.h | 80 --- include/asm-parisc/topology.h | 6 - include/asm-parisc/traps.h | 16 - include/asm-parisc/types.h | 36 -- include/asm-parisc/uaccess.h | 244 -------- include/asm-parisc/ucontext.h | 12 - include/asm-parisc/unaligned.h | 16 - include/asm-parisc/unistd.h | 991 -------------------------------- include/asm-parisc/unwind.h | 77 --- include/asm-parisc/user.h | 5 - include/asm-parisc/vga.h | 6 - include/asm-parisc/xor.h | 1 - 123 files changed, 11977 deletions(-) delete mode 100644 include/asm-parisc/Kbuild delete mode 100644 include/asm-parisc/a.out.h delete mode 100644 include/asm-parisc/agp.h delete mode 100644 include/asm-parisc/asmregs.h delete mode 100644 include/asm-parisc/assembly.h delete mode 100644 include/asm-parisc/atomic.h delete mode 100644 include/asm-parisc/auxvec.h delete mode 100644 include/asm-parisc/bitops.h delete mode 100644 include/asm-parisc/bug.h delete mode 100644 include/asm-parisc/bugs.h delete mode 100644 include/asm-parisc/byteorder.h delete mode 100644 include/asm-parisc/cache.h delete mode 100644 include/asm-parisc/cacheflush.h delete mode 100644 include/asm-parisc/checksum.h delete mode 100644 include/asm-parisc/compat.h delete mode 100644 include/asm-parisc/compat_rt_sigframe.h delete mode 100644 include/asm-parisc/compat_signal.h delete mode 100644 include/asm-parisc/compat_ucontext.h delete mode 100644 include/asm-parisc/cputime.h delete mode 100644 include/asm-parisc/current.h delete mode 100644 include/asm-parisc/delay.h delete mode 100644 include/asm-parisc/device.h delete mode 100644 include/asm-parisc/div64.h delete mode 100644 include/asm-parisc/dma-mapping.h delete mode 100644 include/asm-parisc/dma.h delete mode 100644 include/asm-parisc/eisa_bus.h delete mode 100644 include/asm-parisc/eisa_eeprom.h delete mode 100644 include/asm-parisc/elf.h delete mode 100644 include/asm-parisc/emergency-restart.h delete mode 100644 include/asm-parisc/errno.h delete mode 100644 include/asm-parisc/fb.h delete mode 100644 include/asm-parisc/fcntl.h delete mode 100644 include/asm-parisc/fixmap.h delete mode 100644 include/asm-parisc/floppy.h delete mode 100644 include/asm-parisc/futex.h delete mode 100644 include/asm-parisc/grfioctl.h delete mode 100644 include/asm-parisc/hardirq.h delete mode 100644 include/asm-parisc/hardware.h delete mode 100644 include/asm-parisc/hw_irq.h delete mode 100644 include/asm-parisc/ide.h delete mode 100644 include/asm-parisc/io.h delete mode 100644 include/asm-parisc/ioctl.h delete mode 100644 include/asm-parisc/ioctls.h delete mode 100644 include/asm-parisc/ipcbuf.h delete mode 100644 include/asm-parisc/irq.h delete mode 100644 include/asm-parisc/irq_regs.h delete mode 100644 include/asm-parisc/kdebug.h delete mode 100644 include/asm-parisc/kmap_types.h delete mode 100644 include/asm-parisc/led.h delete mode 100644 include/asm-parisc/linkage.h delete mode 100644 include/asm-parisc/local.h delete mode 100644 include/asm-parisc/machdep.h delete mode 100644 include/asm-parisc/mc146818rtc.h delete mode 100644 include/asm-parisc/mckinley.h delete mode 100644 include/asm-parisc/mman.h delete mode 100644 include/asm-parisc/mmu.h delete mode 100644 include/asm-parisc/mmu_context.h delete mode 100644 include/asm-parisc/mmzone.h delete mode 100644 include/asm-parisc/module.h delete mode 100644 include/asm-parisc/msgbuf.h delete mode 100644 include/asm-parisc/mutex.h delete mode 100644 include/asm-parisc/page.h delete mode 100644 include/asm-parisc/param.h delete mode 100644 include/asm-parisc/parisc-device.h delete mode 100644 include/asm-parisc/parport.h delete mode 100644 include/asm-parisc/pci.h delete mode 100644 include/asm-parisc/pdc.h delete mode 100644 include/asm-parisc/pdc_chassis.h delete mode 100644 include/asm-parisc/pdcpat.h delete mode 100644 include/asm-parisc/percpu.h delete mode 100644 include/asm-parisc/perf.h delete mode 100644 include/asm-parisc/pgalloc.h delete mode 100644 include/asm-parisc/pgtable.h delete mode 100644 include/asm-parisc/poll.h delete mode 100644 include/asm-parisc/posix_types.h delete mode 100644 include/asm-parisc/prefetch.h delete mode 100644 include/asm-parisc/processor.h delete mode 100644 include/asm-parisc/psw.h delete mode 100644 include/asm-parisc/ptrace.h delete mode 100644 include/asm-parisc/real.h delete mode 100644 include/asm-parisc/resource.h delete mode 100644 include/asm-parisc/ropes.h delete mode 100644 include/asm-parisc/rt_sigframe.h delete mode 100644 include/asm-parisc/rtc.h delete mode 100644 include/asm-parisc/runway.h delete mode 100644 include/asm-parisc/scatterlist.h delete mode 100644 include/asm-parisc/sections.h delete mode 100644 include/asm-parisc/segment.h delete mode 100644 include/asm-parisc/sembuf.h delete mode 100644 include/asm-parisc/serial.h delete mode 100644 include/asm-parisc/setup.h delete mode 100644 include/asm-parisc/shmbuf.h delete mode 100644 include/asm-parisc/shmparam.h delete mode 100644 include/asm-parisc/sigcontext.h delete mode 100644 include/asm-parisc/siginfo.h delete mode 100644 include/asm-parisc/signal.h delete mode 100644 include/asm-parisc/smp.h delete mode 100644 include/asm-parisc/socket.h delete mode 100644 include/asm-parisc/sockios.h delete mode 100644 include/asm-parisc/spinlock.h delete mode 100644 include/asm-parisc/spinlock_types.h delete mode 100644 include/asm-parisc/stat.h delete mode 100644 include/asm-parisc/statfs.h delete mode 100644 include/asm-parisc/string.h delete mode 100644 include/asm-parisc/superio.h delete mode 100644 include/asm-parisc/system.h delete mode 100644 include/asm-parisc/termbits.h delete mode 100644 include/asm-parisc/termios.h delete mode 100644 include/asm-parisc/thread_info.h delete mode 100644 include/asm-parisc/timex.h delete mode 100644 include/asm-parisc/tlb.h delete mode 100644 include/asm-parisc/tlbflush.h delete mode 100644 include/asm-parisc/topology.h delete mode 100644 include/asm-parisc/traps.h delete mode 100644 include/asm-parisc/types.h delete mode 100644 include/asm-parisc/uaccess.h delete mode 100644 include/asm-parisc/ucontext.h delete mode 100644 include/asm-parisc/unaligned.h delete mode 100644 include/asm-parisc/unistd.h delete mode 100644 include/asm-parisc/unwind.h delete mode 100644 include/asm-parisc/user.h delete mode 100644 include/asm-parisc/vga.h delete mode 100644 include/asm-parisc/xor.h (limited to 'include') diff --git a/include/asm-parisc/Kbuild b/include/asm-parisc/Kbuild deleted file mode 100644 index f88b252e419c..000000000000 --- a/include/asm-parisc/Kbuild +++ /dev/null @@ -1,3 +0,0 @@ -include include/asm-generic/Kbuild.asm - -unifdef-y += pdc.h diff --git a/include/asm-parisc/a.out.h b/include/asm-parisc/a.out.h deleted file mode 100644 index eb04e34c5bb1..000000000000 --- a/include/asm-parisc/a.out.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __PARISC_A_OUT_H__ -#define __PARISC_A_OUT_H__ - -struct exec -{ - unsigned int a_info; /* Use macros N_MAGIC, etc for access */ - unsigned a_text; /* length of text, in bytes */ - unsigned a_data; /* length of data, in bytes */ - unsigned a_bss; /* length of uninitialized data area for file, in bytes */ - unsigned a_syms; /* length of symbol table data in file, in bytes */ - unsigned a_entry; /* start address */ - unsigned a_trsize; /* length of relocation info for text, in bytes */ - unsigned a_drsize; /* length of relocation info for data, in bytes */ -}; - -#define N_TRSIZE(a) ((a).a_trsize) -#define N_DRSIZE(a) ((a).a_drsize) -#define N_SYMSIZE(a) ((a).a_syms) - -#endif /* __A_OUT_GNU_H__ */ diff --git a/include/asm-parisc/agp.h b/include/asm-parisc/agp.h deleted file mode 100644 index 9651660da639..000000000000 --- a/include/asm-parisc/agp.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _ASM_PARISC_AGP_H -#define _ASM_PARISC_AGP_H - -/* - * PARISC specific AGP definitions. - * Copyright (c) 2006 Kyle McMartin - * - */ - -#define map_page_into_agp(page) /* nothing */ -#define unmap_page_from_agp(page) /* nothing */ -#define flush_agp_cache() mb() - -/* Convert a physical address to an address suitable for the GART. */ -#define phys_to_gart(x) (x) -#define gart_to_phys(x) (x) - -/* GATT allocation. Returns/accepts GATT kernel virtual address. */ -#define alloc_gatt_pages(order) \ - ((char *)__get_free_pages(GFP_KERNEL, (order))) -#define free_gatt_pages(table, order) \ - free_pages((unsigned long)(table), (order)) - -#endif /* _ASM_PARISC_AGP_H */ diff --git a/include/asm-parisc/asmregs.h b/include/asm-parisc/asmregs.h deleted file mode 100644 index d93c646e1887..000000000000 --- a/include/asm-parisc/asmregs.h +++ /dev/null @@ -1,183 +0,0 @@ -/* - * Copyright (C) 1999 Hewlett-Packard (Frank Rowand) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef _PARISC_ASMREGS_H -#define _PARISC_ASMREGS_H - -;! General Registers - -rp: .reg %r2 -arg3: .reg %r23 -arg2: .reg %r24 -arg1: .reg %r25 -arg0: .reg %r26 -dp: .reg %r27 -ret0: .reg %r28 -ret1: .reg %r29 -sl: .reg %r29 -sp: .reg %r30 - -#if 0 -/* PA20_REVISIT */ -arg7: .reg r19 -arg6: .reg r20 -arg5: .reg r21 -arg4: .reg r22 -gp: .reg r27 -ap: .reg r29 -#endif - - -r0: .reg %r0 -r1: .reg %r1 -r2: .reg %r2 -r3: .reg %r3 -r4: .reg %r4 -r5: .reg %r5 -r6: .reg %r6 -r7: .reg %r7 -r8: .reg %r8 -r9: .reg %r9 -r10: .reg %r10 -r11: .reg %r11 -r12: .reg %r12 -r13: .reg %r13 -r14: .reg %r14 -r15: .reg %r15 -r16: .reg %r16 -r17: .reg %r17 -r18: .reg %r18 -r19: .reg %r19 -r20: .reg %r20 -r21: .reg %r21 -r22: .reg %r22 -r23: .reg %r23 -r24: .reg %r24 -r25: .reg %r25 -r26: .reg %r26 -r27: .reg %r27 -r28: .reg %r28 -r29: .reg %r29 -r30: .reg %r30 -r31: .reg %r31 - - -;! Space Registers - -sr0: .reg %sr0 -sr1: .reg %sr1 -sr2: .reg %sr2 -sr3: .reg %sr3 -sr4: .reg %sr4 -sr5: .reg %sr5 -sr6: .reg %sr6 -sr7: .reg %sr7 - - -;! Floating Point Registers - -fr0: .reg %fr0 -fr1: .reg %fr1 -fr2: .reg %fr2 -fr3: .reg %fr3 -fr4: .reg %fr4 -fr5: .reg %fr5 -fr6: .reg %fr6 -fr7: .reg %fr7 -fr8: .reg %fr8 -fr9: .reg %fr9 -fr10: .reg %fr10 -fr11: .reg %fr11 -fr12: .reg %fr12 -fr13: .reg %fr13 -fr14: .reg %fr14 -fr15: .reg %fr15 -fr16: .reg %fr16 -fr17: .reg %fr17 -fr18: .reg %fr18 -fr19: .reg %fr19 -fr20: .reg %fr20 -fr21: .reg %fr21 -fr22: .reg %fr22 -fr23: .reg %fr23 -fr24: .reg %fr24 -fr25: .reg %fr25 -fr26: .reg %fr26 -fr27: .reg %fr27 -fr28: .reg %fr28 -fr29: .reg %fr29 -fr30: .reg %fr30 -fr31: .reg %fr31 - - -;! Control Registers - -rctr: .reg %cr0 -pidr1: .reg %cr8 -pidr2: .reg %cr9 -ccr: .reg %cr10 -sar: .reg %cr11 -pidr3: .reg %cr12 -pidr4: .reg %cr13 -iva: .reg %cr14 -eiem: .reg %cr15 -itmr: .reg %cr16 -pcsq: .reg %cr17 -pcoq: .reg %cr18 -iir: .reg %cr19 -isr: .reg %cr20 -ior: .reg %cr21 -ipsw: .reg %cr22 -eirr: .reg %cr23 -tr0: .reg %cr24 -tr1: .reg %cr25 -tr2: .reg %cr26 -tr3: .reg %cr27 -tr4: .reg %cr28 -tr5: .reg %cr29 -tr6: .reg %cr30 -tr7: .reg %cr31 - - -cr0: .reg %cr0 -cr8: .reg %cr8 -cr9: .reg %cr9 -cr10: .reg %cr10 -cr11: .reg %cr11 -cr12: .reg %cr12 -cr13: .reg %cr13 -cr14: .reg %cr14 -cr15: .reg %cr15 -cr16: .reg %cr16 -cr17: .reg %cr17 -cr18: .reg %cr18 -cr19: .reg %cr19 -cr20: .reg %cr20 -cr21: .reg %cr21 -cr22: .reg %cr22 -cr23: .reg %cr23 -cr24: .reg %cr24 -cr25: .reg %cr25 -cr26: .reg %cr26 -cr27: .reg %cr27 -cr28: .reg %cr28 -cr29: .reg %cr29 -cr30: .reg %cr30 -cr31: .reg %cr31 - -#endif diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h deleted file mode 100644 index ffb208840ecc..000000000000 --- a/include/asm-parisc/assembly.h +++ /dev/null @@ -1,519 +0,0 @@ -/* - * Copyright (C) 1999 Hewlett-Packard (Frank Rowand) - * Copyright (C) 1999 Philipp Rumpf - * Copyright (C) 1999 SuSE GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef _PARISC_ASSEMBLY_H -#define _PARISC_ASSEMBLY_H - -#define CALLEE_FLOAT_FRAME_SIZE 80 - -#ifdef CONFIG_64BIT -#define LDREG ldd -#define STREG std -#define LDREGX ldd,s -#define LDREGM ldd,mb -#define STREGM std,ma -#define SHRREG shrd -#define SHLREG shld -#define ANDCM andcm,* -#define COND(x) * ## x -#define RP_OFFSET 16 -#define FRAME_SIZE 128 -#define CALLEE_REG_FRAME_SIZE 144 -#define ASM_ULONG_INSN .dword -#else /* CONFIG_64BIT */ -#define LDREG ldw -#define STREG stw -#define LDREGX ldwx,s -#define LDREGM ldwm -#define STREGM stwm -#define SHRREG shr -#define SHLREG shlw -#define ANDCM andcm -#define COND(x) x -#define RP_OFFSET 20 -#define FRAME_SIZE 64 -#define CALLEE_REG_FRAME_SIZE 128 -#define ASM_ULONG_INSN .word -#endif - -#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE) - -#ifdef CONFIG_PA20 -#define LDCW ldcw,co -#define BL b,l -# ifdef CONFIG_64BIT -# define LEVEL 2.0w -# else -# define LEVEL 2.0 -# endif -#else -#define LDCW ldcw -#define BL bl -#define LEVEL 1.1 -#endif - -#ifdef __ASSEMBLY__ - -#ifdef CONFIG_64BIT -/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so - * work around that for now... */ - .level 2.0w -#endif - -#include -#include - -#include - - sp = 30 - gp = 27 - ipsw = 22 - - /* - * We provide two versions of each macro to convert from physical - * to virtual and vice versa. The "_r1" versions take one argument - * register, but trashes r1 to do the conversion. The other - * version takes two arguments: a src and destination register. - * However, the source and destination registers can not be - * the same register. - */ - - .macro tophys grvirt, grphys - ldil L%(__PAGE_OFFSET), \grphys - sub \grvirt, \grphys, \grphys - .endm - - .macro tovirt grphys, grvirt - ldil L%(__PAGE_OFFSET), \grvirt - add \grphys, \grvirt, \grvirt - .endm - - .macro tophys_r1 gr - ldil L%(__PAGE_OFFSET), %r1 - sub \gr, %r1, \gr - .endm - - .macro tovirt_r1 gr - ldil L%(__PAGE_OFFSET), %r1 - add \gr, %r1, \gr - .endm - - .macro delay value - ldil L%\value, 1 - ldo R%\value(1), 1 - addib,UV,n -1,1,. - addib,NUV,n -1,1,.+8 - nop - .endm - - .macro debug value - .endm - - - /* Shift Left - note the r and t can NOT be the same! */ - .macro shl r, sa, t - dep,z \r, 31-\sa, 32-\sa, \t - .endm - - /* The PA 2.0 shift left */ - .macro shlw r, sa, t - depw,z \r, 31-\sa, 32-\sa, \t - .endm - - /* And the PA 2.0W shift left */ - .macro shld r, sa, t - depd,z \r, 63-\sa, 64-\sa, \t - .endm - - /* Shift Right - note the r and t can NOT be the same! */ - .macro shr r, sa, t - extru \r, 31-\sa, 32-\sa, \t - .endm - - /* pa20w version of shift right */ - .macro shrd r, sa, t - extrd,u \r, 63-\sa, 64-\sa, \t - .endm - - /* load 32-bit 'value' into 'reg' compensating for the ldil - * sign-extension when running in wide mode. - * WARNING!! neither 'value' nor 'reg' can be expressions - * containing '.'!!!! */ - .macro load32 value, reg - ldil L%\value, \reg - ldo R%\value(\reg), \reg - .endm - - .macro loadgp -#ifdef CONFIG_64BIT - ldil L%__gp, %r27 - ldo R%__gp(%r27), %r27 -#else - ldil L%$global$, %r27 - ldo R%$global$(%r27), %r27 -#endif - .endm - -#define SAVE_SP(r, where) mfsp r, %r1 ! STREG %r1, where -#define REST_SP(r, where) LDREG where, %r1 ! mtsp %r1, r -#define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where -#define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r - - .macro save_general regs - STREG %r1, PT_GR1 (\regs) - STREG %r2, PT_GR2 (\regs) - STREG %r3, PT_GR3 (\regs) - STREG %r4, PT_GR4 (\regs) - STREG %r5, PT_GR5 (\regs) - STREG %r6, PT_GR6 (\regs) - STREG %r7, PT_GR7 (\regs) - STREG %r8, PT_GR8 (\regs) - STREG %r9, PT_GR9 (\regs) - STREG %r10, PT_GR10(\regs) - STREG %r11, PT_GR11(\regs) - STREG %r12, PT_GR12(\regs) - STREG %r13, PT_GR13(\regs) - STREG %r14, PT_GR14(\regs) - STREG %r15, PT_GR15(\regs) - STREG %r16, PT_GR16(\regs) - STREG %r17, PT_GR17(\regs) - STREG %r18, PT_GR18(\regs) - STREG %r19, PT_GR19(\regs) - STREG %r20, PT_GR20(\regs) - STREG %r21, PT_GR21(\regs) - STREG %r22, PT_GR22(\regs) - STREG %r23, PT_GR23(\regs) - STREG %r24, PT_GR24(\regs) - STREG %r25, PT_GR25(\regs) - /* r26 is saved in get_stack and used to preserve a value across virt_map */ - STREG %r27, PT_GR27(\regs) - STREG %r28, PT_GR28(\regs) - /* r29 is saved in get_stack and used to point to saved registers */ - /* r30 stack pointer saved in get_stack */ - STREG %r31, PT_GR31(\regs) - .endm - - .macro rest_general regs - /* r1 used as a temp in rest_stack and is restored there */ - LDREG PT_GR2 (\regs), %r2 - LDREG PT_GR3 (\regs), %r3 - LDREG PT_GR4 (\regs), %r4 - LDREG PT_GR5 (\regs), %r5 - LDREG PT_GR6 (\regs), %r6 - LDREG PT_GR7 (\regs), %r7 - LDREG PT_GR8 (\regs), %r8 - LDREG PT_GR9 (\regs), %r9 - LDREG PT_GR10(\regs), %r10 - LDREG PT_GR11(\regs), %r11 - LDREG PT_GR12(\regs), %r12 - LDREG PT_GR13(\regs), %r13 - LDREG PT_GR14(\regs), %r14 - LDREG PT_GR15(\regs), %r15 - LDREG PT_GR16(\regs), %r16 - LDREG PT_GR17(\regs), %r17 - LDREG PT_GR18(\regs), %r18 - LDREG PT_GR19(\regs), %r19 - LDREG PT_GR20(\regs), %r20 - LDREG PT_GR21(\regs), %r21 - LDREG PT_GR22(\regs), %r22 - LDREG PT_GR23(\regs), %r23 - LDREG PT_GR24(\regs), %r24 - LDREG PT_GR25(\regs), %r25 - LDREG PT_GR26(\regs), %r26 - LDREG PT_GR27(\regs), %r27 - LDREG PT_GR28(\regs), %r28 - /* r29 points to register save area, and is restored in rest_stack */ - /* r30 stack pointer restored in rest_stack */ - LDREG PT_GR31(\regs), %r31 - .endm - - .macro save_fp regs - fstd,ma %fr0, 8(\regs) - fstd,ma %fr1, 8(\regs) - fstd,ma %fr2, 8(\regs) - fstd,ma %fr3, 8(\regs) - fstd,ma %fr4, 8(\regs) - fstd,ma %fr5, 8(\regs) - fstd,ma %fr6, 8(\regs) - fstd,ma %fr7, 8(\regs) - fstd,ma %fr8, 8(\regs) - fstd,ma %fr9, 8(\regs) - fstd,ma %fr10, 8(\regs) - fstd,ma %fr11, 8(\regs) - fstd,ma %fr12, 8(\regs) - fstd,ma %fr13, 8(\regs) - fstd,ma %fr14, 8(\regs) - fstd,ma %fr15, 8(\regs) - fstd,ma %fr16, 8(\regs) - fstd,ma %fr17, 8(\regs) - fstd,ma %fr18, 8(\regs) - fstd,ma %fr19, 8(\regs) - fstd,ma %fr20, 8(\regs) - fstd,ma %fr21, 8(\regs) - fstd,ma %fr22, 8(\regs) - fstd,ma %fr23, 8(\regs) - fstd,ma %fr24, 8(\regs) - fstd,ma %fr25, 8(\regs) - fstd,ma %fr26, 8(\regs) - fstd,ma %fr27, 8(\regs) - fstd,ma %fr28, 8(\regs) - fstd,ma %fr29, 8(\regs) - fstd,ma %fr30, 8(\regs) - fstd %fr31, 0(\regs) - .endm - - .macro rest_fp regs - fldd 0(\regs), %fr31 - fldd,mb -8(\regs), %fr30 - fldd,mb -8(\regs), %fr29 - fldd,mb -8(\regs), %fr28 - fldd,mb -8(\regs), %fr27 - fldd,mb -8(\regs), %fr26 - fldd,mb -8(\regs), %fr25 - fldd,mb -8(\regs), %fr24 - fldd,mb -8(\regs), %fr23 - fldd,mb -8(\regs), %fr22 - fldd,mb -8(\regs), %fr21 - fldd,mb -8(\regs), %fr20 - fldd,mb -8(\regs), %fr19 - fldd,mb -8(\regs), %fr18 - fldd,mb -8(\regs), %fr17 - fldd,mb -8(\regs), %fr16 - fldd,mb -8(\regs), %fr15 - fldd,mb -8(\regs), %fr14 - fldd,mb -8(\regs), %fr13 - fldd,mb -8(\regs), %fr12 - fldd,mb -8(\regs), %fr11 - fldd,mb -8(\regs), %fr10 - fldd,mb -8(\regs), %fr9 - fldd,mb -8(\regs), %fr8 - fldd,mb -8(\regs), %fr7 - fldd,mb -8(\regs), %fr6 - fldd,mb -8(\regs), %fr5 - fldd,mb -8(\regs), %fr4 - fldd,mb -8(\regs), %fr3 - fldd,mb -8(\regs), %fr2 - fldd,mb -8(\regs), %fr1 - fldd,mb -8(\regs), %fr0 - .endm - - .macro callee_save_float - fstd,ma %fr12, 8(%r30) - fstd,ma %fr13, 8(%r30) - fstd,ma %fr14, 8(%r30) - fstd,ma %fr15, 8(%r30) - fstd,ma %fr16, 8(%r30) - fstd,ma %fr17, 8(%r30) - fstd,ma %fr18, 8(%r30) - fstd,ma %fr19, 8(%r30) - fstd,ma %fr20, 8(%r30) - fstd,ma %fr21, 8(%r30) - .endm - - .macro callee_rest_float - fldd,mb -8(%r30), %fr21 - fldd,mb -8(%r30), %fr20 - fldd,mb -8(%r30), %fr19 - fldd,mb -8(%r30), %fr18 - fldd,mb -8(%r30), %fr17 - fldd,mb -8(%r30), %fr16 - fldd,mb -8(%r30), %fr15 - fldd,mb -8(%r30), %fr14 - fldd,mb -8(%r30), %fr13 - fldd,mb -8(%r30), %fr12 - .endm - -#ifdef CONFIG_64BIT - .macro callee_save - std,ma %r3, CALLEE_REG_FRAME_SIZE(%r30) - mfctl %cr27, %r3 - std %r4, -136(%r30) - std %r5, -128(%r30) - std %r6, -120(%r30) - std %r7, -112(%r30) - std %r8, -104(%r30) - std %r9, -96(%r30) - std %r10, -88(%r30) - std %r11, -80(%r30) - std %r12, -72(%r30) - std %r13, -64(%r30) - std %r14, -56(%r30) - std %r15, -48(%r30) - std %r16, -40(%r30) - std %r17, -32(%r30) - std %r18, -24(%r30) - std %r3, -16(%r30) - .endm - - .macro callee_rest - ldd -16(%r30), %r3 - ldd -24(%r30), %r18 - ldd -32(%r30), %r17 - ldd -40(%r30), %r16 - ldd -48(%r30), %r15 - ldd -56(%r30), %r14 - ldd -64(%r30), %r13 - ldd -72(%r30), %r12 - ldd -80(%r30), %r11 - ldd -88(%r30), %r10 - ldd -96(%r30), %r9 - ldd -104(%r30), %r8 - ldd -112(%r30), %r7 - ldd -120(%r30), %r6 - ldd -128(%r30), %r5 - ldd -136(%r30), %r4 - mtctl %r3, %cr27 - ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3 - .endm - -#else /* ! CONFIG_64BIT */ - - .macro callee_save - stw,ma %r3, CALLEE_REG_FRAME_SIZE(%r30) - mfctl %cr27, %r3 - stw %r4, -124(%r30) - stw %r5, -120(%r30) - stw %r6, -116(%r30) - stw %r7, -112(%r30) - stw %r8, -108(%r30) - stw %r9, -104(%r30) - stw %r10, -100(%r30) - stw %r11, -96(%r30) - stw %r12, -92(%r30) - stw %r13, -88(%r30) - stw %r14, -84(%r30) - stw %r15, -80(%r30) - stw %r16, -76(%r30) - stw %r17, -72(%r30) - stw %r18, -68(%r30) - stw %r3, -64(%r30) - .endm - - .macro callee_rest - ldw -64(%r30), %r3 - ldw -68(%r30), %r18 - ldw -72(%r30), %r17 - ldw -76(%r30), %r16 - ldw -80(%r30), %r15 - ldw -84(%r30), %r14 - ldw -88(%r30), %r13 - ldw -92(%r30), %r12 - ldw -96(%r30), %r11 - ldw -100(%r30), %r10 - ldw -104(%r30), %r9 - ldw -108(%r30), %r8 - ldw -112(%r30), %r7 - ldw -116(%r30), %r6 - ldw -120(%r30), %r5 - ldw -124(%r30), %r4 - mtctl %r3, %cr27 - ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3 - .endm -#endif /* ! CONFIG_64BIT */ - - .macro save_specials regs - - SAVE_SP (%sr0, PT_SR0 (\regs)) - SAVE_SP (%sr1, PT_SR1 (\regs)) - SAVE_SP (%sr2, PT_SR2 (\regs)) - SAVE_SP (%sr3, PT_SR3 (\regs)) - SAVE_SP (%sr4, PT_SR4 (\regs)) - SAVE_SP (%sr5, PT_SR5 (\regs)) - SAVE_SP (%sr6, PT_SR6 (\regs)) - SAVE_SP (%sr7, PT_SR7 (\regs)) - - SAVE_CR (%cr17, PT_IASQ0(\regs)) - mtctl %r0, %cr17 - SAVE_CR (%cr17, PT_IASQ1(\regs)) - - SAVE_CR (%cr18, PT_IAOQ0(\regs)) - mtctl %r0, %cr18 - SAVE_CR (%cr18, PT_IAOQ1(\regs)) - -#ifdef CONFIG_64BIT - /* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0 - * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only - * reads 5 bits. Use mfctl,w to read all six bits. Otherwise - * we lose the 6th bit on a save/restore over interrupt. - */ - mfctl,w %cr11, %r1 - STREG %r1, PT_SAR (\regs) -#else - SAVE_CR (%cr11, PT_SAR (\regs)) -#endif - SAVE_CR (%cr19, PT_IIR (\regs)) - - /* - * Code immediately following this macro (in intr_save) relies - * on r8 containing ipsw. - */ - mfctl %cr22, %r8 - STREG %r8, PT_PSW(\regs) - .endm - - .macro rest_specials regs - - REST_SP (%sr0, PT_SR0 (\regs)) - REST_SP (%sr1, PT_SR1 (\regs)) - REST_SP (%sr2, PT_SR2 (\regs)) - REST_SP (%sr3, PT_SR3 (\regs)) - REST_SP (%sr4, PT_SR4 (\regs)) - REST_SP (%sr5, PT_SR5 (\regs)) - REST_SP (%sr6, PT_SR6 (\regs)) - REST_SP (%sr7, PT_SR7 (\regs)) - - REST_CR (%cr17, PT_IASQ0(\regs)) - REST_CR (%cr17, PT_IASQ1(\regs)) - - REST_CR (%cr18, PT_IAOQ0(\regs)) - REST_CR (%cr18, PT_IAOQ1(\regs)) - - REST_CR (%cr11, PT_SAR (\regs)) - - REST_CR (%cr22, PT_PSW (\regs)) - .endm - - - /* First step to create a "relied upon translation" - * See PA 2.0 Arch. page F-4 and F-5. - * - * The ssm was originally necessary due to a "PCxT bug". - * But someone decided it needed to be added to the architecture - * and this "feature" went into rev3 of PA-RISC 1.1 Arch Manual. - * It's been carried forward into PA 2.0 Arch as well. :^( - * - * "ssm 0,%r0" is a NOP with side effects (prefetch barrier). - * rsm/ssm prevents the ifetch unit from speculatively fetching - * instructions past this line in the code stream. - * PA 2.0 processor will single step all insn in the same QUAD (4 insn). - */ - .macro pcxt_ssm_bug - rsm PSW_SM_I,%r0 - nop /* 1 */ - nop /* 2 */ - nop /* 3 */ - nop /* 4 */ - nop /* 5 */ - nop /* 6 */ - nop /* 7 */ - .endm - -#endif /* __ASSEMBLY__ */ -#endif diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h deleted file mode 100644 index 57fcc4a5ebb4..000000000000 --- a/include/asm-parisc/atomic.h +++ /dev/null @@ -1,348 +0,0 @@ -/* Copyright (C) 2000 Philipp Rumpf - * Copyright (C) 2006 Kyle McMartin - */ - -#ifndef _ASM_PARISC_ATOMIC_H_ -#define _ASM_PARISC_ATOMIC_H_ - -#include -#include - -/* - * Atomic operations that C can't guarantee us. Useful for - * resource counting etc.. - * - * And probably incredibly slow on parisc. OTOH, we don't - * have to write any serious assembly. prumpf - */ - -#ifdef CONFIG_SMP -#include -#include /* we use L1_CACHE_BYTES */ - -/* Use an array of spinlocks for our atomic_ts. - * Hash function to index into a different SPINLOCK. - * Since "a" is usually an address, use one spinlock per cacheline. - */ -# define ATOMIC_HASH_SIZE 4 -# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ])) - -extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned; - -/* Can't use raw_spin_lock_irq because of #include problems, so - * this is the substitute */ -#define _atomic_spin_lock_irqsave(l,f) do { \ - raw_spinlock_t *s = ATOMIC_HASH(l); \ - local_irq_save(f); \ - __raw_spin_lock(s); \ -} while(0) - -#define _atomic_spin_unlock_irqrestore(l,f) do { \ - raw_spinlock_t *s = ATOMIC_HASH(l); \ - __raw_spin_unlock(s); \ - local_irq_restore(f); \ -} while(0) - - -#else -# define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0) -# define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0) -#endif - -/* This should get optimized out since it's never called. -** Or get a link error if xchg is used "wrong". -*/ -extern void __xchg_called_with_bad_pointer(void); - - -/* __xchg32/64 defined in arch/parisc/lib/bitops.c */ -extern unsigned long __xchg8(char, char *); -extern unsigned long __xchg32(int, int *); -#ifdef CONFIG_64BIT -extern unsigned long __xchg64(unsigned long, unsigned long *); -#endif - -/* optimizer better get rid of switch since size is a constant */ -static __inline__ unsigned long -__xchg(unsigned long x, __volatile__ void * ptr, int size) -{ - switch(size) { -#ifdef CONFIG_64BIT - case 8: return __xchg64(x,(unsigned long *) ptr); -#endif - case 4: return __xchg32((int) x, (int *) ptr); - case 1: return __xchg8((char) x, (char *) ptr); - } - __xchg_called_with_bad_pointer(); - return x; -} - - -/* -** REVISIT - Abandoned use of LDCW in xchg() for now: -** o need to test sizeof(*ptr) to avoid clearing adjacent bytes -** o and while we are at it, could CONFIG_64BIT code use LDCD too? -** -** if (__builtin_constant_p(x) && (x == NULL)) -** if (((unsigned long)p & 0xf) == 0) -** return __ldcw(p); -*/ -#define xchg(ptr,x) \ - ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) - - -#define __HAVE_ARCH_CMPXCHG 1 - -/* bug catcher for when unsupported size is used - won't link */ -extern void __cmpxchg_called_with_bad_pointer(void); - -/* __cmpxchg_u32/u64 defined in arch/parisc/lib/bitops.c */ -extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old, unsigned int new_); -extern unsigned long __cmpxchg_u64(volatile unsigned long *ptr, unsigned long old, unsigned long new_); - -/* don't worry...optimizer will get rid of most of this */ -static __inline__ unsigned long -__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size) -{ - switch(size) { -#ifdef CONFIG_64BIT - case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_); -#endif - case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_); - } - __cmpxchg_called_with_bad_pointer(); - return old; -} - -#define cmpxchg(ptr,o,n) \ - ({ \ - __typeof__(*(ptr)) _o_ = (o); \ - __typeof__(*(ptr)) _n_ = (n); \ - (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ - (unsigned long)_n_, sizeof(*(ptr))); \ - }) - -#include - -static inline unsigned long __cmpxchg_local(volatile void *ptr, - unsigned long old, - unsigned long new_, int size) -{ - switch (size) { -#ifdef CONFIG_64BIT - case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_); -#endif - case 4: return __cmpxchg_u32(ptr, old, new_); - default: - return __cmpxchg_local_generic(ptr, old, new_, size); - } -} - -/* - * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make - * them available. - */ -#define cmpxchg_local(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr)))) -#ifdef CONFIG_64BIT -#define cmpxchg64_local(ptr, o, n) \ - ({ \ - BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ - cmpxchg_local((ptr), (o), (n)); \ - }) -#else -#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) -#endif - -/* Note that we need not lock read accesses - aligned word writes/reads - * are atomic, so a reader never sees unconsistent values. - * - * Cache-line alignment would conflict with, for example, linux/module.h - */ - -typedef struct { volatile int counter; } atomic_t; - -/* It's possible to reduce all atomic operations to either - * __atomic_add_return, atomic_set and atomic_read (the latter - * is there only for consistency). - */ - -static __inline__ int __atomic_add_return(int i, atomic_t *v) -{ - int ret; - unsigned long flags; - _atomic_spin_lock_irqsave(v, flags); - - ret = (v->counter += i); - - _atomic_spin_unlock_irqrestore(v, flags); - return ret; -} - -static __inline__ void atomic_set(atomic_t *v, int i) -{ - unsigned long flags; - _atomic_spin_lock_irqsave(v, flags); - - v->counter = i; - - _atomic_spin_unlock_irqrestore(v, flags); -} - -static __inline__ int atomic_read(const atomic_t *v) -{ - return v->counter; -} - -/* exported interface */ -#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) - -/** - * atomic_add_unless - add unless the number is a given value - * @v: pointer of type atomic_t - * @a: the amount to add to v... - * @u: ...unless v is equal to u. - * - * Atomically adds @a to @v, so long as it was not @u. - * Returns non-zero if @v was not @u, and zero otherwise. - */ -static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) -{ - int c, old; - c = atomic_read(v); - for (;;) { - if (unlikely(c == (u))) - break; - old = atomic_cmpxchg((v), c, c + (a)); - if (likely(old == c)) - break; - c = old; - } - return c != (u); -} - -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v)))) -#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v)))) -#define atomic_inc(v) ((void)(__atomic_add_return( 1,(v)))) -#define atomic_dec(v) ((void)(__atomic_add_return( -1,(v)))) - -#define atomic_add_return(i,v) (__atomic_add_return( ((int)i),(v))) -#define atomic_sub_return(i,v) (__atomic_add_return(-((int)i),(v))) -#define atomic_inc_return(v) (__atomic_add_return( 1,(v))) -#define atomic_dec_return(v) (__atomic_add_return( -1,(v))) - -#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) - -/* - * atomic_inc_and_test - increment and test - * @v: pointer of type atomic_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) - -#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) - -#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0) - -#define ATOMIC_INIT(i) ((atomic_t) { (i) }) - -#define smp_mb__before_atomic_dec() smp_mb() -#define smp_mb__after_atomic_dec() smp_mb() -#define smp_mb__before_atomic_inc() smp_mb() -#define smp_mb__after_atomic_inc() smp_mb() - -#ifdef CONFIG_64BIT - -typedef struct { volatile s64 counter; } atomic64_t; - -#define ATOMIC64_INIT(i) ((atomic64_t) { (i) }) - -static __inline__ int -__atomic64_add_return(s64 i, atomic64_t *v) -{ - int ret; - unsigned long flags; - _atomic_spin_lock_irqsave(v, flags); - - ret = (v->counter += i); - - _atomic_spin_unlock_irqrestore(v, flags); - return ret; -} - -static __inline__ void -atomic64_set(atomic64_t *v, s64 i) -{ - unsigned long flags; - _atomic_spin_lock_irqsave(v, flags); - - v->counter = i; - - _atomic_spin_unlock_irqrestore(v, flags); -} - -static __inline__ s64 -atomic64_read(const atomic64_t *v) -{ - return v->counter; -} - -#define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)i),(v)))) -#define atomic64_sub(i,v) ((void)(__atomic64_add_return(-((s64)i),(v)))) -#define atomic64_inc(v) ((void)(__atomic64_add_return( 1,(v)))) -#define atomic64_dec(v) ((void)(__atomic64_add_return( -1,(v)))) - -#define atomic64_add_return(i,v) (__atomic64_add_return( ((s64)i),(v))) -#define atomic64_sub_return(i,v) (__atomic64_add_return(-((s64)i),(v))) -#define atomic64_inc_return(v) (__atomic64_add_return( 1,(v))) -#define atomic64_dec_return(v) (__atomic64_add_return( -1,(v))) - -#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) - -#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) -#define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0) -#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0) - -/* exported interface */ -#define atomic64_cmpxchg(v, o, n) \ - ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) -#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) - -/** - * atomic64_add_unless - add unless the number is a given value - * @v: pointer of type atomic64_t - * @a: the amount to add to v... - * @u: ...unless v is equal to u. - * - * Atomically adds @a to @v, so long as it was not @u. - * Returns non-zero if @v was not @u, and zero otherwise. - */ -static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) -{ - long c, old; - c = atomic64_read(v); - for (;;) { - if (unlikely(c == (u))) - break; - old = atomic64_cmpxchg((v), c, c + (a)); - if (likely(old == c)) - break; - c = old; - } - return c != (u); -} - -#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) - -#endif /* CONFIG_64BIT */ - -#include - -#endif /* _ASM_PARISC_ATOMIC_H_ */ diff --git a/include/asm-parisc/auxvec.h b/include/asm-parisc/auxvec.h deleted file mode 100644 index 9c3ac4b89dc9..000000000000 --- a/include/asm-parisc/auxvec.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASMPARISC_AUXVEC_H -#define __ASMPARISC_AUXVEC_H - -#endif diff --git a/include/asm-parisc/bitops.h b/include/asm-parisc/bitops.h deleted file mode 100644 index 7a6ea10bd231..000000000000 --- a/include/asm-parisc/bitops.h +++ /dev/null @@ -1,239 +0,0 @@ -#ifndef _PARISC_BITOPS_H -#define _PARISC_BITOPS_H - -#ifndef _LINUX_BITOPS_H -#error only can be included directly -#endif - -#include -#include /* for BITS_PER_LONG/SHIFT_PER_LONG */ -#include -#include - -/* - * HP-PARISC specific bit operations - * for a detailed description of the functions please refer - * to include/asm-i386/bitops.h or kerneldoc - */ - -#define CHOP_SHIFTCOUNT(x) (((unsigned long) (x)) & (BITS_PER_LONG - 1)) - - -#define smp_mb__before_clear_bit() smp_mb() -#define smp_mb__after_clear_bit() smp_mb() - -/* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion - * on use of volatile and __*_bit() (set/clear/change): - * *_bit() want use of volatile. - * __*_bit() are "relaxed" and don't use spinlock or volatile. - */ - -static __inline__ void set_bit(int nr, volatile unsigned long * addr) -{ - unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); - unsigned long flags; - - addr += (nr >> SHIFT_PER_LONG); - _atomic_spin_lock_irqsave(addr, flags); - *addr |= mask; - _atomic_spin_unlock_irqrestore(addr, flags); -} - -static __inline__ void clear_bit(int nr, volatile unsigned long * addr) -{ - unsigned long mask = ~(1UL << CHOP_SHIFTCOUNT(nr)); - unsigned long flags; - - addr += (nr >> SHIFT_PER_LONG); - _atomic_spin_lock_irqsave(addr, flags); - *addr &= mask; - _atomic_spin_unlock_irqrestore(addr, flags); -} - -static __inline__ void change_bit(int nr, volatile unsigned long * addr) -{ - unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); - unsigned long flags; - - addr += (nr >> SHIFT_PER_LONG); - _atomic_spin_lock_irqsave(addr, flags); - *addr ^= mask; - _atomic_spin_unlock_irqrestore(addr, flags); -} - -static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr) -{ - unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); - unsigned long old; - unsigned long flags; - int set; - - addr += (nr >> SHIFT_PER_LONG); - _atomic_spin_lock_irqsave(addr, flags); - old = *addr; - set = (old & mask) ? 1 : 0; - if (!set) - *addr = old | mask; - _atomic_spin_unlock_irqrestore(addr, flags); - - return set; -} - -static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr) -{ - unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); - unsigned long old; - unsigned long flags; - int set; - - addr += (nr >> SHIFT_PER_LONG); - _atomic_spin_lock_irqsave(addr, flags); - old = *addr; - set = (old & mask) ? 1 : 0; - if (set) - *addr = old & ~mask; - _atomic_spin_unlock_irqrestore(addr, flags); - - return set; -} - -static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr) -{ - unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); - unsigned long oldbit; - unsigned long flags; - - addr += (nr >> SHIFT_PER_LONG); - _atomic_spin_lock_irqsave(addr, flags); - oldbit = *addr; - *addr = oldbit ^ mask; - _atomic_spin_unlock_irqrestore(addr, flags); - - return (oldbit & mask) ? 1 : 0; -} - -#include - -#ifdef __KERNEL__ - -/** - * __ffs - find first bit in word. returns 0 to "BITS_PER_LONG-1". - * @word: The word to search - * - * __ffs() return is undefined if no bit is set. - * - * 32-bit fast __ffs by LaMont Jones "lamont At hp com". - * 64-bit enhancement by Grant Grundler "grundler At parisc-linux org". - * (with help from willy/jejb to get the semantics right) - * - * This algorithm avoids branches by making use of nullification. - * One side effect of "extr" instructions is it sets PSW[N] bit. - * How PSW[N] (nullify next insn) gets set is determined by the - * "condition" field (eg "<>" or "TR" below) in the extr* insn. - * Only the 1st and one of either the 2cd or 3rd insn will get executed. - * Each set of 3 insn will get executed in 2 cycles on PA8x00 vs 16 or so - * cycles for each mispredicted branch. - */ - -static __inline__ unsigned long __ffs(unsigned long x) -{ - unsigned long ret; - - __asm__( -#ifdef CONFIG_64BIT - " ldi 63,%1\n" - " extrd,u,*<> %0,63,32,%%r0\n" - " extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */ - " addi -32,%1,%1\n" -#else - " ldi 31,%1\n" -#endif - " extru,<> %0,31,16,%%r0\n" - " extru,TR %0,15,16,%0\n" /* xxxx0000 -> 0000xxxx */ - " addi -16,%1,%1\n" - " extru,<> %0,31,8,%%r0\n" - " extru,TR %0,23,8,%0\n" /* 0000xx00 -> 000000xx */ - " addi -8,%1,%1\n" - " extru,<> %0,31,4,%%r0\n" - " extru,TR %0,27,4,%0\n" /* 000000x0 -> 0000000x */ - " addi -4,%1,%1\n" - " extru,<> %0,31,2,%%r0\n" - " extru,TR %0,29,2,%0\n" /* 0000000y, 1100b -> 0011b */ - " addi -2,%1,%1\n" - " extru,= %0,31,1,%%r0\n" /* check last bit */ - " addi -1,%1,%1\n" - : "+r" (x), "=r" (ret) ); - return ret; -} - -#include - -/* - * ffs: find first bit set. returns 1 to BITS_PER_LONG or 0 (if none set) - * This is defined the same way as the libc and compiler builtin - * ffs routines, therefore differs in spirit from the above ffz (man ffs). - */ -static __inline__ int ffs(int x) -{ - return x ? (__ffs((unsigned long)x) + 1) : 0; -} - -/* - * fls: find last (most significant) bit set. - * fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. - */ - -static __inline__ int fls(int x) -{ - int ret; - if (!x) - return 0; - - __asm__( - " ldi 1,%1\n" - " extru,<> %0,15,16,%%r0\n" - " zdep,TR %0,15,16,%0\n" /* xxxx0000 */ - " addi 16,%1,%1\n" - " extru,<> %0,7,8,%%r0\n" - " zdep,TR %0,23,24,%0\n" /* xx000000 */ - " addi 8,%1,%1\n" - " extru,<> %0,3,4,%%r0\n" - " zdep,TR %0,27,28,%0\n" /* x0000000 */ - " addi 4,%1,%1\n" - " extru,<> %0,1,2,%%r0\n" - " zdep,TR %0,29,30,%0\n" /* y0000000 (y&3 = 0) */ - " addi 2,%1,%1\n" - " extru,= %0,0,1,%%r0\n" - " addi 1,%1,%1\n" /* if y & 8, add 1 */ - : "+r" (x), "=r" (ret) ); - - return ret; -} - -#include -#include -#include -#include -#include - -#endif /* __KERNEL__ */ - -#include - -#ifdef __KERNEL__ - -#include - -/* '3' is bits per byte */ -#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3) - -#define ext2_set_bit_atomic(l,nr,addr) \ - test_and_set_bit((nr) ^ LE_BYTE_ADDR, (unsigned long *)addr) -#define ext2_clear_bit_atomic(l,nr,addr) \ - test_and_clear_bit( (nr) ^ LE_BYTE_ADDR, (unsigned long *)addr) - -#endif /* __KERNEL__ */ - -#include - -#endif /* _PARISC_BITOPS_H */ diff --git a/include/asm-parisc/bug.h b/include/asm-parisc/bug.h deleted file mode 100644 index 8cfc553fc837..000000000000 --- a/include/asm-parisc/bug.h +++ /dev/null @@ -1,92 +0,0 @@ -#ifndef _PARISC_BUG_H -#define _PARISC_BUG_H - -/* - * Tell the user there is some problem. - * The offending file and line are encoded in the __bug_table section. - */ - -#ifdef CONFIG_BUG -#define HAVE_ARCH_BUG -#define HAVE_ARCH_WARN_ON - -/* the break instruction is used as BUG() marker. */ -#define PARISC_BUG_BREAK_ASM "break 0x1f, 0x1fff" -#define PARISC_BUG_BREAK_INSN 0x03ffe01f /* PARISC_BUG_BREAK_ASM */ - -#if defined(CONFIG_64BIT) -#define ASM_WORD_INSN ".dword\t" -#else -#define ASM_WORD_INSN ".word\t" -#endif - -#ifdef CONFIG_DEBUG_BUGVERBOSE -#define BUG() \ - do { \ - asm volatile("\n" \ - "1:\t" PARISC_BUG_BREAK_ASM "\n" \ - "\t.pushsection __bug_table,\"a\"\n" \ - "2:\t" ASM_WORD_INSN "1b, %c0\n" \ - "\t.short %c1, %c2\n" \ - "\t.org 2b+%c3\n" \ - "\t.popsection" \ - : : "i" (__FILE__), "i" (__LINE__), \ - "i" (0), "i" (sizeof(struct bug_entry)) ); \ - for(;;) ; \ - } while(0) - -#else -#define BUG() \ - do { \ - asm volatile(PARISC_BUG_BREAK_ASM : : ); \ - for(;;) ; \ - } while(0) -#endif - -#ifdef CONFIG_DEBUG_BUGVERBOSE -#define __WARN() \ - do { \ - asm volatile("\n" \ - "1:\t" PARISC_BUG_BREAK_ASM "\n" \ - "\t.pushsection __bug_table,\"a\"\n" \ - "2:\t" ASM_WORD_INSN "1b, %c0\n" \ - "\t.short %c1, %c2\n" \ - "\t.org 2b+%c3\n" \ - "\t.popsection" \ - : : "i" (__FILE__), "i" (__LINE__), \ - "i" (BUGFLAG_WARNING), \ - "i" (sizeof(struct bug_entry)) ); \ - } while(0) -#else -#define __WARN() \ - do { \ - asm volatile("\n" \ - "1:\t" PARISC_BUG_BREAK_ASM "\n" \ - "\t.pushsection __bug_table,\"a\"\n" \ - "2:\t" ASM_WORD_INSN "1b\n" \ - "\t.short %c0\n" \ - "\t.org 2b+%c1\n" \ - "\t.popsection" \ - : : "i" (BUGFLAG_WARNING), \ - "i" (sizeof(struct bug_entry)) ); \ - } while(0) -#endif - - -#define WARN_ON(x) ({ \ - int __ret_warn_on = !!(x); \ - if (__builtin_constant_p(__ret_warn_on)) { \ - if (__ret_warn_on) \ - __WARN(); \ - } else { \ - if (unlikely(__ret_warn_on)) \ - __WARN(); \ - } \ - unlikely(__ret_warn_on); \ -}) - -#endif - -#include -#endif - diff --git a/include/asm-parisc/bugs.h b/include/asm-parisc/bugs.h deleted file mode 100644 index 9e6284342a5f..000000000000 --- a/include/asm-parisc/bugs.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-parisc/bugs.h - * - * Copyright (C) 1999 Mike Shaver - */ - -/* - * This is included by init/main.c to check for architecture-dependent bugs. - * - * Needs: - * void check_bugs(void); - */ - -#include - -static inline void check_bugs(void) -{ -// identify_cpu(&boot_cpu_data); -} diff --git a/include/asm-parisc/byteorder.h b/include/asm-parisc/byteorder.h deleted file mode 100644 index db148313de5d..000000000000 --- a/include/asm-parisc/byteorder.h +++ /dev/null @@ -1,82 +0,0 @@ -#ifndef _PARISC_BYTEORDER_H -#define _PARISC_BYTEORDER_H - -#include -#include - -#ifdef __GNUC__ - -static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) -{ - __asm__("dep %0, 15, 8, %0\n\t" /* deposit 00ab -> 0bab */ - "shd %%r0, %0, 8, %0" /* shift 000000ab -> 00ba */ - : "=r" (x) - : "0" (x)); - return x; -} - -static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x) -{ - __asm__("shd %0, %0, 8, %0\n\t" /* shift xabcxabc -> cxab */ - "dep %0, 15, 8, %0\n\t" /* deposit cxab -> cbab */ - "shd %%r0, %0, 8, %0" /* shift 0000cbab -> 0cba */ - : "=r" (x) - : "0" (x)); - return x; -} - -static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) -{ - unsigned int temp; - __asm__("shd %0, %0, 16, %1\n\t" /* shift abcdabcd -> cdab */ - "dep %1, 15, 8, %1\n\t" /* deposit cdab -> cbab */ - "shd %0, %1, 8, %0" /* shift abcdcbab -> dcba */ - : "=r" (x), "=&r" (temp) - : "0" (x)); - return x; -} - - -#if BITS_PER_LONG > 32 -/* -** From "PA-RISC 2.0 Architecture", HP Professional Books. -** See Appendix I page 8 , "Endian Byte Swapping". -** -** Pretty cool algorithm: (* == zero'd bits) -** PERMH 01234567 -> 67452301 into %0 -** HSHL 67452301 -> 7*5*3*1* into %1 -** HSHR 67452301 -> *6*4*2*0 into %0 -** OR %0 | %1 -> 76543210 into %0 (all done!) -*/ -static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) { - __u64 temp; - __asm__("permh,3210 %0, %0\n\t" - "hshl %0, 8, %1\n\t" - "hshr,u %0, 8, %0\n\t" - "or %1, %0, %0" - : "=r" (x), "=&r" (temp) - : "0" (x)); - return x; -} -#define __arch__swab64(x) ___arch__swab64(x) -#define __BYTEORDER_HAS_U64__ -#elif !defined(__STRICT_ANSI__) -static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) -{ - __u32 t1 = ___arch__swab32((__u32) x); - __u32 t2 = ___arch__swab32((__u32) (x >> 32)); - return (((__u64) t1 << 32) | t2); -} -#define __arch__swab64(x) ___arch__swab64(x) -#define __BYTEORDER_HAS_U64__ -#endif - -#define __arch__swab16(x) ___arch__swab16(x) -#define __arch__swab24(x) ___arch__swab24(x) -#define __arch__swab32(x) ___arch__swab32(x) - -#endif /* __GNUC__ */ - -#include - -#endif /* _PARISC_BYTEORDER_H */ diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h deleted file mode 100644 index 32c2cca74345..000000000000 --- a/include/asm-parisc/cache.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * include/asm-parisc/cache.h - */ - -#ifndef __ARCH_PARISC_CACHE_H -#define __ARCH_PARISC_CACHE_H - - -/* - * PA 2.0 processors have 64-byte cachelines; PA 1.1 processors have - * 32-byte cachelines. The default configuration is not for SMP anyway, - * so if you're building for SMP, you should select the appropriate - * processor type. There is a potential livelock danger when running - * a machine with this value set too small, but it's more probable you'll - * just ruin performance. - */ -#ifdef CONFIG_PA20 -#define L1_CACHE_BYTES 64 -#define L1_CACHE_SHIFT 6 -#else -#define L1_CACHE_BYTES 32 -#define L1_CACHE_SHIFT 5 -#endif - -#ifndef __ASSEMBLY__ - -#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) - -#define SMP_CACHE_BYTES L1_CACHE_BYTES - -#define __read_mostly __attribute__((__section__(".data.read_mostly"))) - -void parisc_cache_init(void); /* initializes cache-flushing */ -void disable_sr_hashing_asm(int); /* low level support for above */ -void disable_sr_hashing(void); /* turns off space register hashing */ -void free_sid(unsigned long); -unsigned long alloc_sid(void); - -struct seq_file; -extern void show_cache_info(struct seq_file *m); - -extern int split_tlb; -extern int dcache_stride; -extern int icache_stride; -extern struct pdc_cache_info cache_info; -void parisc_setup_cache_timing(void); - -#define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr)); -#define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr)); -#define pdtlb_kernel(addr) asm volatile("pdtlb 0(%0)" : : "r" (addr)); - -#endif /* ! __ASSEMBLY__ */ - -/* Classes of processor wrt: disabling space register hashing */ - -#define SRHASH_PCXST 0 /* pcxs, pcxt, pcxt_ */ -#define SRHASH_PCXL 1 /* pcxl */ -#define SRHASH_PA20 2 /* pcxu, pcxu_, pcxw, pcxw_ */ - -#endif diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h deleted file mode 100644 index b7ca6dc7fddc..000000000000 --- a/include/asm-parisc/cacheflush.h +++ /dev/null @@ -1,121 +0,0 @@ -#ifndef _PARISC_CACHEFLUSH_H -#define _PARISC_CACHEFLUSH_H - -#include - -/* The usual comment is "Caches aren't brain-dead on the ". - * Unfortunately, that doesn't apply to PA-RISC. */ - -/* Internal implementation */ -void flush_data_cache_local(void *); /* flushes local data-cache only */ -void flush_instruction_cache_local(void *); /* flushes local code-cache only */ -#ifdef CONFIG_SMP -void flush_data_cache(void); /* flushes data-cache only (all processors) */ -void flush_instruction_cache(void); /* flushes i-cache only (all processors) */ -#else -#define flush_data_cache() flush_data_cache_local(NULL) -#define flush_instruction_cache() flush_instruction_cache_local(NULL) -#endif - -#define flush_cache_dup_mm(mm) flush_cache_mm(mm) - -void flush_user_icache_range_asm(unsigned long, unsigned long); -void flush_kernel_icache_range_asm(unsigned long, unsigned long); -void flush_user_dcache_range_asm(unsigned long, unsigned long); -void flush_kernel_dcache_range_asm(unsigned long, unsigned long); -void flush_kernel_dcache_page_asm(void *); -void flush_kernel_icache_page(void *); -void flush_user_dcache_page(unsigned long); -void flush_user_icache_page(unsigned long); -void flush_user_dcache_range(unsigned long, unsigned long); -void flush_user_icache_range(unsigned long, unsigned long); - -/* Cache flush operations */ - -void flush_cache_all_local(void); -void flush_cache_all(void); -void flush_cache_mm(struct mm_struct *mm); - -#define flush_kernel_dcache_range(start,size) \ - flush_kernel_dcache_range_asm((start), (start)+(size)); - -#define flush_cache_vmap(start, end) flush_cache_all() -#define flush_cache_vunmap(start, end) flush_cache_all() - -extern void flush_dcache_page(struct page *page); - -#define flush_dcache_mmap_lock(mapping) \ - spin_lock_irq(&(mapping)->tree_lock) -#define flush_dcache_mmap_unlock(mapping) \ - spin_unlock_irq(&(mapping)->tree_lock) - -#define flush_icache_page(vma,page) do { \ - flush_kernel_dcache_page(page); \ - flush_kernel_icache_page(page_address(page)); \ -} while (0) - -#define flush_icache_range(s,e) do { \ - flush_kernel_dcache_range_asm(s,e); \ - flush_kernel_icache_range_asm(s,e); \ -} while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ -do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page)); \ - memcpy(dst, src, len); \ - flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \ -} while (0) - -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ -do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page)); \ - memcpy(dst, src, len); \ -} while (0) - -void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn); -void flush_cache_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end); - -#define ARCH_HAS_FLUSH_ANON_PAGE -static inline void -flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) -{ - if (PageAnon(page)) - flush_user_dcache_page(vmaddr); -} - -#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE -void flush_kernel_dcache_page_addr(void *addr); -static inline void flush_kernel_dcache_page(struct page *page) -{ - flush_kernel_dcache_page_addr(page_address(page)); -} - -#ifdef CONFIG_DEBUG_RODATA -void mark_rodata_ro(void); -#endif - -#ifdef CONFIG_PA8X00 -/* Only pa8800, pa8900 needs this */ -#define ARCH_HAS_KMAP - -void kunmap_parisc(void *addr); - -static inline void *kmap(struct page *page) -{ - might_sleep(); - return page_address(page); -} - -#define kunmap(page) kunmap_parisc(page_address(page)) - -#define kmap_atomic(page, idx) page_address(page) - -#define kunmap_atomic(addr, idx) kunmap_parisc(addr) - -#define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn)) -#define kmap_atomic_to_page(ptr) virt_to_page(ptr) -#endif - -#endif /* _PARISC_CACHEFLUSH_H */ - diff --git a/include/asm-parisc/checksum.h b/include/asm-parisc/checksum.h deleted file mode 100644 index e9639ccc3fce..000000000000 --- a/include/asm-parisc/checksum.h +++ /dev/null @@ -1,210 +0,0 @@ -#ifndef _PARISC_CHECKSUM_H -#define _PARISC_CHECKSUM_H - -#include - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -extern __wsum csum_partial(const void *, int, __wsum); - -/* - * The same as csum_partial, but copies from src while it checksums. - * - * Here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - */ -extern __wsum csum_partial_copy_nocheck(const void *, void *, int, __wsum); - -/* - * this is a new version of the above that records errors it finds in *errp, - * but continues and zeros the rest of the buffer. - */ -extern __wsum csum_partial_copy_from_user(const void __user *src, - void *dst, int len, __wsum sum, int *errp); - -/* - * Optimized for IP headers, which always checksum on 4 octet boundaries. - * - * Written by Randolph Chung , and then mucked with by - * LaMont Jones - */ -static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) -{ - unsigned int sum; - - __asm__ __volatile__ ( -" ldws,ma 4(%1), %0\n" -" addib,<= -4, %2, 2f\n" -"\n" -" ldws 4(%1), %%r20\n" -" ldws 8(%1), %%r21\n" -" add %0, %%r20, %0\n" -" ldws,ma 12(%1), %%r19\n" -" addc %0, %%r21, %0\n" -" addc %0, %%r19, %0\n" -"1: ldws,ma 4(%1), %%r19\n" -" addib,< 0, %2, 1b\n" -" addc %0, %%r19, %0\n" -"\n" -" extru %0, 31, 16, %%r20\n" -" extru %0, 15, 16, %%r21\n" -" addc %%r20, %%r21, %0\n" -" extru %0, 15, 16, %%r21\n" -" add %0, %%r21, %0\n" -" subi -1, %0, %0\n" -"2:\n" - : "=r" (sum), "=r" (iph), "=r" (ihl) - : "1" (iph), "2" (ihl) - : "r19", "r20", "r21", "memory"); - - return (__force __sum16)sum; -} - -/* - * Fold a partial checksum - */ -static inline __sum16 csum_fold(__wsum csum) -{ - u32 sum = (__force u32)csum; - /* add the swapped two 16-bit halves of sum, - a possible carry from adding the two 16-bit halves, - will carry from the lower half into the upper half, - giving us the correct sum in the upper half. */ - sum += (sum << 16) + (sum >> 16); - return (__force __sum16)(~sum >> 16); -} - -static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - __asm__( - " add %1, %0, %0\n" - " addc %2, %0, %0\n" - " addc %3, %0, %0\n" - " addc %%r0, %0, %0\n" - : "=r" (sum) - : "r" (daddr), "r"(saddr), "r"(proto+len), "0"(sum)); - return sum; -} - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); -} - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ -static inline __sum16 ip_compute_csum(const void *buf, int len) -{ - return csum_fold (csum_partial(buf, len, 0)); -} - - -#define _HAVE_ARCH_IPV6_CSUM -static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, - const struct in6_addr *daddr, - __u32 len, unsigned short proto, - __wsum sum) -{ - __asm__ __volatile__ ( - -#if BITS_PER_LONG > 32 - - /* - ** We can execute two loads and two adds per cycle on PA 8000. - ** But add insn's get serialized waiting for the carry bit. - ** Try to keep 4 registers with "live" values ahead of the ALU. - */ - -" ldd,ma 8(%1), %%r19\n" /* get 1st saddr word */ -" ldd,ma 8(%2), %%r20\n" /* get 1st daddr word */ -" add %8, %3, %3\n"/* add 16-bit proto + len */ -" add %%r19, %0, %0\n" -" ldd,ma 8(%1), %%r21\n" /* 2cd saddr */ -" ldd,ma 8(%2), %%r22\n" /* 2cd daddr */ -" add,dc %%r20, %0, %0\n" -" add,dc %%r21, %0, %0\n"