// SPDX-License-Identifier: GPL-2.0-only
/*
* Cryptographic API.
*
* Support for OMAP AES HW acceleration.
*
* Copyright (c) 2010 Nokia Corporation
* Author: Dmitry Kasatkin <dmitry.kasatkin@nokia.com>
* Copyright (c) 2011 Texas Instruments Incorporated
*/
#define pr_fmt(fmt) "%20s: " fmt, __func__
#define prn(num) pr_debug(#num "=%d\n", num)
#define prx(num) pr_debug(#num "=%x\n", num)
#include <crypto/aes.h>
#include <crypto/gcm.h>
#include <crypto/internal/aead.h>
#include <crypto/internal/engine.h>
#include <crypto/internal/skcipher.h>
#include <crypto/scatterwalk.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/scatterlist.h>
#include <linux/string.h>
#include "omap-crypto.h"
#include "omap-aes.h"
/* keep registered devices data here */
static LIST_HEAD(dev_list);
static DEFINE_SPINLOCK(list_lock);
static int aes_fallback_sz = 200;
#ifdef DEBUG
#define omap_aes_read(dd, offset) \
({ \
int _read_ret; \
_read_ret = __raw_readl(dd->io_base + offset); \
pr_debug("omap_aes_read(" #offset "=%#x)= %#x\n", \
offset, _read_ret); \
_read_ret; \
})
#else
inline u32 omap_aes_read(struct omap_aes_dev *dd, u32 offset)
{
return __raw_readl(dd->io_base + offset);
}
#endif
#ifdef DEBUG
#define omap_aes_write(dd, offset, value) \
do { \
pr_debug("omap_aes_write(" #offset "=%#x) value=%#x\n", \
offset, value); \
__raw_writel(value, dd->io_base + offset); \
} while (0)
#else
inline void omap_aes_write(struct omap_aes_dev *dd, u32 offset,
u32 value)
{
__raw_writel(value, dd->io_base + offset);
}
#endif
static inline void omap_aes_write_mask(struct omap_aes_dev *dd, u32 offset,
u32 value, u32 mask)
{
u32 val;
val = omap_aes_read(dd, offset);
val &= ~mask;
val |= value;
omap_aes_write(dd, offset, val);
}
static void omap_aes_write_n(struct omap_aes_dev *dd, u32 offset,
u32 *value, int count)
{
for (; count--; value++, offset += 4)
omap_aes_write(dd, offset, *value);
}
static int omap_aes_hw_init(struct omap_aes_dev *dd)
{
int err;
if (!(dd->flags & FLAGS_INIT)) {
dd->flags |= FLAGS_INIT;
dd->err = 0;
}
err = pm_runtime_resume_and_get(dd->dev);
if (err < 0) {
dev_err(dd->dev, "failed to get sync: %d\n", err);
return err;
}
return 0;
}
void omap_aes_clear_copy_flags(struct omap_aes_dev *