// SPDX-License-Identifier: GPL-2.0
/*
* Combined GPIO and pin controller support for Renesas RZ/A1 (r7s72100) SoC
*
* Copyright (C) 2017 Jacopo Mondi
*/
/*
* This pin controller/gpio combined driver supports Renesas devices of RZ/A1
* family.
* This includes SoCs which are sub- or super- sets of this particular line,
* as RZ/A1H (r7s721000), RZ/A1M (r7s721010) and RZ/A1L (r7s721020).
*/
#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/gpio/driver.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/slab.h>
#include "core.h"
#include "devicetree.h"
#include "pinconf.h"
#include "pinmux.h"
#define DRIVER_NAME "pinctrl-rza1"
#define RZA1_P_REG 0x0000
#define RZA1_PPR_REG 0x0200
#define RZA1_PM_REG 0x0300
#define RZA1_PMC_REG 0x0400
#define RZA1_PFC_REG 0x0500
#define RZA1_PFCE_REG 0x0600
#define RZA1_PFCEA_REG 0x0a00
#define RZA1_PIBC_REG 0x4000
#define RZA1_PBDC_REG 0x4100
#define RZA1_PIPC_REG 0x4200
#define RZA1_ADDR(mem, reg, port) ((mem) + (reg) + ((port) * 4))
#define RZA1_NPORTS 12
#define RZA1_PINS_PER_PORT 16
#define RZA1_NPINS (RZA1_PINS_PER_PORT * RZA1_NPORTS)
#define RZA1_PIN_ID_TO_PORT(id) ((id) / RZA1_PINS_PER_PORT)
#define RZA1_PIN_ID_TO_PIN(id) ((id) % RZA1_PINS_PER_PORT)
/*
* Use 16 lower bits [15:0] for pin identifier
* Use 16 higher bits [31:16] for pin mux function
*/
#define MUX_PIN_ID_MASK GENMASK(15, 0)
#define MUX_FUNC_MASK GENMASK(31, 16)
#define MUX_FUNC_OFFS 16
#define MUX_FUNC(pinconf) \
((pinconf & MUX_FUNC_MASK) >> MUX_FUNC_OFFS)
#define MUX_FUNC_PFC_MASK BIT(0)
#define MUX_FUNC_PFCE_MASK BIT(1)
#define MUX_FUNC_PFCEA_MASK BIT(2)
/* Pin mux flags */
#define MUX_FLAGS_BIDIR BIT(0)
#define MUX_FLAGS_SWIO_INPUT BIT(1)
#define MUX_FLAGS_SWIO_OUTPUT BIT(2)
/* ----------------------------------------------------------------------------
* RZ/A1 pinmux flags
*/
/**
* rza1_bidir_pin - describe a single pin that needs bidir flag applied.
*/
struct rza1_bidir_pin {
u8 pin: 4;
u8 func: 4;
};
/**
* rza1_bidir_entry - describe a list of pins that needs bidir flag applied.
* Each struct rza1_bidir_entry describes a port.
*/
struct rza1_bidir_entry {
const unsigned int npins;
const struct rza1_bidir_pin *pins;
};
/**
* rza1_swio_pin - describe a single pin that needs bidir flag applied.
*/
struct rza1_swio_pin {
u16 pin: 4;
u16 port: 4;
u16 func: 4;
u16 input: 1;
};
/**
* rza1_swio_entry - describe a list of pins that needs swio flag applied
