path: root/drivers/scsi/mpi3mr/mpi/mpi30_ioc.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 *  Copyright 2016-2021 Broadcom Inc. All rights reserved.
 *
 */
#ifndef MPI30_IOC_H
#define MPI30_IOC_H     1
struct mpi3_ioc_init_request {
	__le16                   host_tag;
	u8                       ioc_use_only02;
	u8                       function;
	__le16                   ioc_use_only04;
	u8                       ioc_use_only06;
	u8                       msg_flags;
	__le16                   change_count;
	__le16                   reserved0a;
	union mpi3_version_union    mpi_version;
	__le64                   time_stamp;
	u8                       reserved18;
	u8                       who_init;
	__le16                   reserved1a;
	__le16                   reply_free_queue_depth;
	__le16                   reserved1e;
	__le64                   reply_free_queue_address;
	__le32                   reserved28;
	__le16                   sense_buffer_free_queue_depth;
	__le16                   sense_buffer_length;
	__le64                   sense_buffer_free_queue_address;
	__le64                   driver_information_address;
};

#define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_MASK          (0x03)
#define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_NOT_USED      (0x00)
#define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_SEPARATED     (0x01)
#define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_INLINE        (0x02)
#define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_BOTH          (0x03)
#define MPI3_WHOINIT_NOT_INITIALIZED                     (0x00)
#define MPI3_WHOINIT_ROM_BIOS                            (0x02)
#define MPI3_WHOINIT_HOST_DRIVER                         (0x03)
#define MPI3_WHOINIT_MANUFACTURER                        (0x04)
struct mpi3_driver_info_layout {
	__le32             information_length;
	u8                 driver_signature[12];
	u8                 os_name[16];
	u8                 os_version[12];
	u8                 driver_name[20];
	u8                 driver_version[32];
	u8                 driver_release_date[20];
	__le32             driver_capabilities;
};

struct mpi3_ioc_facts_request {
	__le16                 host_tag;
	u8                     ioc_use_only02;
	u8                     function;
	__le16                 ioc_use_only04;
	u8                     ioc_use_only06;
	u8                     msg_flags;
	__le16                 change_count;
	__le16                 reserved0a;
	__le32                 reserved0c;
	union mpi3_sge_union      sgl;
};

struct mpi3_ioc_facts_data {
	__le16                     ioc_facts_data_length;
	__le16                     reserved02;
	union mpi3_version_union      mpi_version;
	struct mpi3_comp_image_version fw_version;
	__le32                     ioc_capabilities;
	u8                         ioc_number;
	u8                         who_init;
	__le16                     max_msix_vectors;
	__le16                     max_outstanding_requests;
	__le16                     product_id;
	__le16                     ioc_request_frame_size;
	__le16                     reply_frame_size;
	__le16                     ioc_exceptions;
	__le16                     max_persistent_id;
	u8                         sge_modifier_mask;
	u8                         sge_modifier_value;
	u8                         sge_modifier_shift;
	u8                         protocol_flags;
	__le16                     max_sas_initiators;
	__le16                     max_data_length;
	__le16                     max_sas_expanders;
	__le16                     max_enclosures;
	__le16                     min_dev_handle;
	__le16                     max_dev_handle;
	__le16                     max_pcie_switches;
	__le16                     max_nvme;
	__le16                     reserved38;
	__le16                     max_vds;
	__le16                     max_host_pds;
	__le16                     max_adv_host_pds;
	__le16                     max_raid_pds;
	__le16                     max_posted_cmd_buffers;
	__le32                     flags;
	__le16                     max_operational_request_queues;
	__le16                     max_operational_reply_queues;
	__le16                     shutdown_timeout;
	__le16                     reserved4e;
	__le32                     diag_trace_size;
	__le32                     diag_fw_size;
	__le32                     diag_driver_size;
	u8                         max_host_pd_ns_count;
	u8                         max_adv_host_pd_ns_count;
	u8                         max_raidpd_ns_count;
	u8                         max_devices_per_throttle_group;
	__le16                     io_throttle_data_length;
	__le16                     max_io_throttle_group;
	__le16                     io_throttle_low;
	__le16                     io_throttle_high;
};
#define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_MASK          (0x80000000)
#define MPI3_IOCFACTS_CAPABILITY_SUPERVISOR_IOC               (0x00000000)
#define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_IOC           (0x80000000)
#define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_MASK            (0x00000600)
#define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_FIXED_THRESHOLD (0x00000000)
#define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_OUTSTANDING_IO  (0x00000200)
#define MPI3_IOCFACTS_CAPABILITY_COMPLETE_RESET_CAPABLE       (0x00000100)
#define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_TRACE_ENABLED       (0x00000080)
#define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_FW_ENABLED          (0x00000040)
#define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_DRIVER_ENABLED      (0x00000020)
#define MPI3_IOCFACTS_CAPABILITY_ADVANCED_HOST_PD_ENABLED     (0x00000010)
#define MPI3_IOCFACTS_CAPABILITY_RAID_CAPABLE                 (0x00000008)
#define MPI3_IOCFACTS_CAPABILITY_MULTIPATH_ENABLED            (0x00000002)
#define MPI3_IOCFACTS_CAPABILITY_COALESCE_CTRL_SUPPORTED      (0x00000001)
#define MPI3_IOCFACTS_PID_TYPE_MASK                           (0xf000)
#define MPI3_IOCFACTS_PID_TYPE_SHIFT                          (12)
#define MPI3_IOCFACTS_PID_PRODUCT_MASK                        (0x0f00)
#define MPI3_IOCFACTS_PID_PRODUCT_SHIFT                       (8)
#define MPI3_IOCFACTS_PID_FAMILY_MASK                         (0x00ff)
#define MPI3_IOCFACTS_PID_FAMILY_SHIFT                        (0)
#define MPI3_IOCFACTS_EXCEPT_SECURITY_REKEY                   (0x2000)
#define MPI3_IOCFACTS_EXCEPT_SAS_DISABLED                     (0x1000)
#define MPI3_IOCFACTS_EXCEPT_SAFE_MODE                        (0x0800)
#define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_MASK                (0x0700)
#define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_NONE                (0x0000)
#define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_MGMT      (0x0100)
#define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_MGMT        (0x0200)
#define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_MGMT  (0x0300)
#define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_OOB       (0x0400)
#define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_OOB         (0x0500)
#define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_OOB   (0x0600)
#define MPI3_IOCFACTS_EXCEPT_PCIE_DISABLED                    (0x0080)
#define MPI3_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE           (0x0040)
#define MPI3_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL           (0x0020)
#define MPI3_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL                 (0x0010)
#define MPI3_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL             (0x0008)
#define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_MASK                    (0x0001)
#define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_PRIMARY                 (0x0000)
#define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_SECONDARY               (0x0001)
#define MPI3_IOCFACTS_PROTOCOL_SAS                            (0x0010)
#define MPI3_IOCFACTS_PROTOCOL_SATA                           (0x0008)
#define MPI3_IOCFACTS_PROTOCOL_NVME                           (0x0004)
#define MPI3_IOCFACTS_PROTOCOL_SCSI_INITIATOR                 (0x0002)
#define MPI3_IOCFACTS_PROTOCOL_SCSI_TARGET                    (0x0001)
#define MPI3_IOCFACTS_MAX_DATA_LENGTH_NOT_REPORTED            (0x0000)
#define MPI3_IOCFACTS_FLAGS_SIGNED_NVDATA_REQUIRED            (0x00010000)
#define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK            (0x0000ff00)
#define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT           (8)
#define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_MASK          (0x00000030)
#define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_NOT_STARTED   (0x00000000)
#define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_IN_PROGRESS   (0x00000010)
#define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_COMPLETE      (0x00000020)
#define MPI3_IOCFACTS_FLAGS_PERSONALITY_MASK                  (0x0000000f)
#define MPI3_IOCFACTS_FLAGS_PERSONALITY_EHBA                  (0x00000000)
#define MPI3_IOCFACTS_FLAGS_PERSONALITY_RAID_DDR              (0x00000002)
#define MPI3_IOCFACTS_IO_THROTTLE_DATA_LENGTH_NOT_REQUIRED    (0x0000)
struct mpi3_mgmt_passthrough_request {
	__le16                 host_tag;
	u8                     ioc_use_only02;
	u8                     function;
	__le16                 ioc_use_only04;
	u8                     ioc_use_only06;
	u8                     msg_flags;
	__le16                 change_count;
	__le16                 reserved0a;
	__le32                 reserved0c[5];
	union mpi3_sge_union      command_sgl;
	union mpi3_sge_union      response_sgl;
};

struct mpi3_create_request_queue_request {
	__le16             host_tag;
	u8                 ioc_use_only02;
	u8                 function;
	__le16             ioc_use_only04;
	u8                 ioc_use_only06;
	u8                 msg_flags;
	__le16             change_count;
	u8                 flags;
	u8                 burst;</