diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2015-08-20 14:54:20 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-08-28 12:40:43 +1000 |
| commit | 2ea7249fe2d4815fc6d0b50021bcbd8bb72b8437 (patch) | |
| tree | 7ff13dbd152587765dbf8f6524065bc311da3981 | |
| parent | c5fcafa528463b207108cd606e0d41741fb7dc50 (diff) | |
| download | linux-2ea7249fe2d4815fc6d0b50021bcbd8bb72b8437.tar.gz linux-2ea7249fe2d4815fc6d0b50021bcbd8bb72b8437.tar.bz2 linux-2ea7249fe2d4815fc6d0b50021bcbd8bb72b8437.zip | |
drm/nouveau/gpio: convert to new-style nvkm_subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
30 files changed, 252 insertions, 370 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv04/dac.c b/drivers/gpu/drm/nouveau/dispnv04/dac.c index 71e99cdfc40e..78cb033bc015 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/dac.c +++ b/drivers/gpu/drm/nouveau/dispnv04/dac.c @@ -270,10 +270,10 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder) } if (gpio) { - saved_gpio1 = gpio->get(gpio, 0, DCB_GPIO_TVDAC1, 0xff); - saved_gpio0 = gpio->get(gpio, 0, DCB_GPIO_TVDAC0, 0xff); - gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, dcb->type == DCB_OUTPUT_TV); - gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, dcb->type == DCB_OUTPUT_TV); + saved_gpio1 = nvkm_gpio_get(gpio, 0, DCB_GPIO_TVDAC1, 0xff); + saved_gpio0 = nvkm_gpio_get(gpio, 0, DCB_GPIO_TVDAC0, 0xff); + nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, dcb->type == DCB_OUTPUT_TV); + nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, dcb->type == DCB_OUTPUT_TV); } msleep(4); @@ -325,8 +325,8 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder) nvif_wr32(device, NV_PBUS_POWERCTRL_2, saved_powerctrl_2); if (gpio) { - gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, saved_gpio1); - gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, saved_gpio0); + nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, saved_gpio1); + nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, saved_gpio0); } return sample; diff --git a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c index 792bf5428f35..c59b2c7d94e1 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c +++ b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c @@ -62,8 +62,8 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder) head = (dacclk & 0x100) >> 8; /* Save the previous state. */ - gpio1 = gpio->get(gpio, 0, DCB_GPIO_TVDAC1, 0xff); - gpio0 = gpio->get(gpio, 0, DCB_GPIO_TVDAC0, 0xff); + gpio1 = nvkm_gpio_get(gpio, 0, DCB_GPIO_TVDAC1, 0xff); + gpio0 = nvkm_gpio_get(gpio, 0, DCB_GPIO_TVDAC0, 0xff); fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL); fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START); fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END); @@ -74,8 +74,8 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder) ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c); /* Prepare the DAC for load detection. */ - gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, true); - gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, true); + nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, true); + nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, true); NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343); NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047); @@ -120,8 +120,8 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder) NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end); NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start); NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal); - gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, gpio1); - gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, gpio0); + nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, gpio1); + nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, gpio0); return sample; } @@ -395,8 +395,8 @@ static void nv17_tv_dpms(struct drm_encoder *encoder, int mode) nv_load_ptv(dev, regs, 200); - gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, mode == DRM_MODE_DPMS_ON); - gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, mode == DRM_MODE_DPMS_ON); + nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, mode == DRM_MODE_DPMS_ON); + nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, mode == DRM_MODE_DPMS_ON); nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON); } diff --git a/drivers/gpu/drm/nouveau/include/nvif/device.h b/drivers/gpu/drm/nouveau/include/nvif/device.h index 2b17b13b9dba..6cc9c65833a6 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/device.h +++ b/drivers/gpu/drm/nouveau/include/nvif/device.h @@ -54,7 +54,7 @@ u64 nvif_device_time(struct nvif_device *); #define nvxx_fb(a) nvxx_device(a)->fb #define nvxx_mmu(a) nvkm_mmu(nvxx_device(a)) #define nvxx_bar(a) nvxx_device(a)->bar -#define nvxx_gpio(a) nvkm_gpio(nvxx_device(a)) +#define nvxx_gpio(a) nvxx_device(a)->gpio #define nvxx_clk(a) nvxx_device(a)->clk #define nvxx_i2c(a) nvkm_i2c(nvxx_device(a)) #define nvxx_therm(a) nvkm_therm(nvxx_device(a)) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/gpio.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/gpio.h index f409cbb2bce7..9b9c6d2f90b6 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/gpio.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/gpio.h @@ -19,26 +19,21 @@ struct nvkm_gpio_ntfy_rep { }; struct nvkm_gpio { + const struct nvkm_gpio_func *func; struct nvkm_subdev subdev; struct nvkm_event event; - - void (*reset)(struct nvkm_gpio *, u8 func); - int (*find)(struct nvkm_gpio *, int idx, u8 tag, u8 line, - struct dcb_gpio_func *); - int (*set)(struct nvkm_gpio *, int idx, u8 tag, u8 line, int state); - int (*get)(struct nvkm_gpio *, int idx, u8 tag, u8 line); }; -static inline struct nvkm_gpio * -nvkm_gpio(void *obj) -{ - return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_GPIO); -} - -extern struct nvkm_oclass *nv10_gpio_oclass; -extern struct nvkm_oclass *nv50_gpio_oclass; -extern struct nvkm_oclass *g94_gpio_oclass; -extern struct nvkm_oclass *gf110_gpio_oclass; -extern struct nvkm_oclass *gk104_gpio_oclass; +void nvkm_gpio_reset(struct nvkm_gpio *, u8 func); +int nvkm_gpio_find(struct nvkm_gpio *, int idx, u8 tag, u8 line, + struct dcb_gpio_func *); +int nvkm_gpio_set(struct nvkm_gpio *, int idx, u8 tag, u8 line, int state); +int nvkm_gpio_get(struct nvkm_gpio *, int idx, u8 tag, u8 line); + +int nv10_gpio_new(struct nvkm_device *, int, struct nvkm_gpio **); +int nv50_gpio_new(struct nvkm_device *, int, struct nvkm_gpio **); +int g94_gpio_new(struct nvkm_device *, int, struct nvkm_gpio **); +int gf119_gpio_new(struct nvkm_device *, int, struct nvkm_gpio **); +int gk104_gpio_new(struct nvkm_device *, int, struct nvkm_gpio **); #endif diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 309c20b086d4..2e7cbe933533 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c @@ -125,9 +125,9 @@ nouveau_connector_ddc_detect(struct drm_connector *connector) * is handled by the SOR itself, and not required for LVDS DDC. */ if (nv_connector->type == DCB_CONNECTOR_eDP) { - panel = gpio->get(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff); + panel = nvkm_gpio_get(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff); if (panel == 0) { - gpio->set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1); + nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1); msleep(300); } } @@ -157,7 +157,7 @@ nouveau_connector_ddc_detect(struct drm_connector *connector) * state to avoid confusing the SOR for other output types. */ if (!nv_encoder && panel == 0) - gpio->set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, panel); + nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, panel); return nv_encoder; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index c3afd03df5a9..3caaa9caf4d3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -121,7 +121,7 @@ nv10_chipset = { .clk = nv04_clk_new, .devinit = nv10_devinit_new, .fb = nv10_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -140,7 +140,7 @@ nv11_chipset = { .clk = nv04_clk_new, .devinit = nv10_devinit_new, .fb = nv10_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -161,7 +161,7 @@ nv15_chipset = { .clk = nv04_clk_new, .devinit = nv10_devinit_new, .fb = nv10_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -182,7 +182,7 @@ nv17_chipset = { .clk = nv04_clk_new, .devinit = nv10_devinit_new, .fb = nv10_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -203,7 +203,7 @@ nv18_chipset = { .clk = nv04_clk_new, .devinit = nv10_devinit_new, .fb = nv10_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -224,7 +224,7 @@ nv1a_chipset = { .clk = nv04_clk_new, .devinit = nv1a_devinit_new, .fb = nv1a_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -245,7 +245,7 @@ nv1f_chipset = { .clk = nv04_clk_new, .devinit = nv1a_devinit_new, .fb = nv1a_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -266,7 +266,7 @@ nv20_chipset = { .clk = nv04_clk_new, .devinit = nv20_devinit_new, .fb = nv20_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -287,7 +287,7 @@ nv25_chipset = { .clk = nv04_clk_new, .devinit = nv20_devinit_new, .fb = nv25_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -308,7 +308,7 @@ nv28_chipset = { .clk = nv04_clk_new, .devinit = nv20_devinit_new, .fb = nv25_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -329,7 +329,7 @@ nv2a_chipset = { .clk = nv04_clk_new, .devinit = nv20_devinit_new, .fb = nv25_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -350,7 +350,7 @@ nv30_chipset = { .clk = nv04_clk_new, .devinit = nv20_devinit_new, .fb = nv30_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -371,7 +371,7 @@ nv31_chipset = { .clk = nv04_clk_new, .devinit = nv20_devinit_new, .fb = nv30_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -393,7 +393,7 @@ nv34_chipset = { .clk = nv04_clk_new, .devinit = nv10_devinit_new, .fb = nv10_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -415,7 +415,7 @@ nv35_chipset = { .clk = nv04_clk_new, .devinit = nv20_devinit_new, .fb = nv35_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -436,7 +436,7 @@ nv36_chipset = { .clk = nv04_clk_new, .devinit = nv20_devinit_new, .fb = nv36_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv04_instmem_new, // .mc = nv04_mc_new, @@ -458,7 +458,7 @@ nv40_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv40_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv40_mc_new, @@ -483,7 +483,7 @@ nv41_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv41_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv40_mc_new, @@ -508,7 +508,7 @@ nv42_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv41_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv40_mc_new, @@ -533,7 +533,7 @@ nv43_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv41_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv40_mc_new, @@ -558,7 +558,7 @@ nv44_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv44_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv44_mc_new, @@ -583,7 +583,7 @@ nv45_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv40_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv40_mc_new, @@ -608,7 +608,7 @@ nv46_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv46_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv44_mc_new, @@ -633,7 +633,7 @@ nv47_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv47_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv40_mc_new, @@ -658,7 +658,7 @@ nv49_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv49_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv40_mc_new, @@ -683,7 +683,7 @@ nv4a_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv44_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv44_mc_new, @@ -708,7 +708,7 @@ nv4b_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv49_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv40_mc_new, @@ -733,7 +733,7 @@ nv4c_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv46_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv4c_mc_new, @@ -758,7 +758,7 @@ nv4e_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv4e_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv4e_i2c_new, // .imem = nv40_instmem_new, // .mc = nv4c_mc_new, @@ -785,7 +785,7 @@ nv50_chipset = { .devinit = nv50_devinit_new, .fb = nv50_fb_new, .fuse = nv50_fuse_new, -// .gpio = nv50_gpio_new, + .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, // .imem = nv50_instmem_new, // .mc = nv50_mc_new, @@ -811,7 +811,7 @@ nv63_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv46_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv4c_mc_new, @@ -836,7 +836,7 @@ nv67_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv46_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv4c_mc_new, @@ -861,7 +861,7 @@ nv68_chipset = { .clk = nv40_clk_new, .devinit = nv1a_devinit_new, .fb = nv46_fb_new, -// .gpio = nv10_gpio_new, + .gpio = nv10_gpio_new, // .i2c = nv04_i2c_new, // .imem = nv40_instmem_new, // .mc = nv4c_mc_new, @@ -888,7 +888,7 @@ nv84_chipset = { .devinit = g84_devinit_new, .fb = g84_fb_new, .fuse = nv50_fuse_new, -// .gpio = nv50_gpio_new, + .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, // .imem = nv50_instmem_new, // .mc = nv50_mc_new, @@ -919,7 +919,7 @@ nv86_chipset = { .devinit = g84_devinit_new, .fb = g84_fb_new, .fuse = nv50_fuse_new, -// .gpio = nv50_gpio_new, + .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, // .imem = nv50_instmem_new, // .mc = nv50_mc_new, @@ -950,7 +950,7 @@ nv92_chipset = { .devinit = g84_devinit_new, .fb = g84_fb_new, .fuse = nv50_fuse_new, -// .gpio = nv50_gpio_new, + .gpio = nv50_gpio_new, // .i2c = nv50_i2c_new, // .imem = nv50_instmem_new, // .mc = nv50_mc_new, @@ -981,7 +981,7 @@ nv94_chipset = { .devinit = g84_devinit_new, .fb = g84_fb_new, .fuse = nv50_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .imem = nv50_instmem_new, // .mc = g94_mc_new, @@ -1006,7 +1006,7 @@ static const struct nvkm_device_chip nv96_chipset = { .name = "G96", .bios = nvkm_bios_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, .fuse = nv50_fuse_new, .clk = g84_clk_new, @@ -1037,7 +1037,7 @@ static const struct nvkm_device_chip nv98_chipset = { .name = "G98", .bios = nvkm_bios_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, .fuse = nv50_fuse_new, .clk = g84_clk_new, @@ -1074,7 +1074,7 @@ nva0_chipset = { .devinit = g84_devinit_new, .fb = g84_fb_new, .fuse = nv50_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = nv50_i2c_new, // .imem = nv50_instmem_new, // .mc = g98_mc_new, @@ -1105,7 +1105,7 @@ nva3_chipset = { .devinit = gt215_devinit_new, .fb = gt215_fb_new, .fuse = nv50_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .imem = nv50_instmem_new, // .mc = g98_mc_new, @@ -1138,7 +1138,7 @@ nva5_chipset = { .devinit = gt215_devinit_new, .fb = gt215_fb_new, .fuse = nv50_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .imem = nv50_instmem_new, // .mc = g98_mc_new, @@ -1170,7 +1170,7 @@ nva8_chipset = { .devinit = gt215_devinit_new, .fb = gt215_fb_new, .fuse = nv50_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .imem = nv50_instmem_new, // .mc = g98_mc_new, @@ -1202,7 +1202,7 @@ nvaa_chipset = { .devinit = g98_devinit_new, .fb = mcp77_fb_new, .fuse = nv50_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .imem = nv50_instmem_new, // .mc = g98_mc_new, @@ -1233,7 +1233,7 @@ nvac_chipset = { .devinit = g98_devinit_new, .fb = mcp77_fb_new, .fuse = nv50_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .imem = nv50_instmem_new, // .mc = g98_mc_new, @@ -1264,7 +1264,7 @@ nvaf_chipset = { .devinit = mcp89_devinit_new, .fb = mcp89_fb_new, .fuse = nv50_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .imem = nv50_instmem_new, // .mc = g98_mc_new, @@ -1296,7 +1296,7 @@ nvc0_chipset = { .devinit = gf100_devinit_new, .fb = gf100_fb_new, .fuse = gf100_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, @@ -1331,7 +1331,7 @@ nvc1_chipset = { .devinit = gf100_devinit_new, .fb = gf100_fb_new, .fuse = gf100_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, @@ -1365,7 +1365,7 @@ nvc3_chipset = { .devinit = gf100_devinit_new, .fb = gf100_fb_new, .fuse = gf100_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, @@ -1399,7 +1399,7 @@ nvc4_chipset = { .devinit = gf100_devinit_new, .fb = gf100_fb_new, .fuse = gf100_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, @@ -1434,7 +1434,7 @@ nvc8_chipset = { .devinit = gf100_devinit_new, .fb = gf100_fb_new, .fuse = gf100_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, @@ -1469,7 +1469,7 @@ nvce_chipset = { .devinit = gf100_devinit_new, .fb = gf100_fb_new, .fuse = gf100_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, @@ -1504,7 +1504,7 @@ nvcf_chipset = { .devinit = gf100_devinit_new, .fb = gf100_fb_new, .fuse = gf100_fuse_new, -// .gpio = g94_gpio_new, + .gpio = g94_gpio_new, // .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, @@ -1538,7 +1538,7 @@ nvd7_chipset = { .devinit = gf100_devinit_new, .fb = gf100_fb_new, .fuse = gf100_fuse_new, -// .gpio = gf110_gpio_new, + .gpio = gf119_gpio_new, // .i2c = gf117_i2c_new, // .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, @@ -1570,7 +1570,7 @@ nvd9_chipset = { .devinit = gf100_devinit_new, .fb = gf100_fb_new, .fuse = gf100_fuse_new, -// .gpio = gf110_gpio_new, + .gpio = gf119_gpio_new, // .i2c = gf110_i2c_new, // .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, @@ -1604,7 +1604,7 @@ nve4_chipset = { .devinit = gf100_devinit_new, .fb = gk104_fb_new, .fuse = gf100_fuse_new, -// .gpio = gk104_gpio_new, + .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, @@ -1640,7 +1640,7 @@ nve6_chipset = { .devinit = gf100_devinit_new, .fb = gk104_fb_new, .fuse = gf100_fuse_new, -// .gpio = gk104_gpio_new, + .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, @@ -1676,7 +1676,7 @@ nve7_chipset = { .devinit = gf100_devinit_new, .fb = gk104_fb_new, .fuse = gf100_fuse_new, -// .gpio = gk104_gpio_new, + .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, @@ -1736,7 +1736,7 @@ nvf0_chipset = { .devinit = gf100_devinit_new, .fb = gk104_fb_new, .fuse = gf100_fuse_new, -// .gpio = gk104_gpio_new, + .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, @@ -1772,7 +1772,7 @@ nvf1_chipset = { .devinit = gf100_devinit_new, .fb = gk104_fb_new, .fuse = gf100_fuse_new, -// .gpio = gk104_gpio_new, + .gpio = gk104_gpio_new, // .i2c = gf110_i2c_new, // .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, @@ -1808,7 +1808,7 @@ nv106_chipset = { .devinit = gf100_devinit_new, .fb = gk104_fb_new, .fuse = gf100_fuse_new, -// .gpio = gk104_gpio_new, + .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, @@ -1843,7 +1843,7 @@ nv108_chipset = { .devinit = gf100_devinit_new, .fb = gk104_fb_new, .fuse = gf100_fuse_new, -// .gpio = gk104_gpio_new, + .gpio = gk104_gpio_new, // .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, @@ -1878,7 +1878,7 @@ nv117_chipset = { .devinit = gm107_devinit_new, .fb = gm107_fb_new, .fuse = gm107_fuse_new, -// .gpio = gk104_gpio_new, + .gpio = gk104_gpio_new, // .i2c = gf110_i2c_new, // .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, @@ -1907,7 +1907,7 @@ nv124_chipset = { .devinit = gm204_devinit_new, .fb = gm107_fb_new, .fuse = gm107_fuse_new, -// .gpio = gk104_gpio_new, + .gpio = gk104_gpio_new, // .i2c = gm204_i2c_new, // .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, @@ -1936,7 +1936,7 @@ nv126_chipset = { .devinit = gm204_devinit_new, .fb = gm107_fb_new, .fuse = gm107_fuse_new, -// .gpio = gk104_gpio_new, + .gpio = gk104_gpio_new, // .i2c = gm204_i2c_new, // .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c index df9e3fbca3df..9059b43efe7d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c @@ -28,7 +28,6 @@ gf100_identify(struct nvkm_device *device) { switch (device->chipset) { case 0xc0: - device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; @@ -53,7 +52,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass; break; case 0xc4: - device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; @@ -78,7 +76,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass; break; case 0xc3: - device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; @@ -102,7 +99,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass; break; case 0xce: - device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; @@ -127,7 +123,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass; break; case 0xcf: - device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; @@ -151,7 +146,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_ |
