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authorAlex Deucher <alexander.deucher@amd.com>2015-04-16 15:20:39 -0400
committerAlex Deucher <alexander.deucher@amd.com>2015-06-03 21:02:55 -0400
commit46d5a27269af9420b925cbbfdd66d3979abd8092 (patch)
treebc02111ad3b5fba39a54c6bf94bb4fb397a2fc3f
parent9f24d8ce2522808cdb719775dbb32cb296e20f47 (diff)
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drm/amdgpu: add GCA 7.2 register headers
These are register headers for the GCA (Graphics and Compute Array) block on the GPU. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h2557
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_enum.h6274
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h18444
3 files changed, 27275 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h b/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h
new file mode 100644
index 000000000000..290ce6aa4b71
--- /dev/null
+++ b/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h
@@ -0,0 +1,2557 @@
+/*
+ * GFX_7_2 Register documentation
+ *
+ * Copyright (C) 2014 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef GFX_7_2_D_H
+#define GFX_7_2_D_H
+
+#define mmCB_BLEND_RED 0xa105
+#define mmCB_BLEND_GREEN 0xa106
+#define mmCB_BLEND_BLUE 0xa107
+#define mmCB_BLEND_ALPHA 0xa108
+#define mmCB_COLOR_CONTROL 0xa202
+#define mmCB_BLEND0_CONTROL 0xa1e0
+#define mmCB_BLEND1_CONTROL 0xa1e1
+#define mmCB_BLEND2_CONTROL 0xa1e2
+#define mmCB_BLEND3_CONTROL 0xa1e3
+#define mmCB_BLEND4_CONTROL 0xa1e4
+#define mmCB_BLEND5_CONTROL 0xa1e5
+#define mmCB_BLEND6_CONTROL 0xa1e6
+#define mmCB_BLEND7_CONTROL 0xa1e7
+#define mmCB_COLOR0_BASE 0xa318
+#define mmCB_COLOR1_BASE 0xa327
+#define mmCB_COLOR2_BASE 0xa336
+#define mmCB_COLOR3_BASE 0xa345
+#define mmCB_COLOR4_BASE 0xa354
+#define mmCB_COLOR5_BASE 0xa363
+#define mmCB_COLOR6_BASE 0xa372
+#define mmCB_COLOR7_BASE 0xa381
+#define mmCB_COLOR0_PITCH 0xa319
+#define mmCB_COLOR1_PITCH 0xa328
+#define mmCB_COLOR2_PITCH 0xa337
+#define mmCB_COLOR3_PITCH 0xa346
+#define mmCB_COLOR4_PITCH 0xa355
+#define mmCB_COLOR5_PITCH 0xa364
+#define mmCB_COLOR6_PITCH 0xa373
+#define mmCB_COLOR7_PITCH 0xa382
+#define mmCB_COLOR0_SLICE 0xa31a
+#define mmCB_COLOR1_SLICE 0xa329
+#define mmCB_COLOR2_SLICE 0xa338
+#define mmCB_COLOR3_SLICE 0xa347
+#define mmCB_COLOR4_SLICE 0xa356
+#define mmCB_COLOR5_SLICE 0xa365
+#define mmCB_COLOR6_SLICE 0xa374
+#define mmCB_COLOR7_SLICE 0xa383
+#define mmCB_COLOR0_VIEW 0xa31b
+#define mmCB_COLOR1_VIEW 0xa32a
+#define mmCB_COLOR2_VIEW 0xa339
+#define mmCB_COLOR3_VIEW 0xa348
+#define mmCB_COLOR4_VIEW 0xa357
+#define mmCB_COLOR5_VIEW 0xa366
+#define mmCB_COLOR6_VIEW 0xa375
+#define mmCB_COLOR7_VIEW 0xa384
+#define mmCB_COLOR0_INFO 0xa31c
+#define mmCB_COLOR1_INFO 0xa32b
+#define mmCB_COLOR2_INFO 0xa33a
+#define mmCB_COLOR3_INFO 0xa349
+#define mmCB_COLOR4_INFO 0xa358
+#define mmCB_COLOR5_INFO 0xa367
+#define mmCB_COLOR6_INFO 0xa376
+#define mmCB_COLOR7_INFO 0xa385
+#define mmCB_COLOR0_ATTRIB 0xa31d
+#define mmCB_COLOR1_ATTRIB 0xa32c
+#define mmCB_COLOR2_ATTRIB 0xa33b
+#define mmCB_COLOR3_ATTRIB 0xa34a
+#define mmCB_COLOR4_ATTRIB 0xa359
+#define mmCB_COLOR5_ATTRIB 0xa368
+#define mmCB_COLOR6_ATTRIB 0xa377
+#define mmCB_COLOR7_ATTRIB 0xa386
+#define mmCB_COLOR0_CMASK 0xa31f
+#define mmCB_COLOR1_CMASK 0xa32e
+#define mmCB_COLOR2_CMASK 0xa33d
+#define mmCB_COLOR3_CMASK 0xa34c
+#define mmCB_COLOR4_CMASK 0xa35b
+#define mmCB_COLOR5_CMASK 0xa36a
+#define mmCB_COLOR6_CMASK 0xa379
+#define mmCB_COLOR7_CMASK 0xa388
+#define mmCB_COLOR0_CMASK_SLICE 0xa320
+#define mmCB_COLOR1_CMASK_SLICE 0xa32f
+#define mmCB_COLOR2_CMASK_SLICE 0xa33e
+#define mmCB_COLOR3_CMASK_SLICE 0xa34d
+#define mmCB_COLOR4_CMASK_SLICE 0xa35c
+#define mmCB_COLOR5_CMASK_SLICE 0xa36b
+#define mmCB_COLOR6_CMASK_SLICE 0xa37a
+#define mmCB_COLOR7_CMASK_SLICE 0xa389
+#define mmCB_COLOR0_FMASK 0xa321
+#define mmCB_COLOR1_FMASK 0xa330
+#define mmCB_COLOR2_FMASK 0xa33f
+#define mmCB_COLOR3_FMASK 0xa34e
+#define mmCB_COLOR4_FMASK 0xa35d
+#define mmCB_COLOR5_FMASK 0xa36c
+#define mmCB_COLOR6_FMASK 0xa37b
+#define mmCB_COLOR7_FMASK 0xa38a
+#define mmCB_COLOR0_FMASK_SLICE 0xa322
+#define mmCB_COLOR1_FMASK_SLICE 0xa331
+#define mmCB_COLOR2_FMASK_SLICE 0xa340
+#define mmCB_COLOR3_FMASK_SLICE 0xa34f
+#define mmCB_COLOR4_FMASK_SLICE 0xa35e
+#define mmCB_COLOR5_FMASK_SLICE 0xa36d
+#define mmCB_COLOR6_FMASK_SLICE 0xa37c
+#define mmCB_COLOR7_FMASK_SLICE 0xa38b
+#define mmCB_COLOR0_CLEAR_WORD0 0xa323
+#define mmCB_COLOR1_CLEAR_WORD0 0xa332
+#define mmCB_COLOR2_CLEAR_WORD0 0xa341
+#define mmCB_COLOR3_CLEAR_WORD0 0xa350
+#define mmCB_COLOR4_CLEAR_WORD0 0xa35f
+#define mmCB_COLOR5_CLEAR_WORD0 0xa36e
+#define mmCB_COLOR6_CLEAR_WORD0 0xa37d
+#define mmCB_COLOR7_CLEAR_WORD0 0xa38c
+#define mmCB_COLOR0_CLEAR_WORD1 0xa324
+#define mmCB_COLOR1_CLEAR_WORD1 0xa333
+#define mmCB_COLOR2_CLEAR_WORD1 0xa342
+#define mmCB_COLOR3_CLEAR_WORD1 0xa351
+#define mmCB_COLOR4_CLEAR_WORD1 0xa360
+#define mmCB_COLOR5_CLEAR_WORD1 0xa36f
+#define mmCB_COLOR6_CLEAR_WORD1 0xa37e
+#define mmCB_COLOR7_CLEAR_WORD1 0xa38d
+#define mmCB_TARGET_MASK 0xa08e
+#define mmCB_SHADER_MASK 0xa08f
+#define mmCB_HW_CONTROL 0x2684
+#define mmCB_HW_CONTROL_1 0x2685
+#define mmCB_HW_CONTROL_2 0x2686
+#define mmCB_HW_CONTROL_3 0x2683
+#define mmCB_PERFCOUNTER_FILTER 0xdc00
+#define mmCB_PERFCOUNTER0_SELECT 0xdc01
+#define mmCB_PERFCOUNTER0_SELECT1 0xdc02
+#define mmCB_PERFCOUNTER1_SELECT 0xdc03
+#define mmCB_PERFCOUNTER2_SELECT 0xdc04
+#define mmCB_PERFCOUNTER3_SELECT 0xdc05
+#define mmCB_PERFCOUNTER0_LO 0xd406
+#define mmCB_PERFCOUNTER1_LO 0xd408
+#define mmCB_PERFCOUNTER2_LO 0xd40a
+#define mmCB_PERFCOUNTER3_LO 0xd40c
+#define mmCB_PERFCOUNTER0_HI 0xd407
+#define mmCB_PERFCOUNTER1_HI 0xd409
+#define mmCB_PERFCOUNTER2_HI 0xd40b
+#define mmCB_PERFCOUNTER3_HI 0xd40d
+#define mmCB_CGTT_SCLK_CTRL 0xf0a8
+#define mmCB_DEBUG_BUS_1 0x2699
+#define mmCB_DEBUG_BUS_2 0x269a
+#define mmCB_DEBUG_BUS_3 0x269b
+#define mmCB_DEBUG_BUS_4 0x269c
+#define mmCB_DEBUG_BUS_5 0x269d
+#define mmCB_DEBUG_BUS_6 0x269e
+#define mmCB_DEBUG_BUS_7 0x269f
+#define mmCB_DEBUG_BUS_8 0x26a0
+#define mmCB_DEBUG_BUS_9 0x26a1
+#define mmCB_DEBUG_BUS_10 0x26a2
+#define mmCB_DEBUG_BUS_11 0x26a3
+#define mmCB_DEBUG_BUS_12 0x26a4
+#define mmCB_DEBUG_BUS_13 0x26a5
+#define mmCB_DEBUG_BUS_14 0x26a6
+#define mmCB_DEBUG_BUS_15 0x26a7
+#define mmCB_DEBUG_BUS_16 0x26a8
+#define mmCB_DEBUG_BUS_17 0x26a9
+#define mmCB_DEBUG_BUS_18 0x26aa
+#define mmCP_DFY_CNTL 0x3020
+#define mmCP_DFY_STAT 0x3021
+#define mmCP_DFY_ADDR_HI 0x3022
+#define mmCP_DFY_ADDR_LO 0x3023
+#define mmCP_DFY_DATA_0 0x3024
+#define mmCP_DFY_DATA_1 0x3025
+#define mmCP_DFY_DATA_2 0x3026
+#define mmCP_DFY_DATA_3 0x3027
+#define mmCP_DFY_DATA_4 0x3028
+#define mmCP_DFY_DATA_5 0x3029
+#define mmCP_DFY_DATA_6 0x302a
+#define mmCP_DFY_DATA_7 0x302b
+#define mmCP_DFY_DATA_8 0x302c
+#define mmCP_DFY_DATA_9 0x302d
+#define mmCP_DFY_DATA_10 0x302e
+#define mmCP_DFY_DATA_11 0x302f
+#define mmCP_DFY_DATA_12 0x3030
+#define mmCP_DFY_DATA_13 0x3031
+#define mmCP_DFY_DATA_14 0x3032
+#define mmCP_DFY_DATA_15 0x3033
+#define mmCP_RB0_BASE 0x3040
+#define mmCP_RB0_BASE_HI 0x30b1
+#define mmCP_RB_BASE 0x3040
+#define mmCP_RB1_BASE 0x3060
+#define mmCP_RB1_BASE_HI 0x30b2
+#define mmCP_RB2_BASE 0x3065
+#define mmCP_RB0_CNTL 0x3041
+#define mmCP_RB_CNTL 0x3041
+#define mmCP_RB1_CNTL 0x3061
+#define mmCP_RB2_CNTL 0x3066
+#define mmCP_RB_RPTR_WR 0x3042
+#define mmCP_RB0_RPTR_ADDR 0x3043
+#define mmCP_RB_RPTR_ADDR 0x3043
+#define mmCP_RB1_RPTR_ADDR 0x3062
+#define mmCP_RB2_RPTR_ADDR 0x3067
+#define mmCP_RB0_RPTR_ADDR_HI 0x3044
+#define mmCP_RB_RPTR_ADDR_HI 0x3044
+#define mmCP_RB1_RPTR_ADDR_HI 0x3063
+#define mmCP_RB2_RPTR_ADDR_HI 0x3068
+#define mmCP_RB0_WPTR 0x3045
+#define mmCP_RB_WPTR 0x3045
+#define mmCP_RB1_WPTR 0x3064
+#define mmCP_RB2_WPTR 0x3069
+#define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046
+#define mmCP_RB_WPTR_POLL_ADDR_HI 0x3047
+#define mmGC_PRIV_MODE 0x3048
+#define mmCP_INT_CNTL 0x3049
+#define mmCP_INT_CNTL_RING0 0x306a
+#define mmCP_INT_CNTL_RING1 0x306b
+#define mmCP_INT_CNTL_RING2 0x306c
+#define mmCP_INT_STATUS 0x304a
+#define mmCP_INT_STATUS_RING0 0x306d
+#define mmCP_INT_STATUS_RING1 0x306e
+#define mmCP_INT_STATUS_RING2 0x306f
+#define mmCP_DEVICE_ID 0x304b
+#define mmCP_RING_PRIORITY_CNTS 0x304c
+#define mmCP_ME0_PIPE_PRIORITY_CNTS 0x304c
+#define mmCP_RING0_PRIORITY 0x304d
+#define mmCP_ME0_PIPE0_PRIORITY 0x304d
+#define mmCP_RING1_PRIORITY 0x304e
+#define mmCP_ME0_PIPE1_PRIORITY 0x304e
+#define mmCP_RING2_PRIORITY 0x304f
+#define mmCP_ME0_PIPE2_PRIORITY 0x304f
+#define mmCP_ENDIAN_SWAP 0x3050
+#define mmCP_RB_VMID 0x3051
+#define mmCP_ME0_PIPE0_VMID 0x3052
+#define mmCP_ME0_PIPE1_VMID 0x3053
+#define mmCP_PFP_UCODE_ADDR 0x3054
+#define mmCP_PFP_UCODE_DATA 0x3055
+#define mmCP_ME_RAM_RADDR 0x3056
+#define mmCP_ME_RAM_WADDR 0x3057
+#define mmCP_ME_RAM_DATA 0x3058
+#define mmCGTT_CPC_CLK_CTRL 0xf0b2
+#define mmCGTT_CPF_CLK_CTRL 0xf0b1
+#define mmCGTT_CP_CLK_CTRL 0xf0b0
+#define mmCP_CE_UCODE_ADDR 0x305a
+#define mmCP_CE_UCODE_DATA 0x305b
+#define mmCP_MEC_ME1_UCODE_ADDR 0x305c
+#define mmCP_MEC_ME1_UCODE_DATA 0x305d
+#define mmCP_MEC_ME2_UCODE_ADDR 0x305e
+#define mmCP_MEC_ME2_UCODE_DATA 0x305f
+#define mmCP_PWR_CNTL 0x3078
+#define mmCP_MEM_SLP_CNTL 0x3079
+#define mmCP_ECC_FIRSTOCCURRENCE 0x307a
+#define mmCP_ECC_FIRSTOCCURRENCE_RING0 0x307b
+#define mmCP_ECC_FIRSTOCCURRENCE_RING1 0x307c
+#define mmCP_ECC_FIRSTOCCURRENCE_RING2 0x307d
+#define mmCP_CPF_DEBUG 0x3080
+#define mmCP_FETCHER_SOURCE 0x3082
+#define mmCP_PQ_WPTR_POLL_CNTL 0x3083
+#define mmCP_PQ_WPTR_POLL_CNTL1 0x3084
+#define mmCPC_INT_CNTL 0x30b4
+#define mmCP_ME1_PIPE0_INT_CNTL 0x3085
+#define mmCP_ME1_PIPE1_INT_CNTL 0x3086
+#define mmCP_ME1_PIPE2_INT_CNTL 0x3087
+#define mmCP_ME1_PIPE3_INT_CNTL 0x3088
+#define mmCP_ME2_PIPE0_INT_CNTL 0x3089
+#define mmCP_ME2_PIPE1_INT_CNTL 0x308a
+#define mmCP_ME2_PIPE2_INT_CNTL 0x308b
+#define mmCP_ME2_PIPE3_INT_CNTL 0x308c
+#define mmCPC_INT_STATUS 0x30b5
+#define mmCP_ME1_PIPE0_INT_STATUS 0x308d
+#define mmCP_ME1_PIPE1_INT_STATUS 0x308e
+#define mmCP_ME1_PIPE2_INT_STATUS 0x308f
+#define mmCP_ME1_PIPE3_INT_STATUS 0x3090
+#define mmCP_ME2_PIPE0_INT_STATUS 0x3091
+#define mmCP_ME2_PIPE1_INT_STATUS 0x3092
+#define mmCP_ME2_PIPE2_INT_STATUS 0x3093
+#define mmCP_ME2_PIPE3_INT_STATUS 0x3094
+#define mmCP_ME1_INT_STAT_DEBUG 0x3095
+#define mmCP_ME2_INT_STAT_DEBUG 0x3096
+#define mmCP_ME1_PIPE_PRIORITY_CNTS 0x3099
+#define mmCP_ME1_PIPE0_PRIORITY 0x309a
+#define mmCP_ME1_PIPE1_PRIORITY 0x309b
+#define mmCP_ME1_PIPE2_PRIORITY 0x309c
+#define mmCP_ME1_PIPE3_PRIORITY 0x309d
+#define mmCP_ME2_PIPE_PRIORITY_CNTS 0x309e
+#define mmCP_ME2_PIPE0_PRIORITY 0x309f
+#define mmCP_ME2_PIPE1_PRIORITY 0x30a0
+#define mmCP_ME2_PIPE2_PRIORITY 0x30a1
+#define mmCP_ME2_PIPE3_PRIORITY 0x30a2
+#define mmCP_CE_PRGRM_CNTR_START 0x30a3
+#define mmCP_PFP_PRGRM_CNTR_START 0x30a4
+#define mmCP_ME_PRGRM_CNTR_START 0x30a5
+#define mmCP_MEC1_PRGRM_CNTR_START 0x30a6
+#define mmCP_MEC2_PRGRM_CNTR_START 0x30a7
+#define mmCP_CE_INTR_ROUTINE_START 0x30a8
+#define mmCP_PFP_INTR_ROUTINE_START 0x30a9
+#define mmCP_ME_INTR_ROUTINE_START 0x30aa
+#define mmCP_MEC1_INTR_ROUTINE_START 0x30ab
+#define mmCP_MEC2_INTR_ROUTINE_START 0x30ac
+#define mmCP_CONTEXT_CNTL 0x30ad
+#define mmCP_MAX_CONTEXT 0x30ae
+#define mmCP_IQ_WAIT_TIME1 0x30af
+#define mmCP_IQ_WAIT_TIME2 0x30b0
+#define mmCP_VMID_RESET 0x30b3
+#define mmCP_VMID_PREEMPT 0x30b6
+#define mmCPC_INT_CNTX_ID 0x30b7
+#define mmCP_PQ_STATUS 0x30b8
+#define mmCP_CPC_STATUS 0x2084
+#define mmCP_CPC_BUSY_STAT 0x2085
+#define mmCP_CPC_STALLED_STAT1 0x2086
+#define mmCP_CPF_STATUS 0x2087
+#define mmCP_CPF_BUSY_STAT 0x2088
+#define mmCP_CPF_STALLED_STAT1 0x2089
+#define mmCP_CPC_MC_CNTL 0x208a
+#define mmCP_CPC_GRBM_FREE_COUNT 0x208b
+#define mmCP_MEC_CNTL 0x208d
+#define mmCP_MEC_ME1_HEADER_DUMP 0x208e
+#define mmCP_MEC_ME2_HEADER_DUMP 0x208f
+#define mmCP_CPC_SCRATCH_INDEX 0x2090
+#define mmCP_CPC_SCRATCH_DATA 0x2091
+#define mmCPG_PERFCOUNTER1_SELECT 0xd800
+#define mmCPG_PERFCOUNTER1_LO 0xd000
+#define mmCPG_PERFCOUNTER1_HI 0xd001
+#define mmCPG_PERFCOUNTER0_SELECT1 0xd801
+#define mmCPG_PERFCOUNTER0_SELECT 0xd802
+#define mmCPG_PERFCOUNTER0_LO 0xd002
+#define mmCPG_PERFCOUNTER0_HI 0xd003
+#define mmCPC_PERFCOUNTER1_SELECT 0xd803
+#define mmCPC_PERFCOUNTER1_LO 0xd004
+#define mmCPC_PERFCOUNTER1_HI 0xd005
+#define mmCPC_PERFCOUNTER0_SELECT1 0xd804
+#define mmCPC_PERFCOUNTER0_SELECT 0xd809
+#define mmCPC_PERFCOUNTER0_LO 0xd006
+#define mmCPC_PERFCOUNTER0_HI 0xd007
+#define mmCPF_PERFCOUNTER1_SELECT 0xd805
+#define mmCPF_PERFCOUNTER1_LO 0xd008
+#define mmCPF_PERFCOUNTER1_HI 0xd009
+#define mmCPF_PERFCOUNTER0_SELECT1 0xd806
+#define mmCPF_PERFCOUNTER0_SELECT 0xd807
+#define mmCPF_PERFCOUNTER0_LO 0xd00a
+#define mmCPF_PERFCOUNTER0_HI 0xd00b
+#define mmCP_CPC_HALT_HYST_COUNT 0x20a7
+#define mmCP_DRAW_OBJECT 0xd810
+#define mmCP_DRAW_OBJECT_COUNTER 0xd811
+#define mmCP_DRAW_WINDOW_MASK_HI 0xd812
+#define mmCP_DRAW_WINDOW_HI 0xd813
+#define mmCP_DRAW_WINDOW_LO 0xd814
+#define mmCP_DRAW_WINDOW_CNTL 0xd815
+#define mmCP_PRT_LOD_STATS_CNTL0 0x20ad
+#define mmCP_PRT_LOD_STATS_CNTL1 0x20ae
+#define mmCP_PRT_LOD_STATS_CNTL2 0x20af
+#define mmCP_CE_COMPARE_COUNT 0x20c0
+#define mmCP_CE_DE_COUNT 0x20c1
+#define mmCP_DE_CE_COUNT 0x20c2
+#define mmCP_DE_LAST_INVAL_COUNT 0x20c3
+#define mmCP_DE_DE_COUNT 0x20c4
+#define mmCP_EOP_DONE_EVENT_CNTL 0xc0d5
+#define mmCP_EOP_DONE_DATA_CNTL 0xc0d6
+#define mmCP_EOP_DONE_ADDR_LO 0xc000
+#define mmCP_EOP_DONE_ADDR_HI 0xc001
+#define mmCP_EOP_DONE_DATA_LO 0xc002
+#define mmCP_EOP_DONE_DATA_HI 0xc003
+#define mmCP_EOP_LAST_FENCE_LO 0xc004
+#define mmCP_EOP_LAST_FENCE_HI 0xc005
+#define mmCP_STREAM_OUT_ADDR_LO 0xc006
+#define mmCP_STREAM_OUT_ADDR_HI 0xc007
+#define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO 0xc008
+#define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI 0xc009
+#define mmCP_NUM_PRIM_NEEDED_COUNT0_LO 0xc00a
+#define mmCP_NUM_PRIM_NEEDED_COUNT0_HI 0xc00b
+#define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO 0xc00c
+#define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI 0xc00d
+#define mmCP_NUM_PRIM_NEEDED_COUNT1_LO 0xc00e
+#define mmCP_NUM_PRIM_NEEDED_COUNT1_HI 0xc00f
+#define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO 0xc010
+#define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI 0xc011
+#define mmCP_NUM_PRIM_NEEDED_COUNT2_LO 0xc012
+#define mmCP_NUM_PRIM_NEEDED_COUNT2_HI 0xc013
+#define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO 0xc014
+#define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI 0xc015
+#define mmCP_NUM_PRIM_NEEDED_COUNT3_LO 0xc016
+#define mmCP_NUM_PRIM_NEEDED_COUNT3_HI 0xc017
+#define mmCP_PIPE_STATS_ADDR_LO 0xc018
+#define mmCP_PIPE_STATS_ADDR_HI 0xc019
+#define mmCP_VGT_IAVERT_COUNT_LO 0xc01a
+#define mmCP_VGT_IAVERT_COUNT_HI 0xc01b
+#define mmCP_VGT_IAPRIM_COUNT_LO 0xc01c
+#define mmCP_VGT_IAPRIM_COUNT_HI 0xc01d
+#define mmCP_VGT_GSPRIM_COUNT_LO 0xc01e
+#define mmCP_VGT_GSPRIM_COUNT_HI 0xc01f
+#define mmCP_VGT_VSINVOC_COUNT_LO 0xc020
+#define mmCP_VGT_VSINVOC_COUNT_HI 0xc021
+#define mmCP_VGT_GSINVOC_COUNT_LO 0xc022
+#define mmCP_VGT_GSINVOC_COUNT_HI 0xc023
+#define mmCP_VGT_HSINVOC_COUNT_LO 0xc024
+#define mmCP_VGT_HSINVOC_COUNT_HI 0xc025
+#define mmCP_VGT_DSINVOC_COUNT_LO 0xc026
+#define mmCP_VGT_DSINVOC_COUNT_HI 0xc027
+#define mmCP_PA_CINVOC_COUNT_LO 0xc028
+#define mmCP_PA_CINVOC_COUNT_HI 0xc029
+#define mmCP_PA_CPRIM_COUNT_LO 0xc02a
+#define mmCP_PA_CPRIM_COUNT_HI 0xc02b
+#define mmCP_SC_PSINVOC_COUNT0_LO 0xc02c
+#define mmCP_SC_PSINVOC_COUNT0_HI 0xc02d
+#define mmCP_SC_PSINVOC_COUNT1_LO 0xc02e
+#define mmCP_SC_PSINVOC_COUNT1_HI 0xc02f
+#define mmCP_VGT_CSINVOC_COUNT_LO 0xc030
+#define mmCP_VGT_CSINVOC_COUNT_HI 0xc031
+#define mmCP_STRMOUT_CNTL 0xc03f
+#define mmSCRATCH_REG0 0xc040
+#define mmSCRATCH_REG1 0xc041
+#define mmSCRATCH_REG2 0xc042
+#define mmSCRATCH_REG3 0xc043
+#define mmSCRATCH_REG4 0xc044
+#define mmSCRATCH_REG5 0xc045
+#define mmSCRATCH_REG6 0xc046
+#define mmSCRATCH_REG7 0xc047
+#define mmSCRATCH_UMSK 0xc050
+#define mmSCRATCH_ADDR 0xc051
+#define mmCP_PFP_ATOMIC_PREOP_LO 0xc052
+#define mmCP_PFP_ATOMIC_PREOP_HI 0xc053
+#define mmCP_PFP_GDS_ATOMIC0_PREOP_LO 0xc054
+#define mmCP_PFP_GDS_ATOMIC0_PREOP_HI 0xc055
+#define mmCP_PFP_GDS_ATOMIC1_PREOP_LO 0xc056
+#define mmCP_PFP_GDS_ATOMIC1_PREOP_HI 0xc057
+#define mmCP_APPEND_ADDR_LO 0xc058
+#define mmCP_APPEND_ADDR_HI 0xc059
+#define mmCP_APPEND_DATA 0xc05a
+#define mmCP_APPEND_LAST_CS_FENCE 0xc05b
+#define mmCP_APPEND_LAST_PS_FENCE 0xc05c
+#define mmCP_ATOMIC_PREOP_LO 0xc05d
+#define mmCP_ME_ATOMIC_PREOP_LO 0xc05d
+#define mmCP_ATOMIC_PREOP_HI 0xc05e
+#define mmCP_ME_ATOMIC_PREOP_HI 0xc05e
+#define mmCP_GDS_ATOMIC0_PREOP_LO 0xc05f
+#define mmCP_ME_GDS_ATOMIC0_PREOP_LO 0xc05f
+#define mmCP_GDS_ATOMIC0_PREOP_HI 0xc060
+#define mmCP_ME_GDS_ATOMIC0_PREOP_HI 0xc060
+#define mmCP_GDS_ATOMIC1_PREOP_LO 0xc061
+#define mmCP_ME_GDS_ATOMIC1_PREOP_LO 0xc061
+#define mmCP_GDS_ATOMIC1_PREOP_HI 0xc062
+#define mmCP_ME_GDS_ATOMIC1_PREOP_HI 0xc062
+#define mmCP_ME_MC_WADDR_LO 0xc069
+#define mmCP_ME_MC_WADDR_HI 0xc06a
+#define mmCP_ME_MC_WDATA_LO 0xc06b
+#define mmCP_ME_MC_WDATA_HI 0xc06c
+#define mmCP_ME_MC_RADDR_LO 0xc06d
+#define mmCP_ME_MC_RADDR_HI 0xc06e
+#define mmCP_SEM_WAIT_TIMER 0xc06f
+#define mmCP_SIG_SEM_ADDR_LO 0xc070
+#define mmCP_SIG_SEM_ADDR_HI 0xc071
+#define mmCP_WAIT_SEM_ADDR_LO 0xc075
+#define mmCP_WAIT_SEM_ADDR_HI 0xc076
+#define mmCP_WAIT_REG_MEM_TIMEOUT 0xc074
+#define mmCP_COHER_START_DELAY 0xc07b
+#define mmCP_COHER_CNTL 0xc07c
+#define mmCP_COHER_SIZE 0xc07d
+#define mmCP_COHER_SIZE_HI 0xc08c
+#define mmCP_COHER_BASE 0xc07e
+#define mmCP_COHER_BASE_HI 0xc079
+#define mmCP_COHER_STATUS 0xc07f
+#define mmCOHER_DEST_BASE_0 0xa092
+#define mmCOHER_DEST_BASE_1 0xa093
+#define mmCOHER_DEST_BASE_2 0xa07e
+#define mmCOHER_DEST_BASE_3 0xa07f
+#define mmCOHER_DEST_BASE_HI_0 0xa07a
+#define mmCOHER_DEST_BASE_HI_1 0xa07b
+#define mmCOHER_DEST_BASE_HI_2 0xa07c
+#define mmCOHER_DEST_BASE_HI_3 0xa07d
+#define mmCP_DMA_ME_SRC_ADDR 0xc080
+#define mmCP_DMA_ME_SRC_ADDR_HI 0xc081
+#define mmCP_DMA_ME_DST_ADDR 0xc082
+#define mmCP_DMA_ME_DST_ADDR_HI 0xc083
+#define mmCP_DMA_ME_CONTROL 0xc078
+#define mmCP_DMA_ME_COMMAND 0xc084
+#define mmCP_DMA_PFP_SRC_ADDR 0xc085
+#define mmCP_DMA_PFP_SRC_ADDR_HI 0xc086
+#define mmCP_DMA_PFP_DST_ADDR 0xc087
+#define mmCP_DMA_PFP_DST_ADDR_HI 0xc088
+#define mmCP_DMA_PFP_CONTROL 0xc077
+#define mmCP_DMA_PFP_COMMAND 0xc089
+#define mmCP_DMA_CNTL 0xc08a
+#define mmCP_DMA_READ_TAGS 0xc08b
+#define mmCP_PFP_IB_CONTROL 0xc08d
+#define mmCP_PFP_LOAD_CONTROL 0xc08e
+#define mmCP_SCRATCH_INDEX 0xc08f
+#define mmCP_SCRATCH_DATA 0xc090
+#define mmCP_RB_OFFSET 0xc091
+#define mmCP_IB1_OFFSET 0xc092
+#define mmCP_IB2_OFFSET 0xc093
+#define mmCP_IB1_PREAMBLE_BEGIN 0xc094
+#define mmCP_IB1_PREAMBLE_END 0xc095
+#define mmCP_IB2_PREAMBLE_BEGIN 0xc096
+#define mmCP_IB2_PREAMBLE_END 0xc097
+#define mmCP_CE_IB1_OFFSET 0xc098
+#define mmCP_CE_IB2_OFFSET 0xc099
+#define mmCP_CE_COUNTER 0xc09a
+#define mmCP_STALLED_STAT1 0x219d
+#define mmCP_STALLED_STAT2 0x219e
+#define mmCP_STALLED_STAT3 0x219c
+#define mmCP_BUSY_STAT 0x219f
+#define mmCP_STAT 0x21a0
+#define mmCP_ME_HEADER_DUMP 0x21a1
+#define mmCP_PFP_HEADER_DUMP 0x21a2
+#define mmCP_GRBM_FREE_COUNT 0x21a3
+#define mmCP_CE_HEADER_DUMP 0x21a4
+#define mmCP_MC_PACK_DELAY_CNT 0x21a7
+#define mmCP_MC_TAG_CNTL 0x21a8
+#define mmCP_MC_TAG_DATA 0x21a9
+#define mmCP_CSF_STAT 0x21b4
+#define mmCP_CSF_CNTL 0x21b5
+#define mmCP_ME_CNTL 0x21b6
+#define mmCP_CNTX_STAT 0x21b8
+#define mmCP_ME_PREEMPTION 0x21b9
+#define mmCP_RB0_RPTR 0x21c0
+#define mmCP_RB_RPTR