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author | Imre Deak <imre.deak@intel.com> | 2024-07-08 22:00:27 +0300 |
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committer | Imre Deak <imre.deak@intel.com> | 2024-07-11 21:12:13 +0300 |
commit | 61fe488fc78a3024b8d4cafc90a34158f4562dae (patch) | |
tree | 901df7229ad14197f7fe69a7f30a1f59f04d5374 | |
parent | 4613aa66e42ba1b0c896495a207b3b26e94e44d5 (diff) | |
download | linux-61fe488fc78a3024b8d4cafc90a34158f4562dae.tar.gz linux-61fe488fc78a3024b8d4cafc90a34158f4562dae.tar.bz2 linux-61fe488fc78a3024b8d4cafc90a34158f4562dae.zip |
drm/i915/dp: Keep cached LTTPR mode up-to-date
Nothing depends on the cached LTTPR mode, however for consistency keep
it up-to-date with the value programmed to the DPCD register.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240708190029.271247-5-imre.deak@intel.com
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_link_training.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index 56b9c5cb1254..af0b71bdf1fc 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -114,7 +114,13 @@ intel_dp_set_lttpr_transparent_mode(struct intel_dp *intel_dp, bool enable) u8 val = enable ? DP_PHY_REPEATER_MODE_TRANSPARENT : DP_PHY_REPEATER_MODE_NON_TRANSPARENT; - return drm_dp_dpcd_write(&intel_dp->aux, DP_PHY_REPEATER_MODE, &val, 1) == 1; + if (drm_dp_dpcd_write(&intel_dp->aux, DP_PHY_REPEATER_MODE, &val, 1) != 1) + return false; + + intel_dp->lttpr_common_caps[DP_PHY_REPEATER_MODE - + DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV] = val; + + return true; } static bool intel_dp_lttpr_transparent_mode_enabled(struct intel_dp *intel_dp) |