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| author | Arnd Bergmann <arnd@arndb.de> | 2024-09-03 10:40:27 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2024-09-03 10:40:29 +0000 |
| commit | 06b6879f0a07dd5c7a57b1ddaedbb0e4571d904b (patch) | |
| tree | 7873de59b614100d15de8e2f6473510295b7929b /arch/arm/boot | |
| parent | 57e8098a9a312d2a8db185ea6aa956da388cf4d9 (diff) | |
| parent | 0296f20c72d23f41ca0ccd64eb849e9ef1aa8977 (diff) | |
| download | linux-06b6879f0a07dd5c7a57b1ddaedbb0e4571d904b.tar.gz linux-06b6879f0a07dd5c7a57b1ddaedbb0e4571d904b.tar.bz2 linux-06b6879f0a07dd5c7a57b1ddaedbb0e4571d904b.zip | |
Merge tag 'v6.12-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
spidev on the elgin-r1 got a real compatible, the rk3128 could enable its
VPU for video decoding and the rk3128 sfc node can use the clock constant
now after the merge-window.
* tag 'v6.12-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1
ARM: dts: rockchip: Add vpu nodes for RK3128
ARM: dts: rockchip: use constant for HCLK_SFC on rk3128
Link: https://lore.kernel.org/r/3405397.RL5eaSpR8r@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/rockchip/rk3128.dtsi | 26 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts | 4 |
2 files changed, 27 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 23e633387c24..d4572146d135 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -254,6 +254,30 @@ }; }; + vpu: video-codec@10106000 { + compatible = "rockchip,rk3128-vpu", "rockchip,rk3066-vpu"; + reg = <0x10106000 0x800>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "vepu", "vdpu"; + clocks = <&cru ACLK_VDPU>, <&cru HCLK_VDPU>, + <&cru ACLK_VEPU>, <&cru HCLK_VEPU>; + clock-names = "aclk_vdpu", "hclk_vdpu", + "aclk_vepu", "hclk_vepu"; + iommus = <&vpu_mmu>; + power-domains = <&power RK3128_PD_VIDEO>; + }; + + vpu_mmu: iommu@10106800 { + compatible = "rockchip,iommu"; + reg = <0x10106800 0x100>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_VEPU>, <&cru HCLK_VDPU>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3128_PD_VIDEO>; + #iommu-cells = <0>; + }; + vop: vop@1010e000 { compatible = "rockchip,rk3126-vop"; reg = <0x1010e000 0x300>; @@ -429,7 +453,7 @@ compatible = "rockchip,sfc"; reg = <0x1020c000 0x8000>; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_SFC>, <&cru 479>; + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; clock-names = "clk_sfc", "hclk_sfc"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts b/arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts index 2d9994379eb2..89ca2f8d3809 100644 --- a/arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts +++ b/arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts @@ -168,8 +168,8 @@ pinctrl-0 = <&spim1_clk &spim1_cs0 &spim1_tx &spim1_rx>; status = "okay"; - dh2228fv: dac@0 { - compatible = "rohm,dh2228fv"; + display: display@0 { + compatible = "elgin,jg10309-01"; reg = <0>; spi-max-frequency = <24000000>; spi-cpha; |