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authorLinus Torvalds <torvalds@linux-foundation.org>2022-08-12 09:44:23 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2022-08-12 09:44:23 -0700
commit999324f58c41262f5b64d04b7ac54e8f79b019fd (patch)
tree4aa403e5485bef11d1187428adcf20e67fa212f9 /arch/loongarch/kernel/head.S
parentf7cdaeeab8caf8e42fc176cdb272944e036ad998 (diff)
parent715355922212a3be8bfe5a94b5707a045ac6bf00 (diff)
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Merge tag 'loongarch-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
Pull LoongArch updates from Huacai Chen: - Optimise getcpu() with vDSO - PCI enablement on top of pci & irqchip changes - Stack unwinder and stack trace support - Some bug fixes and build error fixes - Update the default config file * tag 'loongarch-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson: docs/zh_CN/LoongArch: Add I14 description docs/LoongArch: Add I14 description LoongArch: Update Loongson-3 default config file LoongArch: Add USER_STACKTRACE support LoongArch: Add STACKTRACE support LoongArch: Add prologue unwinder support LoongArch: Add guess unwinder support LoongArch: Add vDSO syscall __vdso_getcpu() LoongArch: Add PCI controller support LoongArch: Parse MADT to get multi-processor information LoongArch: Jump to the link address before enable PG LoongArch: Requires __force attributes for any casts LoongArch: Fix unsigned comparison with less than zero LoongArch: Adjust arch/loongarch/Kconfig LoongArch: cpuinfo: Fix a warning for CONFIG_CPUMASK_OFFSTACK
Diffstat (limited to 'arch/loongarch/kernel/head.S')
-rw-r--r--arch/loongarch/kernel/head.S19
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S
index 7062cdf0e33e..c60eb66793e3 100644
--- a/arch/loongarch/kernel/head.S
+++ b/arch/loongarch/kernel/head.S
@@ -21,6 +21,12 @@ SYM_CODE_START(kernel_entry) # kernel entry point
csrwr t0, LOONGARCH_CSR_DMWIN0
li.d t0, CSR_DMW1_INIT # CA, PLV0, 0x9000 xxxx xxxx xxxx
csrwr t0, LOONGARCH_CSR_DMWIN1
+
+ /* We might not get launched at the address the kernel is linked to,
+ so we jump there. */
+ la.abs t0, 0f
+ jr t0
+0:
/* Enable PG */
li.w t0, 0xb0 # PLV=0, IE=0, PG=1
csrwr t0, LOONGARCH_CSR_CRMD
@@ -29,11 +35,6 @@ SYM_CODE_START(kernel_entry) # kernel entry point
li.w t0, 0x00 # FPE=0, SXE=0, ASXE=0, BTE=0
csrwr t0, LOONGARCH_CSR_EUEN
- /* We might not get launched at the address the kernel is linked to,
- so we jump there. */
- la.abs t0, 0f
- jr t0
-0:
la t0, __bss_start # clear .bss
st.d zero, t0, 0
la t1, __bss_stop - LONGSIZE
@@ -74,6 +75,11 @@ SYM_CODE_START(smpboot_entry)
csrwr t0, LOONGARCH_CSR_DMWIN0
li.d t0, CSR_DMW1_INIT # CA, PLV0
csrwr t0, LOONGARCH_CSR_DMWIN1
+
+ la.abs t0, 0f
+ jr t0
+0:
+ /* Enable PG */
li.w t0, 0xb0 # PLV=0, IE=0, PG=1
csrwr t0, LOONGARCH_CSR_CRMD
li.w t0, 0x04 # PLV=0, PIE=1, PWE=0
@@ -85,9 +91,6 @@ SYM_CODE_START(smpboot_entry)
ld.d sp, t0, CPU_BOOT_STACK
ld.d tp, t0, CPU_BOOT_TINFO
- la.abs t0, 0f
- jr t0
-0:
bl start_secondary
SYM_CODE_END(smpboot_entry)