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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-11-18 17:48:39 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-11-18 17:48:39 -0800 |
| commit | ae4336e20b8acb4d67205273645d27bd4d4392d4 (patch) | |
| tree | f79bdad647edd1af49dc640c8d740e6096096828 /arch/mips/include/asm/mips-cm.h | |
| parent | 0338cd9c22d1bce7dc4a6641d4215a50f476f429 (diff) | |
| parent | 56131e6d1fcce8e7359a2445711cc1a4ddb8325c (diff) | |
| download | linux-ae4336e20b8acb4d67205273645d27bd4d4392d4.tar.gz linux-ae4336e20b8acb4d67205273645d27bd4d4392d4.tar.bz2 linux-ae4336e20b8acb4d67205273645d27bd4d4392d4.zip | |
Merge tag 'mips_6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
"Just cleanups and fixes"
* tag 'mips_6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
mips: dts: realtek: Add I2C controllers
mips: dts: realtek: Add syscon-reboot node
MIPS: loongson3_defconfig: Enable blk_dev_nvme by default
MIPS: loongson3_defconfig: Update configs dependencies
MAINTAINERS: Remove linux-mips.org references
MAINTAINERS: Retire Ralf Baechle
TC: Fix the wrong format specifier
MIPS: kernel: proc: Use str_yes_no() helper function
MIPS: mobileye: eyeq6h-epm6: Use eyeq6h in the board device tree
mips: bmips: bcm6358/6368: define required brcm,bmips-cbr-reg
MIPS: Allow using more than 32-bit addresses for reset vectors when possible
mips: asm: fix warning when disabling MIPS_FP_SUPPORT
mips: sgi-ip22: Replace "s[n]?printf" with sysfs_emit in sysfs callbacks
Diffstat (limited to 'arch/mips/include/asm/mips-cm.h')
| -rw-r--r-- | arch/mips/include/asm/mips-cm.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h index 1e782275850a..23ce951f445b 100644 --- a/arch/mips/include/asm/mips-cm.h +++ b/arch/mips/include/asm/mips-cm.h @@ -326,7 +326,9 @@ GCR_CX_ACCESSOR_RW(32, 0x018, other) /* GCR_Cx_RESET_BASE - Configure where powered up cores will fetch from */ GCR_CX_ACCESSOR_RW(32, 0x020, reset_base) +GCR_CX_ACCESSOR_RW(64, 0x020, reset64_base) #define CM_GCR_Cx_RESET_BASE_BEVEXCBASE GENMASK(31, 12) +#define CM_GCR_Cx_RESET64_BASE_BEVEXCBASE GENMASK_ULL(47, 12) #define CM_GCR_Cx_RESET_BASE_MODE BIT(1) /* GCR_Cx_ID - Identify the current core */ |