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| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-08-24 18:32:47 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-07 22:24:09 +0200 |
| commit | 24a1c023f3ff3082fee9c019c17e6a34e2ddfe6b (patch) | |
| tree | 25ceb96a0bfd469da846b4140806161fe09fc806 /arch/mips/kernel/signal.c | |
| parent | 142439b0520a239bc10cf6c87d7773644c5dfe04 (diff) | |
| download | linux-24a1c023f3ff3082fee9c019c17e6a34e2ddfe6b.tar.gz linux-24a1c023f3ff3082fee9c019c17e6a34e2ddfe6b.tar.bz2 linux-24a1c023f3ff3082fee9c019c17e6a34e2ddfe6b.zip | |
MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config option
Use a new config option to enable TX49XX I-cache index invalidate
workaround and remove define from different war.h files.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/kernel/signal.c')
0 files changed, 0 insertions, 0 deletions