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| author | Jakub Kicinski <kuba@kernel.org> | 2022-02-10 17:29:56 -0800 |
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| committer | Jakub Kicinski <kuba@kernel.org> | 2022-02-10 17:29:56 -0800 |
| commit | 5b91c5cc0e7be4e41567cb2a6e21a8bb682c7cc5 (patch) | |
| tree | ed284edec0db783dfa80366ae8df078b02f35be9 /arch/x86/events/intel/core.c | |
| parent | 4f5e483b8c7a644733db941a1ae00173baa7b463 (diff) | |
| parent | f1baf68e1383f6ed93eb9cff2866d46562607a43 (diff) | |
| download | linux-5b91c5cc0e7be4e41567cb2a6e21a8bb682c7cc5.tar.gz linux-5b91c5cc0e7be4e41567cb2a6e21a8bb682c7cc5.tar.bz2 linux-5b91c5cc0e7be4e41567cb2a6e21a8bb682c7cc5.zip | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
No conflicts.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'arch/x86/events/intel/core.c')
| -rw-r--r-- | arch/x86/events/intel/core.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index c91434056c29..a3c7ca876aeb 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -4703,6 +4703,19 @@ static __initconst const struct x86_pmu intel_pmu = { .lbr_read = intel_pmu_lbr_read_64, .lbr_save = intel_pmu_lbr_save, .lbr_restore = intel_pmu_lbr_restore, + + /* + * SMM has access to all 4 rings and while traditionally SMM code only + * ran in CPL0, 2021-era firmware is starting to make use of CPL3 in SMM. + * + * Since the EVENTSEL.{USR,OS} CPL filtering makes no distinction + * between SMM or not, this results in what should be pure userspace + * counters including SMM data. + * + * This is a clear privilege issue, therefore globally disable + * counting SMM by default. + */ + .attr_freeze_on_smi = 1, }; static __init void intel_clovertown_quirk(void) |