summaryrefslogtreecommitdiff
path: root/drivers/clk/imx/clk-composite-7ulp.c
diff options
context:
space:
mode:
authorYe Li <ye.li@nxp.com>2024-06-07 21:33:35 +0800
committerAbel Vesa <abel.vesa@linaro.org>2024-06-21 09:35:21 +0300
commit4717ccadb51e2630790dddd222830702de17f090 (patch)
tree0f9c2ebbcc0a302e692967f69e077c1abd1826cb /drivers/clk/imx/clk-composite-7ulp.c
parentd342df11726bfac9c3a9d2037afa508ac0e9e44e (diff)
downloadlinux-4717ccadb51e2630790dddd222830702de17f090.tar.gz
linux-4717ccadb51e2630790dddd222830702de17f090.tar.bz2
linux-4717ccadb51e2630790dddd222830702de17f090.zip
clk: imx: composite-7ulp: Check the PCC present bit
When some module is disabled by fuse, its PCC PR bit is default 0 and PCC is not operational. Any write to this PCC will cause SError. Fixes: b40ba8065347 ("clk: imx: Update the compsite driver to support imx8ulp") Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240607133347.3291040-4-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Diffstat (limited to 'drivers/clk/imx/clk-composite-7ulp.c')
-rw-r--r--drivers/clk/imx/clk-composite-7ulp.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-composite-7ulp.c b/drivers/clk/imx/clk-composite-7ulp.c
index e208ddc51133..db7f40b07d1a 100644
--- a/drivers/clk/imx/clk-composite-7ulp.c
+++ b/drivers/clk/imx/clk-composite-7ulp.c
@@ -14,6 +14,7 @@
#include "../clk-fractional-divider.h"
#include "clk.h"
+#define PCG_PR_MASK BIT(31)
#define PCG_PCS_SHIFT 24
#define PCG_PCS_MASK 0x7
#define PCG_CGC_SHIFT 30
@@ -78,6 +79,12 @@ static struct clk_hw *imx_ulp_clk_hw_composite(const char *name,
struct clk_hw *hw;
u32 val;
+ val = readl(reg);
+ if (!(val & PCG_PR_MASK)) {
+ pr_info("PCC PR is 0 for clk:%s, bypass\n", name);
+ return 0;
+ }
+
if (mux_present) {
mux = kzalloc(sizeof(*mux), GFP_KERNEL);
if (!mux)