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authorLinus Torvalds <torvalds@linux-foundation.org>2022-05-27 21:24:19 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2022-05-27 21:24:19 -0700
commit9d004b2f4fea97cde123e7f1939b80e77bf2e695 (patch)
tree3d7055413cecd081d09d30799add0c17c3fb8eb9 /drivers/cxl/mem.c
parenta9f94826e4bb6402e67f3eb849dee0811f1de6da (diff)
parent34e37b4c432cd0f1842b352fde4b8878b4166888 (diff)
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Merge tag 'cxl-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl
Pull cxl updates from Dan Williams: "Compute Express Link (CXL) updates for this cycle. The highlight is new driver-core infrastructure and CXL subsystem changes for allowing lockdep to validate device_lock() usage. Thanks to PeterZ for setting me straight on the current capabilities of the lockdep API, and Greg acked it as well. On the CXL ACPI side this update adds support for CXL _OSC so that platform firmware knows that it is safe to still grant Linux native control of PCIe hotplug and error handling in the presence of CXL devices. A circular dependency problem was discovered between suspend and CXL memory for cases where the suspend image might be stored in CXL memory where that image also contains the PCI register state to restore to re-enable the device. Disable suspend for now until an architecture is defined to clarify that conflict. Lastly a collection of reworks, fixes, and cleanups to the CXL subsystem where support for snooping mailbox commands and properly handling the "mem_enable" flow are the highlights. Summary: - Add driver-core infrastructure for lockdep validation of device_lock(), and fixup a deadlock report that was previously hidden behind the 'lockdep no validate' policy. - Add CXL _OSC support for claiming native control of CXL hotplug and error handling. - Disable suspend in the presence of CXL memory unless and until a protocol is identified for restoring PCI device context from memory hosted on CXL PCI devices. - Add support for snooping CXL mailbox commands to protect against inopportune changes, like set-partition with the 'immediate' flag set. - Rework how the driver detects legacy CXL 1.1 configurations (CXL DVSEC / 'mem_enable') before enabling new CXL 2.0 decode configurations (CXL HDM Capability). - Miscellaneous cleanups and fixes from -next exposure" * tag 'cxl-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (47 commits) cxl/port: Enable HDM Capability after validating DVSEC Ranges cxl/port: Reuse 'struct cxl_hdm' context for hdm init cxl/port: Move endpoint HDM Decoder Capability init to port driver cxl/pci: Drop @info argument to cxl_hdm_decode_init() cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init() cxl/mem: Skip range enumeration if mem_enable clear cxl/mem: Consolidate CXL DVSEC Range enumeration in the core cxl/pci: Move cxl_await_media_ready() to the core cxl/mem: Validate port connectivity before dvsec ranges cxl/mem: Fix cxl_mem_probe() error exit cxl/pci: Drop wait_for_valid() from cxl_await_media_ready() cxl/pci: Consolidate wait_for_media() and wait_for_media_ready() cxl/mem: Drop mem_enabled check from wait_for_media() nvdimm: Fix firmware activation deadlock scenarios device-core: Kill the lockdep_mutex nvdimm: Drop nd_device_lock() ACPI: NFIT: Drop nfit_device_lock() nvdimm: Replace lockdep_mutex with local lock classes cxl: Drop cxl_device_lock() cxl/acpi: Add root device lockdep validation ...
Diffstat (limited to 'drivers/cxl/mem.c')
-rw-r--r--drivers/cxl/mem.c148
1 files changed, 24 insertions, 124 deletions
diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
index 49a4b1c47299..c310f1fd3db0 100644
--- a/drivers/cxl/mem.c
+++ b/drivers/cxl/mem.c
@@ -24,27 +24,6 @@
* in higher level operations.
*/
-static int wait_for_media(struct cxl_memdev *cxlmd)
-{
- struct cxl_dev_state *cxlds = cxlmd->cxlds;
- struct cxl_endpoint_dvsec_info *info = &cxlds->info;
- int rc;
-
- if (!info->mem_enabled)
- return -EBUSY;
-
- rc = cxlds->wait_media_ready(cxlds);
- if (rc)
- return rc;
-
- /*
- * We know the device is active, and enabled, if any ranges are non-zero
- * we'll need to check later before adding the port since that owns the
- * HDM decoder registers.
- */
- return 0;
-}
-
static int create_endpoint(struct cxl_memdev *cxlmd,
struct cxl_port *parent_port)
{
@@ -67,72 +46,14 @@ static int create_endpoint(struct cxl_memdev *cxlmd,
return cxl_endpoint_autoremove(cxlmd, endpoint);
}
-/**
- * cxl_dvsec_decode_init() - Setup HDM decoding for the endpoint
- * @cxlds: Device state
- *
- * Additionally, enables global HDM decoding. Warning: don't call this outside
- * of probe. Once probe is complete, the port driver owns all access to the HDM
- * decoder registers.
- *
- * Returns: false if DVSEC Ranges are being used instead of HDM
- * decoders, or if it can not be determined if DVSEC Ranges are in use.
- * Otherwise, returns true.
- */
-__mock bool cxl_dvsec_decode_init(struct cxl_dev_state *cxlds)
+static void enable_suspend(void *data)
{
- struct cxl_endpoint_dvsec_info *info = &cxlds->info;
- struct cxl_register_map map;
- struct cxl_component_reg_map *cmap = &map.component_map;
- bool global_enable, do_hdm_init = false;
- void __iomem *crb;
- u32 global_ctrl;
-
- /* map hdm decoder */
- crb = ioremap(cxlds->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE);
- if (!crb) {
- dev_dbg(cxlds->dev, "Failed to map component registers\n");
- return false;
- }
-
- cxl_probe_component_regs(cxlds->dev, crb, cmap);
- if (!cmap->hdm_decoder.valid) {
- dev_dbg(cxlds->dev, "Invalid HDM decoder registers\n");
- goto out;
- }
-
- global_ctrl = readl(crb + cmap->hdm_decoder.offset +
- CXL_HDM_DECODER_CTRL_OFFSET);
- global_enable = global_ctrl & CXL_HDM_DECODER_ENABLE;
- if (!global_enable && info->ranges) {
- dev_dbg(cxlds->dev,
- "DVSEC ranges already programmed and HDM decoders not enabled.\n");
- goto out;
- }
-
- do_hdm_init = true;
-
- /*
- * Permanently (for this boot at least) opt the device into HDM
- * operation. Individual HDM decoders still need to be enabled after
- * this point.
- */
- if (!global_enable) {
- dev_dbg(cxlds->dev, "Enabling HDM decode\n");
- writel(global_ctrl | CXL_HDM_DECODER_ENABLE,
- crb + cmap->hdm_decoder.offset +
- CXL_HDM_DECODER_CTRL_OFFSET);
- }
-
-out:
- iounmap(crb);
- return do_hdm_init;
+ cxl_mem_active_dec();
}
static int cxl_mem_probe(struct device *dev)
{
struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
- struct cxl_dev_state *cxlds = cxlmd->cxlds;
struct cxl_port *parent_port;
int rc;
@@ -147,44 +68,6 @@ static int cxl_mem_probe(struct device *dev)
if (work_pending(&cxlmd->detach_work))
return -EBUSY;
- rc = wait_for_media(cxlmd);
- if (rc) {
- dev_err(dev, "Media not active (%d)\n", rc);
- return rc;
- }
-
- /*
- * If DVSEC ranges are being used instead of HDM decoder registers there
- * is no use in trying to manage those.
- */
- if (!cxl_dvsec_decode_init(cxlds)) {
- struct cxl_endpoint_dvsec_info *info = &cxlds->info;
- int i;
-
- /* */
- for (i = 0; i < 2; i++) {
- u64 base, size;
-
- /*
- * Give a nice warning to the user that BIOS has really
- * botched things for them if it didn't place DVSEC
- * ranges in the memory map.
- */
- base = info->dvsec_range[i].start;
- size = range_len(&info->dvsec_range[i]);
- if (size && !region_intersects(base, size,
- IORESOURCE_SYSTEM_RAM,
- IORES_DESC_NONE)) {
- dev_err(dev,
- "DVSEC range %#llx-%#llx must be reserved by BIOS, but isn't\n",
- base, base + size - 1);
- }
- }
- dev_err(dev,
- "Active DVSEC range registers in use. Will not bind.\n");
- return -EBUSY;
- }
-
rc = devm_cxl_enumerate_ports(cxlmd);
if (rc)
return rc;
@@ -195,19 +78,36 @@ static int cxl_mem_probe(struct device *dev)
return -ENXIO;
}
- cxl_device_lock(&parent_port->dev);
+ device_lock(&parent_port->dev);
if (!parent_port->dev.driver) {
dev_err(dev, "CXL port topology %s not enabled\n",
dev_name(&parent_port->dev));
rc = -ENXIO;
- goto out;
+ goto unlock;
}
rc = create_endpoint(cxlmd, parent_port);
-out:
- cxl_device_unlock(&parent_port->dev);
+unlock:
+ device_unlock(&parent_port->dev);
put_device(&parent_port->dev);
- return rc;
+ if (rc)
+ return rc;
+
+ /*
+ * The kernel may be operating out of CXL memory on this device,
+ * there is no spec defined way to determine whether this device
+ * preserves contents over suspend, and there is no simple way
+ * to arrange for the suspend image to avoid CXL memory which
+ * would setup a circular dependency between PCI resume and save
+ * state restoration.
+ *
+ * TODO: support suspend when all the regions this device is
+ * hosting are locked and covered by the system address map,
+ * i.e. platform firmware owns restoring the HDM configuration
+ * that it locked.
+ */
+ cxl_mem_active_inc();
+ return devm_add_action_or_reset(dev, enable_suspend, NULL);
}
static struct cxl_driver cxl_mem_driver = {