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authorDan Carpenter <dan.carpenter@linaro.org>2024-11-15 17:11:38 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-11-22 15:37:32 +0100
commit769698a45f4fb2905f6920d93e8e71eaa4743ef2 (patch)
tree5aea978709a1fdab7404cda624dda6d4d58d9c90 /drivers/cxl
parentc7fa16e41acd789da6cc434b4d5b88eef57b99c1 (diff)
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cxl/pci: fix error code in __cxl_hdm_decode_init()
When commit 0cab68720598 ("cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window") was backported, this chunk moved from the cxl_hdm_decode_init() function which returns negative error codes to the __cxl_hdm_decode_init() function which returns false on error. So the error code needs to be modified from -ENXIO to false. This issue only exits in the 6.1.y kernels. In later kernels negative error codes are correct and the driver didn't exist in earlier kernels. Fixes: 031217128990 ("cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/cxl')
-rw-r--r--drivers/cxl/core/pci.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index 8d92a24fd73d..97adf9a7ea89 100644
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c
@@ -377,7 +377,7 @@ static bool __cxl_hdm_decode_init(struct cxl_dev_state *cxlds,
if (!allowed && info->mem_enabled) {
dev_err(dev, "Range register decodes outside platform defined CXL ranges.\n");
- return -ENXIO;
+ return false;
}
/*