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path: root/drivers/cxl
AgeCommit message (Expand)AuthorFilesLines
2024-12-27cxl/region: Fix region creation for greater than x2 switchesHuaisheng Ye1-7/+18
2024-11-22cxl/pci: fix error code in __cxl_hdm_decode_init()Dan Carpenter1-1/+1
2024-11-08cxl/port: Fix cxl_bus_rescan() vs bus_rescan_devices()Dan Williams1-3/+10
2024-11-08cxl/acpi: Move rescan to the workqueueDan Williams3-5/+34
2024-10-17cxl/pci: Fix to record only non-zero rangesYanfei Xu1-7/+1
2024-10-17cxl/pci: Break out range register decoding from cxl_hdm_decode_init()Dave Jiang1-24/+40
2024-09-18cxl/core: Fix incorrect vendor debug UUID definepeng guo1-1/+1
2024-03-01cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS windowRobert Richter1-3/+3
2024-01-31cxl/region：Fix overflow issue in alloc_hpa()Quanquan Cao1-2/+2
2024-01-25cxl/region: fix x9 interleave typoJim Harris1-1/+1
2024-01-25cxl/port: Fix decoder initialization when nr_targets > interleave_waysHuang Ying1-1/+1
2023-11-28cxl/port: Fix NULL pointer access in devm_cxl_add_port()Robert Richter1-4/+3
2023-11-28cxl/region: Fix x1 root-decoder granularity calculationsJim Harris1-1/+8
2023-11-28tools/testing/cxl: Define a fixed volatile configuration to parseDan Williams5-4/+9
2023-11-28cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_memDan Williams5-49/+47
2023-11-28cxl: Unify debug messages when calling devm_cxl_add_port()Robert Richter2-14/+39
2023-11-28cxl/region: Do not try to cleanup after cxl_region_setup_targets() failsJim Harris1-7/+7
2023-11-28cxl/region: Move region-position validation to a helperDan Williams1-43/+76
2023-11-28cxl/region: Cleanup target list on attach errorDan Williams1-0/+2
2023-11-28cxl/region: Validate region mode vs decoder modeDan Williams1-0/+6
2023-11-20cxl/mem: Fix shutdown orderDan Williams1-1/+1
2023-08-03cxl/acpi: Return 'rc' instead of '0' in cxl_parse_cfmws()Breno Leitao1-1/+1
2023-08-03cxl/acpi: Fix a use-after-free in cxl_parse_cfmws()Breno Leitao1-2/+1
2023-05-30cxl: Wait Memory_Info_Valid before access memory related infoDave Jiang2-9/+78
2023-05-11cxl/hdm: Fail upon detecting 0-sized decodersDan Williams1-3/+12
2023-04-13cxl/pci: Handle excessive CDAT lengthLukas Wunner1-0/+3
2023-04-13cxl/pci: Handle truncated CDAT entriesLukas Wunner2-4/+23
2023-04-13cxl/pci: Handle truncated CDAT headerLukas Wunner1-1/+1
2023-04-13cxl/pci: Fix CDAT retrieval on big endianLukas Wunner1-13/+13
2023-03-10cxl/pmem: Fix nvdimm registration racesDan Williams1-0/+1
2023-02-14cxl/region: Fix passthrough-decoder detectionDan Williams1-2/+2
2023-02-14cxl/region: Fix null pointer dereference for resetting decoderFan Ni1-3/+5
2023-01-07cxl/region: Fix missing probe failureDan Williams1-0/+3
2023-01-07cxl/region: Fix memdev reuse checkFan Ni1-1/+1
2022-11-04cxl/region: Recycle region idsDan Williams1-0/+20
2022-11-04cxl/region: Fix 'distance' calculation with passthrough portsDan Williams3-3/+19
2022-11-04cxl/pmem: Fix cxl_pmem_region and cxl_memdev leakDan Williams3-37/+68
2022-11-04cxl/region: Fix cxl_region leak, cleanup targets at region deleteDan Williams1-0/+11
2022-11-04cxl/region: Fix region HPA ordering validationDan Williams1-0/+3
2022-11-03cxl/pmem: Use size_add() against integer overflowYu Zhe1-1/+1
2022-11-01cxl/region: Fix decoder allocation crashVishal Verma1-26/+41
2022-10-20cxl/pmem: Fix failure to account for 8 byte header for writes to the device LSA.Jonathan Cameron1-1/+1
2022-10-20cxl/region: Fix null pointer dereference due to pass through decoder commitJonathan Cameron1-1/+2
2022-10-20cxl/mbox: Add a check on input payload sizeJonathan Cameron1-1/+1
2022-08-05cxl/hdm: Fix skip allocations vs multiple pmem allocationsDan Williams1-1/+10
2022-08-05cxl/region: Disallow region granularity != window granularityDan Williams1-6/+7
2022-08-05cxl/region: Fix x1 interleave to greater than x1 interleave routingDan Williams1-1/+5
2022-08-05cxl/region: Move HPA setup to cxl_region_attach()Dan Williams2-26/+24
2022-08-05cxl/region: Fix decoder interleave programmingDan Williams1-0/+3
2022-08-05cxl/region: describe targets and nr_targets members of cxl_region_paramsBagas Sanjaya1-0/+2
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