summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/display/intel_psr.c
diff options
context:
space:
mode:
authorJouni Högander <jouni.hogander@intel.com>2024-05-28 14:44:55 +0300
committerJouni Högander <jouni.hogander@intel.com>2024-05-29 08:34:31 +0300
commitfec7efe7bf2d7fd7824a5d0420e13d4a03bbfb47 (patch)
treee7ef27aa99980689a1318369a89a731b3eb72cdf /drivers/gpu/drm/i915/display/intel_psr.c
parentf0faeb2e701ca51115ff4f025152dfc685f9ca07 (diff)
downloadlinux-fec7efe7bf2d7fd7824a5d0420e13d4a03bbfb47.tar.gz
linux-fec7efe7bf2d7fd7824a5d0420e13d4a03bbfb47.tar.bz2
linux-fec7efe7bf2d7fd7824a5d0420e13d4a03bbfb47.zip
drm/i915/psr: modify psr status debugfs to support eDP Panel Replay
Some PSR2_CTL bits are applicable for eDP panel replay as well. Dump this register for eDP Panel Replay as well. Bspec: 68920 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240528114455.175961-6-jouni.hogander@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_psr.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_psr.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index dfd45f6d7edd..19f8ac12f995 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3628,7 +3628,7 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
struct intel_psr *psr = &intel_dp->psr;
intel_wakeref_t wakeref;
bool enabled;
- u32 val;
+ u32 val, psr2_ctl;
intel_psr_sink_capability(intel_dp, m);
@@ -3649,6 +3649,12 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
if (psr->panel_replay_enabled) {
val = intel_de_read(dev_priv, TRANS_DP2_CTL(cpu_transcoder));
+
+ if (intel_dp_is_edp(intel_dp))
+ psr2_ctl = intel_de_read(dev_priv,
+ EDP_PSR2_CTL(dev_priv,
+ cpu_transcoder));
+
enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
} else if (psr->sel_update_enabled) {
val = intel_de_read(dev_priv,
@@ -3660,6 +3666,9 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
}
seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
str_enabled_disabled(enabled), val);
+ if (psr->panel_replay_enabled && intel_dp_is_edp(intel_dp))
+ seq_printf(m, "PSR2_CTL: 0x%08x\n",
+ psr2_ctl);
psr_source_status(intel_dp, m);
seq_printf(m, "Busy frontbuffer bits: 0x%08x\n",
psr->busy_frontbuffer_bits);