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author | Dave Airlie <airlied@redhat.com> | 2023-02-03 04:45:16 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2023-02-03 04:45:17 +1000 |
commit | 535cd7104b4efacab3bf7e56b8ad263e1160a47f (patch) | |
tree | 5cf141af6d7f09218b205f3744e4ffbd8243e514 /drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | |
parent | e9b71eb1b2405ec2484fbf4844de5cbfd53106bc (diff) | |
parent | dbd7a2a941b8cbf9e5f79a777ed9fe0090eebb61 (diff) | |
download | linux-535cd7104b4efacab3bf7e56b8ad263e1160a47f.tar.gz linux-535cd7104b4efacab3bf7e56b8ad263e1160a47f.tar.bz2 linux-535cd7104b4efacab3bf7e56b8ad263e1160a47f.zip |
Merge tag 'drm-msm-next-2023-01-30' of https://gitlab.freedesktop.org/drm/msm into drm-next
msm-next for v6.3
There is one devfreq patch, maintainer acked to land via msm-next to
avoid a build break on platforms that do not support PM_DEVFREQ. And
otherwise the usual assortment:
GPU:
- Add MSM_SUBMIT_BO_NO_IMPLICIT
- a2xx: Support to load legacy firmware
- a6xx: GPU devcore dump updates for a650/a660
- GPU devfreq tuning and fixes
DPU, DSI, MDSS:
- Support for SM8350, SM8450 SM8550 and SC8280XP platform
Core:
- Added bindings for SM8150 (driver support already present)
DPU:
- Partial support for DSC on SM8150 and SM8250
- Fixed color transformation matrix being lost on suspend/resume
- Include DSC blocks into register snapshot
- Misc HW catalog fixes
DP:
- Support for DP on SDM845 and SC8280XP platforms
- HPD fixes
- Support for limiting DP link rate via DT property, this enables
- Support for HBR3 rates.
DSI:
- Validate display modes according to the DSI OPP table
- DSI PHY support for the SM6375 platform
- Fixed byte intf clock selection for 14nm PHYs
- Fix the case of empty OPP tables (fixing db410c)
- DT schema rework and fixes
HDMI:
- Turn 8960 HDMI PHY into clock provider,
- Make 8960 HDMI PHY use PXO clock from DT
MDP5:
- Schema conversion to YAML
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGv6zQ-zsgS+NG+WuV=tk51q9vA2QdKqYhNgiXQddAdZjA@mail.gmail.com
Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c')
-rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 18 |
1 files changed, 5 insertions, 13 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index ae28b2b93e69..c8f4a62a9536 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -61,6 +61,7 @@ static void _dpu_encoder_phys_cmd_update_intf_cfg( intf_cfg.intf_mode_sel = DPU_CTL_MODE_SEL_CMD; intf_cfg.stream_sel = cmd_enc->stream_sel; intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); + intf_cfg.dsc = dpu_encoder_helper_get_dsc(phys_enc); ctl->ops.setup_intf_cfg(ctl, &intf_cfg); /* setup which pp blk will connect to this intf */ @@ -83,9 +84,7 @@ static void dpu_encoder_phys_cmd_pp_tx_done_irq(void *arg, int irq_idx) DPU_ATRACE_BEGIN("pp_done_irq"); /* notify all synchronous clients first, then asynchronous clients */ - if (phys_enc->parent_ops->handle_frame_done) - phys_enc->parent_ops->handle_frame_done(phys_enc->parent, - phys_enc, event); + dpu_encoder_frame_done_callback(phys_enc->parent, phys_enc, event); spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags); new_cnt = atomic_add_unless(&phys_enc->pending_kickoff_cnt, -1, 0); @@ -111,9 +110,7 @@ static void dpu_encoder_phys_cmd_pp_rd_ptr_irq(void *arg, int irq_idx) DPU_ATRACE_BEGIN("rd_ptr_irq"); cmd_enc = to_dpu_encoder_phys_cmd(phys_enc); - if (phys_enc->parent_ops->handle_vblank_virt) - phys_enc->parent_ops->handle_vblank_virt(phys_enc->parent, - phys_enc); + dpu_encoder_vblank_callback(phys_enc->parent, phys_enc); atomic_add_unless(&cmd_enc->pending_vblank_cnt, -1, 0); wake_up_all(&cmd_enc->pending_vblank_wq); @@ -137,9 +134,7 @@ static void dpu_encoder_phys_cmd_underrun_irq(void *arg, int irq_idx) { struct dpu_encoder_phys *phys_enc = arg; - if (phys_enc->parent_ops->handle_underrun_virt) - phys_enc->parent_ops->handle_underrun_virt(phys_enc->parent, - phys_enc); + dpu_encoder_underrun_callback(phys_enc->parent, phys_enc); } static void dpu_encoder_phys_cmd_atomic_mode_set( @@ -202,9 +197,7 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout( /* request a ctl reset before the next kickoff */ phys_enc->enable_state = DPU_ENC_ERR_NEEDS_HW_RESET; - if (phys_enc->parent_ops->handle_frame_done) - phys_enc->parent_ops->handle_frame_done( - drm_enc, phys_enc, frame_event); + dpu_encoder_frame_done_callback(phys_enc->parent, phys_enc, frame_event); return -ETIMEDOUT; } @@ -780,7 +773,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init( dpu_encoder_phys_cmd_init_ops(&phys_enc->ops); phys_enc->parent = p->parent; - phys_enc->parent_ops = p->parent_ops; phys_enc->dpu_kms = p->dpu_kms; phys_enc->split_role = p->split_role; phys_enc->intf_mode = INTF_MODE_CMD; |