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| author | Jonathan Marek <jonathan@marek.ca> | 2021-06-17 10:43:35 -0400 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2021-08-07 11:48:37 -0700 |
| commit | 5ac178381d2652719566322e7a04ef18c98d5092 (patch) | |
| tree | c366b36b21adde7bbfe655287a12aea4824aa9a7 /drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | |
| parent | bb5b94f5bbe75470912b70fb08880fc5273aa62d (diff) | |
| download | linux-5ac178381d2652719566322e7a04ef18c98d5092.tar.gz linux-5ac178381d2652719566322e7a04ef18c98d5092.tar.bz2 linux-5ac178381d2652719566322e7a04ef18c98d5092.zip | |
drm/msm/dsi: support CPHY mode for 7nm pll/phy
Add the required changes to support 7nm pll/phy in CPHY mode.
This adds a "qcom,dsi-phy-cphy-mode" property for the PHY node to enable
the CPHY mode.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210617144349.28448-4-jonathan@marek.ca
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/phy/dsi_phy.h')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h index 5b0feef87127..675f0b450ec5 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h @@ -99,6 +99,7 @@ struct msm_dsi_phy { enum msm_dsi_phy_usecase usecase; bool regulator_ldo_mode; + bool cphy_mode; struct clk_hw *vco_hw; bool pll_on; @@ -119,5 +120,7 @@ int msm_dsi_dphy_timing_calc_v3(struct msm_dsi_dphy_timing *timing, struct msm_dsi_phy_clk_request *clk_req); int msm_dsi_dphy_timing_calc_v4(struct msm_dsi_dphy_timing *timing, struct msm_dsi_phy_clk_request *clk_req); +int msm_dsi_cphy_timing_calc_v4(struct msm_dsi_dphy_timing *timing, + struct msm_dsi_phy_clk_request *clk_req); #endif /* __DSI_PHY_H__ */ |