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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2021-03-31 13:57:19 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2021-04-07 11:05:45 -0700 |
| commit | 076437c9e360737c85d443bbf81d5ea02b3d182d (patch) | |
| tree | 20a0c62b459a63d149a41fb5b98b243fbfd24cfb /drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | |
| parent | 80d2229bf0e7b169a1ab3adcaed9c4ce336f50b2 (diff) | |
| download | linux-076437c9e360737c85d443bbf81d5ea02b3d182d.tar.gz linux-076437c9e360737c85d443bbf81d5ea02b3d182d.tar.bz2 linux-076437c9e360737c85d443bbf81d5ea02b3d182d.zip | |
drm/msm/dsi: move min/max PLL rate to phy config
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor
Link: https://lore.kernel.org/r/20210331105735.3690009-9-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c index d78f846cf8e4..8e4528301e5d 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c @@ -1078,8 +1078,6 @@ static int dsi_pll_14nm_init(struct msm_dsi_phy *phy) spin_lock_init(&pll_14nm->postdiv_lock); pll = &pll_14nm->base; - pll->min_rate = VCO_MIN_RATE; - pll->max_rate = VCO_MAX_RATE; pll->cfg = phy->cfg; pll_14nm->vco_delay = 1; @@ -1237,6 +1235,8 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs = { .disable_seq = dsi_pll_14nm_disable_seq, .enable_seq = dsi_pll_14nm_enable_seq, }, + .min_pll_rate = VCO_MIN_RATE, + .max_pll_rate = VCO_MAX_RATE, .io_start = { 0x994400, 0x996400 }, .num_dsi_phy = 2, }; @@ -1264,6 +1264,8 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs = { .disable_seq = dsi_pll_14nm_disable_seq, .enable_seq = dsi_pll_14nm_enable_seq, }, + .min_pll_rate = VCO_MIN_RATE, + .max_pll_rate = VCO_MAX_RATE, .io_start = { 0xc994400, 0xc996000 }, .num_dsi_phy = 2, }; |