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| author | Shiraz Saleem <shiraz.saleem@intel.com> | 2023-07-11 12:52:51 -0500 |
|---|---|---|
| committer | Leon Romanovsky <leon@kernel.org> | 2023-07-17 08:01:22 +0300 |
| commit | 4984eb51453ff7eddee9e5ce816145be39c0ec5c (patch) | |
| tree | f9d69baeb34327823104ff9c0dab987876faf0e0 /drivers/infiniband/hw/irdma/ctrl.c | |
| parent | d64b1ee12a168030fbb3e0aebf7bce49e9a07589 (diff) | |
| download | linux-4984eb51453ff7eddee9e5ce816145be39c0ec5c.tar.gz linux-4984eb51453ff7eddee9e5ce816145be39c0ec5c.tar.bz2 linux-4984eb51453ff7eddee9e5ce816145be39c0ec5c.zip | |
RDMA/irdma: Add missing read barriers
On code inspection, there are many instances in the driver where
CEQE and AEQE fields written to by HW are read without guaranteeing
that the polarity bit has been read and checked first.
Add a read barrier to avoid reordering of loads on the CEQE/AEQE fields
prior to checking the polarity bit.
Fixes: 3f49d6842569 ("RDMA/irdma: Implement HW Admin Queue OPs")
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Link: https://lore.kernel.org/r/20230711175253.1289-2-shiraz.saleem@intel.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'drivers/infiniband/hw/irdma/ctrl.c')
| -rw-r--r-- | drivers/infiniband/hw/irdma/ctrl.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/irdma/ctrl.c b/drivers/infiniband/hw/irdma/ctrl.c index d88c9184007e..c91439f428c7 100644 --- a/drivers/infiniband/hw/irdma/ctrl.c +++ b/drivers/infiniband/hw/irdma/ctrl.c @@ -3363,6 +3363,9 @@ int irdma_sc_ccq_get_cqe_info(struct irdma_sc_cq *ccq, if (polarity != ccq->cq_uk.polarity) return -ENOENT; + /* Ensure CEQE contents are read after valid bit is checked */ + dma_rmb(); + get_64bit_val(cqe, 8, &qp_ctx); cqp = (struct irdma_sc_cqp *)(unsigned long)qp_ctx; info->error = (bool)FIELD_GET(IRDMA_CQ_ERROR, temp); @@ -4009,13 +4012,17 @@ int irdma_sc_get_next_aeqe(struct irdma_sc_aeq *aeq, u8 polarity; aeqe = IRDMA_GET_CURRENT_AEQ_ELEM(aeq); - get_64bit_val(aeqe, 0, &compl_ctx); get_64bit_val(aeqe, 8, &temp); polarity = (u8)FIELD_GET(IRDMA_AEQE_VALID, temp); if (aeq->polarity != polarity) return -ENOENT; + /* Ensure AEQE contents are read after valid bit is checked */ + dma_rmb(); + + get_64bit_val(aeqe, 0, &compl_ctx); + print_hex_dump_debug("WQE: AEQ_ENTRY WQE", DUMP_PREFIX_OFFSET, 16, 8, aeqe, 16, false); |