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| author | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2024-04-18 10:33:55 +0000 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2024-04-26 12:16:02 +0200 |
| commit | 405e2f122b83363f6793c5cb086cede536495b4f (patch) | |
| tree | 8425785904540b0a0506dc08871f51c41ea64255 /drivers/iommu/amd/amd_iommu.h | |
| parent | 61928bab9d26b147d41d9b9a4d2328d0e1d6c0c0 (diff) | |
| download | linux-405e2f122b83363f6793c5cb086cede536495b4f.tar.gz linux-405e2f122b83363f6793c5cb086cede536495b4f.tar.bz2 linux-405e2f122b83363f6793c5cb086cede536495b4f.zip | |
iommu/amd: Add support for page response
This generates AMD IOMMU COMPLETE_PPR_REQUEST for the specified device
with the specified PRI Response Code.
Also update amd_iommu_complete_ppr() to accept 'struct device' instead
of pdev as it just need device reference.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Wei Huang <wei.huang2@amd.com>
Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20240418103400.6229-11-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/amd/amd_iommu.h')
| -rw-r--r-- | drivers/iommu/amd/amd_iommu.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h index 66bf20d4a91a..bb9a4c2e40da 100644 --- a/drivers/iommu/amd/amd_iommu.h +++ b/drivers/iommu/amd/amd_iommu.h @@ -49,6 +49,8 @@ bool amd_iommu_pasid_supported(void); /* IOPF */ int amd_iommu_iopf_init(struct amd_iommu *iommu); void amd_iommu_iopf_uninit(struct amd_iommu *iommu); +void amd_iommu_page_response(struct device *dev, struct iopf_fault *evt, + struct iommu_page_response *resp); /* GCR3 setup */ int amd_iommu_set_gcr3(struct iommu_dev_data *dev_data, @@ -60,8 +62,7 @@ int __init amd_iommu_alloc_ppr_log(struct amd_iommu *iommu); void __init amd_iommu_free_ppr_log(struct amd_iommu *iommu); void amd_iommu_enable_ppr_log(struct amd_iommu *iommu); void amd_iommu_poll_ppr_log(struct amd_iommu *iommu); -int amd_iommu_complete_ppr(struct pci_dev *pdev, u32 pasid, - int status, int tag); +int amd_iommu_complete_ppr(struct device *dev, u32 pasid, int status, int tag); /* * This function flushes all internal caches of |