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| author | Tomer Tayar <ttayar@habana.ai> | 2022-06-29 16:37:55 +0300 |
|---|---|---|
| committer | Oded Gabbay <ogabbay@kernel.org> | 2022-07-12 09:09:30 +0300 |
| commit | 1cf596c6b9ac07a94fa8489866511e76f9c7644b (patch) | |
| tree | 59a4dfaf02136d00a5c4107a37c8861f73d0a606 /drivers/misc/habanalabs/gaudi2/gaudi2_masks.h | |
| parent | af2e650b36a9a0c0e127dde20c394cbbf318e729 (diff) | |
| download | linux-1cf596c6b9ac07a94fa8489866511e76f9c7644b.tar.gz linux-1cf596c6b9ac07a94fa8489866511e76f9c7644b.tar.bz2 linux-1cf596c6b9ac07a94fa8489866511e76f9c7644b.zip | |
habanalabs/gaudi2: configure virtual MSI-X doorbell interface
Due to a watchdog timer in the LBW path, writes to the MSI-X doorbell
can return sporadic error responses.
To work-around this issue, a virtual MSI-X doorbell on the HBW path is
configured, using the MSI-X AXI slave interface in the PCIe controller.
Upon an access to a configured HBW host address, the controller will
generate MSI-X interrupt instead of treating the access as regular host
memory access.
This patch allocates the dedicate host memory page, and communicate the
address to F/W, so it will configure the relevant address match
registers in the controller, and will use this address to generate MSI-X
interrupts for F/W events.
Following patches will handle other initiators in the device, to move
them to use the virtual MSI-X doorbell.
Signed-off-by: Tomer Tayar <ttayar@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Diffstat (limited to 'drivers/misc/habanalabs/gaudi2/gaudi2_masks.h')
| -rw-r--r-- | drivers/misc/habanalabs/gaudi2/gaudi2_masks.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/gaudi2/gaudi2_masks.h b/drivers/misc/habanalabs/gaudi2/gaudi2_masks.h index 19ec1f130bef..3fd5cf4a8645 100644 --- a/drivers/misc/habanalabs/gaudi2/gaudi2_masks.h +++ b/drivers/misc/habanalabs/gaudi2/gaudi2_masks.h @@ -132,4 +132,7 @@ #define ROT_MSS_HALT_RSB_MASK BIT(1) #define ROT_MSS_HALT_MRSB_MASK BIT(2) +#define PCIE_DBI_MSIX_ADDRESS_MATCH_LOW_OFF_MSIX_ADDRESS_MATCH_EN_SHIFT 0 +#define PCIE_DBI_MSIX_ADDRESS_MATCH_LOW_OFF_MSIX_ADDRESS_MATCH_EN_MASK 0x1 + #endif /* GAUDI2_MASKS_H_ */ |