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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-07-07 22:53:15 +0200 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-07-07 22:53:15 +0200 |
| commit | 46ce10df799fb0647a9c0e3f793e66463a8d6773 (patch) | |
| tree | 140657df086dc5c81b3965921cc1e9abe54c433c /drivers/mtd/spi-nor/intel-spi-pci.c | |
| parent | 3bb4bba79254be87c86ef416d6b7f69882e6a02c (diff) | |
| parent | 8d1336c241bdadf61a56e398d82d1e512dbff5f8 (diff) | |
| download | linux-46ce10df799fb0647a9c0e3f793e66463a8d6773.tar.gz linux-46ce10df799fb0647a9c0e3f793e66463a8d6773.tar.bz2 linux-46ce10df799fb0647a9c0e3f793e66463a8d6773.zip | |
Merge tag 'spi-nor/for-5.3-v2' of gitolite.kernel.org:pub/scm/linux/kernel/git/mtd/linux into mtd/next
SPI-NOR core changes:
- add support for the mt25ql02g and w25q16jv flashes
- print error in case of jedec read id fails
- is25lp256: add post BFPT fix to correct the addr_width
SPI NOR controller drivers changes:
- intel-spi: Add support for Intel Elkhart Lake SPI serial flash
- smt32: remove the driver as the driver was replaced by spi-stm32-qspi.c
- cadence-quadspi: add reset control
Diffstat (limited to 'drivers/mtd/spi-nor/intel-spi-pci.c')
| -rw-r--r-- | drivers/mtd/spi-nor/intel-spi-pci.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c b/drivers/mtd/spi-nor/intel-spi-pci.c index bfbfc17ed6aa..1b9c2d99ba38 100644 --- a/drivers/mtd/spi-nor/intel-spi-pci.c +++ b/drivers/mtd/spi-nor/intel-spi-pci.c @@ -1,12 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Intel PCH/PCU SPI flash PCI driver. * * Copyright (C) 2016, Intel Corporation * Author: Mika Westerberg <mika.westerberg@linux.intel.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #include <linux/ioport.h> @@ -67,6 +64,7 @@ static const struct pci_device_id intel_spi_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info }, { PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info }, { PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x4b24), (unsigned long)&bxt_info }, { PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info }, { PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info }, { }, |