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| author | Lucas Stach <l.stach@pengutronix.de> | 2024-07-01 10:53:41 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2024-07-03 09:13:38 +0100 |
| commit | 8d7330b3a9c6db53d4462820df566c0b1e77d831 (patch) | |
| tree | 6a61c295f0f31f0bc129208a774b3116eddb7aab /drivers/net/dsa/microchip/lan937x_reg.h | |
| parent | df18948d331eacc213cfc9e8ffc84a07dfd4dcd1 (diff) | |
| download | linux-8d7330b3a9c6db53d4462820df566c0b1e77d831.tar.gz linux-8d7330b3a9c6db53d4462820df566c0b1e77d831.tar.bz2 linux-8d7330b3a9c6db53d4462820df566c0b1e77d831.zip | |
net: dsa: microchip: lan9371/2: add 100BaseTX PHY support
On the LAN9371 and LAN9372, the 4th internal PHY is a 100BaseTX PHY
instead of a 100BaseT1 PHY. The 100BaseTX PHYs have a different base
register offset.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/microchip/lan937x_reg.h')
| -rw-r--r-- | drivers/net/dsa/microchip/lan937x_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/dsa/microchip/lan937x_reg.h b/drivers/net/dsa/microchip/lan937x_reg.h index 45b606b6429f..7ecada924023 100644 --- a/drivers/net/dsa/microchip/lan937x_reg.h +++ b/drivers/net/dsa/microchip/lan937x_reg.h @@ -147,6 +147,7 @@ /* 1 - Phy */ #define REG_PORT_T1_PHY_CTRL_BASE 0x0100 +#define REG_PORT_TX_PHY_CTRL_BASE 0x0280 /* 3 - xMII */ #define PORT_SGMII_SEL BIT(7) |