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authorBjorn Helgaas <bhelgaas@google.com>2024-09-19 14:25:24 -0500
committerBjorn Helgaas <bhelgaas@google.com>2024-09-19 14:25:24 -0500
commit59b748cd62e4b1af6fb4992ce9d07b4f4c2189b3 (patch)
treec44a9e90b6adf249f88c2b3e62ea53253d90305a /drivers/pci/pci-bridge-emul.c
parent1a3465598e7501aa51a4088cd9b77627b821b33b (diff)
parent87f10faf166a9114aa0d4132298cad379de16fdd (diff)
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Merge branch 'pci/crs'
- Wait for device readiness after reset by polling Vendor ID and looking for Configuration RRS instead of polling the Command register and looking for non-error completions (Bjorn Helgaas) - Fix an aardvark issue with emulating Configuration RRS for two-byte reads of Vendor ID; previously it only worked for four-byte reads (Bjorn Helgaas) - Rename CRS Completion Status to RRS to match spec usage (Bjorn Helgaas) * pci/crs: PCI: Rename CRS Completion Status to RRS PCI: aardvark: Correct Configuration RRS checking PCI: Wait for device readiness with Configuration RRS
Diffstat (limited to 'drivers/pci/pci-bridge-emul.c')
-rw-r--r--drivers/pci/pci-bridge-emul.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 9334b2dd4764..6658c1edd464 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -257,8 +257,8 @@ struct pci_bridge_reg_behavior pcie_cap_regs_behavior[PCI_CAP_PCIE_SIZEOF / 4] =
*/
.rw = (PCI_EXP_RTCTL_SECEE | PCI_EXP_RTCTL_SENFEE |
PCI_EXP_RTCTL_SEFEE | PCI_EXP_RTCTL_PMEIE |
- PCI_EXP_RTCTL_CRSSVE),
- .ro = PCI_EXP_RTCAP_CRSVIS << 16,
+ PCI_EXP_RTCTL_RRS_SVE),
+ .ro = PCI_EXP_RTCAP_RRS_SV << 16,
},
[PCI_EXP_RTSTA / 4] = {