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| author | Ben Dooks <ben.dooks@codethink.co.uk> | 2023-09-07 17:12:38 +0100 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2023-10-13 10:07:17 +0200 |
| commit | 81432e2e5132e681874f500220c21dc3fdfda42b (patch) | |
| tree | cda8203aa60b55d28326756faadc0488dc73d12d /drivers/pwm/pwm-dwc.h | |
| parent | 721ee188488381f0c2d4e04fbc2200963fda23b7 (diff) | |
| download | linux-81432e2e5132e681874f500220c21dc3fdfda42b.tar.gz linux-81432e2e5132e681874f500220c21dc3fdfda42b.tar.bz2 linux-81432e2e5132e681874f500220c21dc3fdfda42b.zip | |
pwm: dwc: make timer clock configurable
Add a configurable clock base rate for the pwm as when being built
for non-PCI the block may be sourced from an internal clock.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20230907161242.67190-3-ben.dooks@codethink.co.uk
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-dwc.h')
| -rw-r--r-- | drivers/pwm/pwm-dwc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pwm/pwm-dwc.h b/drivers/pwm/pwm-dwc.h index 56deab4e28ec..64795247c54c 100644 --- a/drivers/pwm/pwm-dwc.h +++ b/drivers/pwm/pwm-dwc.h @@ -24,7 +24,6 @@ MODULE_IMPORT_NS(dwc_pwm); #define DWC_TIMERS_COMP_VERSION 0xac #define DWC_TIMERS_TOTAL 8 -#define DWC_CLK_PERIOD_NS 10 /* Timer Control Register */ #define DWC_TIM_CTRL_EN BIT(0) @@ -43,6 +42,7 @@ struct dwc_pwm_ctx { struct dwc_pwm { struct pwm_chip chip; void __iomem *base; + unsigned int clk_ns; struct dwc_pwm_ctx ctx[DWC_TIMERS_TOTAL]; }; #define to_dwc_pwm(p) (container_of((p), struct dwc_pwm, chip)) |