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| author | Olof Johansson <olof@lixom.net> | 2019-01-12 22:06:54 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2019-01-12 22:06:54 -0800 |
| commit | 465612178b44840b2066e62c3bcfae80862011d4 (patch) | |
| tree | 044e2ee3f0ea3a6fbe8d349c31eac6bc4ee4d054 /drivers/reset/reset-simple.c | |
| parent | 56acb3ef76177a5aabe6613bf27348d34f1e65c0 (diff) | |
| parent | d0c2d2101b4c1a41e6ebeca6a28c70df43d2a6a3 (diff) | |
| download | linux-465612178b44840b2066e62c3bcfae80862011d4.tar.gz linux-465612178b44840b2066e62c3bcfae80862011d4.tar.bz2 linux-465612178b44840b2066e62c3bcfae80862011d4.zip | |
Merge tag 'reset-for-5.0-rc2' of git://git.pengutronix.de/git/pza/linux into fixes
Late reset controller changes for v5.0
This adds missing deassert functionality to the ARC HSDK reset driver,
fixes some indentation and grammar issues in the kernel docs, adds a
helper to count the number of resets on a device for the non-DT case
as well, adds an early reset driver for SoCFPGA and simple reset driver
support for Stratix10, and generalizes the uniphier USB3 glue layer
reset to also cover AHCI.
* tag 'reset-for-5.0-rc2' of git://git.pengutronix.de/git/pza/linux:
reset: uniphier-glue: Add AHCI reset control support in glue layer
dt-bindings: reset: uniphier: Add AHCI core reset description
reset: uniphier-usb3: Rename to reset-uniphier-glue
dt-bindings: reset: uniphier: Replace the expression of USB3 with generic peripherals
ARM: socfpga: dts: document "altr,stratix10-rst-mgr" binding
reset: socfpga: add an early reset driver for SoCFPGA
reset: fix null pointer dereference on dev by dev_name
reset: Add reset_control_get_count()
reset: Improve reset controller kernel docs
ARC: HSDK: improve reset driver
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/reset/reset-simple.c')
| -rw-r--r-- | drivers/reset/reset-simple.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c index a91107fc9e27..77fbba3100c8 100644 --- a/drivers/reset/reset-simple.c +++ b/drivers/reset/reset-simple.c @@ -109,7 +109,7 @@ struct reset_simple_devdata { #define SOCFPGA_NR_BANKS 8 static const struct reset_simple_devdata reset_simple_socfpga = { - .reg_offset = 0x10, + .reg_offset = 0x20, .nr_resets = SOCFPGA_NR_BANKS * 32, .status_active_low = true, }; @@ -120,7 +120,8 @@ static const struct reset_simple_devdata reset_simple_active_low = { }; static const struct of_device_id reset_simple_dt_ids[] = { - { .compatible = "altr,rst-mgr", .data = &reset_simple_socfpga }, + { .compatible = "altr,stratix10-rst-mgr", + .data = &reset_simple_socfpga }, { .compatible = "st,stm32-rcc", }, { .compatible = "allwinner,sun6i-a31-clock-reset", .data = &reset_simple_active_low }, @@ -166,14 +167,6 @@ static int reset_simple_probe(struct platform_device *pdev) data->status_active_low = devdata->status_active_low; } - if (of_device_is_compatible(dev->of_node, "altr,rst-mgr") && - of_property_read_u32(dev->of_node, "altr,modrst-offset", - ®_offset)) { - dev_warn(dev, - "missing altr,modrst-offset property, assuming 0x%x!\n", - reg_offset); - } - data->membase += reg_offset; return devm_reset_controller_register(dev, &data->rcdev); |