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| author | Charlene Liu <Charlene.Liu@amd.com> | 2024-09-25 20:57:00 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-10-07 14:12:14 -0400 |
| commit | de08e41930e5a521d19924aaa2859361eb209df0 (patch) | |
| tree | 9bb6141521ca379d96d25c0905d959f22358b338 /drivers | |
| parent | 10ce17b7fb7079e164afe8d208fcbfac6ebd0e28 (diff) | |
| download | linux-de08e41930e5a521d19924aaa2859361eb209df0.tar.gz linux-de08e41930e5a521d19924aaa2859361eb209df0.tar.bz2 linux-de08e41930e5a521d19924aaa2859361eb209df0.zip | |
drm/amd/display: update sr_exit latency for z8
This is based on real asic performance result.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c index a201dbb743d7..d9e63c4fdd95 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c @@ -204,8 +204,8 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_51_soc = { .num_states = 8, .sr_exit_time_us = 28.0, .sr_enter_plus_exit_time_us = 30.0, - .sr_exit_z8_time_us = 250.0, - .sr_enter_plus_exit_z8_time_us = 350.0, + .sr_exit_z8_time_us = 263.0, + .sr_enter_plus_exit_z8_time_us = 363.0, .fclk_change_latency_us = 24.0, .usr_retraining_latency_us = 2, .writeback_latency_us = 12.0, |