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| author | Thomas Zimmermann <tzimmermann@suse.de> | 2022-07-14 09:57:37 +0200 |
|---|---|---|
| committer | Thomas Zimmermann <tzimmermann@suse.de> | 2022-07-14 09:57:37 +0200 |
| commit | f83d9396d1f63048c423efa00e4e244da10a35fd (patch) | |
| tree | 48da2cf9b20cc7049c92dd4a7dd74be11add86e5 /include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h | |
| parent | 5ee8c8f930ba7d20717c4fc2d9f1ce0e757d1155 (diff) | |
| parent | 0180290abb5ce5c870f84a00ffeda5802f641dce (diff) | |
| download | linux-f83d9396d1f63048c423efa00e4e244da10a35fd.tar.gz linux-f83d9396d1f63048c423efa00e4e244da10a35fd.tar.bz2 linux-f83d9396d1f63048c423efa00e4e244da10a35fd.zip | |
Merge drm/drm-next into drm-misc-next-fixes
Backmerging from drm/drm-next for the final fixes that will go
into v5.20.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Diffstat (limited to 'include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h')
| -rw-r--r-- | include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h new file mode 100644 index 000000000000..20ef2ea673f3 --- /dev/null +++ b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_AUDIO_CC_SC7280_H +#define _DT_BINDINGS_CLK_QCOM_LPASS_AUDIO_CC_SC7280_H + +/* LPASS_AUDIO_CC clocks */ +#define LPASS_AUDIO_CC_PLL 0 +#define LPASS_AUDIO_CC_PLL_OUT_AUX2 1 +#define LPASS_AUDIO_CC_PLL_OUT_AUX2_DIV_CLK_SRC 2 +#define LPASS_AUDIO_CC_PLL_OUT_MAIN_DIV_CLK_SRC 3 +#define LPASS_AUDIO_CC_CDIV_RX_MCLK_DIV_CLK_SRC 4 +#define LPASS_AUDIO_CC_CODEC_MEM0_CLK 5 +#define LPASS_AUDIO_CC_CODEC_MEM1_CLK 6 +#define LPASS_AUDIO_CC_CODEC_MEM2_CLK 7 +#define LPASS_AUDIO_CC_CODEC_MEM_CLK 8 +#define LPASS_AUDIO_CC_EXT_MCLK0_CLK 9 +#define LPASS_AUDIO_CC_EXT_MCLK0_CLK_SRC 10 +#define LPASS_AUDIO_CC_EXT_MCLK1_CLK 11 +#define LPASS_AUDIO_CC_EXT_MCLK1_CLK_SRC 12 +#define LPASS_AUDIO_CC_RX_MCLK_2X_CLK 13 +#define LPASS_AUDIO_CC_RX_MCLK_CLK 14 +#define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC 15 + +/* LPASS_AON_CC clocks */ +#define LPASS_AON_CC_PLL 0 +#define LPASS_AON_CC_PLL_OUT_EVEN 1 +#define LPASS_AON_CC_PLL_OUT_MAIN_CDIV_DIV_CLK_SRC 2 +#define LPASS_AON_CC_PLL_OUT_ODD 3 +#define LPASS_AON_CC_AUDIO_HM_H_CLK 4 +#define LPASS_AON_CC_CDIV_TX_MCLK_DIV_CLK_SRC 5 +#define LPASS_AON_CC_MAIN_RCG_CLK_SRC 6 +#define LPASS_AON_CC_TX_MCLK_2X_CLK 7 +#define LPASS_AON_CC_TX_MCLK_CLK 8 +#define LPASS_AON_CC_TX_MCLK_RCG_CLK_SRC 9 +#define LPASS_AON_CC_VA_MEM0_CLK 10 + +/* LPASS_AON_CC power domains */ +#define LPASS_AON_CC_LPASS_AUDIO_HM_GDSC 0 + +#endif |