Merge tag 'qcom-arm64-for-6.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

A few more Arm64 DeviceTree updates for v6.11

This introduces support for Lenovo Thinkpad Yoga slim 7x, LG Leon LTE,
and LG K10 (K420n).

In addition to this, all Gen-1 platforms gets the DWC3 quirk to disable
"SuperSpeed in park mode", which resolves an instabliity issue seen in
host mode.

For Fairphone 4, PM6150L and PMK8003 thermal sensors are added and
thermal zones defined.

Two fastrpc contexts on SM6350 are marked as non-secure, to allow
non-secure usage.

The video clock controller on SM8150 is introduced. IPQ9574 GCC is
marked as a interconnect provider. The vibrator block in the PM6150 is
described.

On SC7280 the download mode register is defined for SCM, allowing it to
enable/disable the ramdump support during a system crash.

Lastly, add a mailmap entry for Luca Weiss.

* tag 'qcom-arm64-for-6.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (22 commits)
  mailmap: Update Luca Weiss's email address
  arm64: dts: qcom: msm8916-lg-c50: add initial dts for LG Leon LTE
  arm64: dts: qcom: msm8916-lg-m216: Add initial device tree
  dt-bindings: arm: qcom: Add msm8916 based LG devices
  arm64: dts: qcom: ipq9574: Add icc provider ability to gcc
  dt-bindings: interconnect: Add Qualcomm IPQ9574 support
  arm64: dts: qcom: sm8150: Add video clock controller node
  arm64: dts: qcom: pm6150: Add vibrator
  arm64: dts: qcom: sc7280: Enable download mode register write
  arm64: dts: qcom: sm7225-fairphone-fp4: Add PM6150L thermals
  arm64: dts: qcom: sm7225-fairphone-fp4: Add PMK8003 thermals
  arm64: dts: qcom: sm6350: Add missing qcom,non-secure-domain property
  arm64: dts: qcom: sdm845: Disable SS instance in Parkmode for USB
  arm64: dts: qcom: msm8996: Disable SS instance in Parkmode for USB
  arm64: dts: qcom: sm6350: Disable SS instance in Parkmode for USB
  arm64: dts: qcom: sm6115: Disable SS instance in Parkmode for USB
  arm64: dts: qcom: sdm630: Disable SS instance in Parkmode for USB
  arm64: dts: qcom: msm8998: Disable SS instance in Parkmode for USB
  arm64: dts: qcom: ipq8074: Disable SS instance in Parkmode for USB
  arm64: dts: qcom: ipq6018: Disable SS instance in Parkmode for USB
  ...

Link: https://lore.kernel.org/r/20240709193406.3966-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 59 insertions, 0 deletions

diff --git a/include/dt-bindings/interconnect/qcom,ipq9574.h b/include/dt-bindings/interconnect/qcom,ipq9574.h
new file mode 100644
index 000000000000..42019335c7dd
--- /dev/null
+++ b/include/dt-bindings/interconnect/qcom,ipq9574.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+#ifndef INTERCONNECT_QCOM_IPQ9574_H
+#define INTERCONNECT_QCOM_IPQ9574_H
+
+#define MASTER_ANOC_PCIE0		0
+#define SLAVE_ANOC_PCIE0		1
+#define MASTER_SNOC_PCIE0		2
+#define SLAVE_SNOC_PCIE0		3
+#define MASTER_ANOC_PCIE1		4
+#define SLAVE_ANOC_PCIE1		5
+#define MASTER_SNOC_PCIE1		6
+#define SLAVE_SNOC_PCIE1		7
+#define MASTER_ANOC_PCIE2		8
+#define SLAVE_ANOC_PCIE2		9
+#define MASTER_SNOC_PCIE2		10
+#define SLAVE_SNOC_PCIE2		11
+#define MASTER_ANOC_PCIE3		12
+#define SLAVE_ANOC_PCIE3		13
+#define MASTER_SNOC_PCIE3		14
+#define SLAVE_SNOC_PCIE3		15
+#define MASTER_USB			16
+#define SLAVE_USB			17
+#define MASTER_USB_AXI			18
+#define SLAVE_USB_AXI			19
+#define MASTER_NSSNOC_NSSCC		20
+#define SLAVE_NSSNOC_NSSCC		21
+#define MASTER_NSSNOC_SNOC_0		22
+#define SLAVE_NSSNOC_SNOC_0		23
+#define MASTER_NSSNOC_SNOC_1		24
+#define SLAVE_NSSNOC_SNOC_1		25
+#define MASTER_NSSNOC_PCNOC_1		26
+#define SLAVE_NSSNOC_PCNOC_1		27
+#define MASTER_NSSNOC_QOSGEN_REF	28
+#define SLAVE_NSSNOC_QOSGEN_REF		29
+#define MASTER_NSSNOC_TIMEOUT_REF	30
+#define SLAVE_NSSNOC_TIMEOUT_REF	31
+#define MASTER_NSSNOC_XO_DCD		32
+#define SLAVE_NSSNOC_XO_DCD		33
+#define MASTER_NSSNOC_ATB		34
+#define SLAVE_NSSNOC_ATB		35
+#define MASTER_MEM_NOC_NSSNOC		36
+#define SLAVE_MEM_NOC_NSSNOC		37
+#define MASTER_NSSNOC_MEMNOC		38
+#define SLAVE_NSSNOC_MEMNOC		39
+#define MASTER_NSSNOC_MEM_NOC_1		40
+#define SLAVE_NSSNOC_MEM_NOC_1		41
+
+#define MASTER_NSSNOC_PPE		0
+#define SLAVE_NSSNOC_PPE		1
+#define MASTER_NSSNOC_PPE_CFG		2
+#define SLAVE_NSSNOC_PPE_CFG		3
+#define MASTER_NSSNOC_NSS_CSR		4
+#define SLAVE_NSSNOC_NSS_CSR		5
+#define MASTER_NSSNOC_IMEM_QSB		6
+#define SLAVE_NSSNOC_IMEM_QSB		7
+#define MASTER_NSSNOC_IMEM_AHB		8
+#define SLAVE_NSSNOC_IMEM_AHB		9
+
+#endif /* INTERCONNECT_QCOM_IPQ9574_H */