diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-09-01 09:53:54 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-09-01 09:53:54 -0700 |
| commit | 1c9f8dff62d85ce00b0e99f774a84bd783af7cac (patch) | |
| tree | cd1fcbc26856dfd1981ef1f81396eb67dde993bd /include | |
| parent | 28a4f91f5f251689c69155bc6a0b1afc9916c874 (diff) | |
| parent | 704e2c6107f1a5353a1038bac137dda0df2a6dd0 (diff) | |
| download | linux-1c9f8dff62d85ce00b0e99f774a84bd783af7cac.tar.gz linux-1c9f8dff62d85ce00b0e99f774a84bd783af7cac.tar.bz2 linux-1c9f8dff62d85ce00b0e99f774a84bd783af7cac.zip | |
Merge tag 'char-misc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH:
"Here is the big set of char/misc and other small driver subsystem
changes for 6.6-rc1.
Stuff all over the place here, lots of driver updates and changes and
new additions. Short summary is:
- new IIO drivers and updates
- Interconnect driver updates
- fpga driver updates and additions
- fsi driver updates
- mei driver updates
- coresight driver updates
- nvmem driver updates
- counter driver updates
- lots of smaller misc and char driver updates and additions
All of these have been in linux-next for a long time with no reported
problems"
* tag 'char-misc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (267 commits)
nvmem: core: Notify when a new layout is registered
nvmem: core: Do not open-code existing functions
nvmem: core: Return NULL when no nvmem layout is found
nvmem: core: Create all cells before adding the nvmem device
nvmem: u-boot-env:: Replace zero-length array with DECLARE_FLEX_ARRAY() helper
nvmem: sec-qfprom: Add Qualcomm secure QFPROM support
dt-bindings: nvmem: sec-qfprom: Add bindings for secure qfprom
dt-bindings: nvmem: Add compatible for QCM2290
nvmem: Kconfig: Fix typo "drive" -> "driver"
nvmem: Explicitly include correct DT includes
nvmem: add new NXP QorIQ eFuse driver
dt-bindings: nvmem: Add t1023-sfp efuse support
dt-bindings: nvmem: qfprom: Add compatible for MSM8226
nvmem: uniphier: Use devm_platform_get_and_ioremap_resource()
nvmem: qfprom: do some cleanup
nvmem: stm32-romem: Use devm_platform_get_and_ioremap_resource()
nvmem: rockchip-efuse: Use devm_platform_get_and_ioremap_resource()
nvmem: meson-mx-efuse: Convert to devm_platform_ioremap_resource()
nvmem: lpc18xx_otp: Convert to devm_platform_ioremap_resource()
nvmem: brcm_nvram: Use devm_platform_get_and_ioremap_resource()
...
Diffstat (limited to 'include')
23 files changed, 516 insertions, 170 deletions
diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h index 09fd169ad18e..5d98f7d48a1e 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h @@ -6,58 +6,60 @@ #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H #define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H +#include <dt-bindings/iio/qcom,spmi-vadc.h> + /* ADC channels for PM8350_ADC for PMIC7 */ -#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | 0x0) -#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | 0x01) -#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | 0x02) -#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | 0x03) - -#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | 0x04) -#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | 0x05) -#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | 0x06) -#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | 0x07) -#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | 0x08) -#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | 0x0a) -#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | 0x0b) -#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | 0x0c) -#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | 0x0d) +#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | ADC7_REF_GND) +#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | ADC7_1P25VREF) +#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | ADC7_VREF_VADC) +#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | ADC7_DIE_TEMP) + +#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | ADC7_AMUX_THM1) +#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | ADC7_AMUX_THM2) +#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | ADC7_AMUX_THM3) +#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | ADC7_AMUX_THM4) +#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | ADC7_AMUX_THM5) +#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | ADC7_GPIO1) +#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | ADC7_GPIO2) +#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | ADC7_GPIO3) +#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | ADC7_GPIO4) /* 30k pull-up1 */ -#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | 0x24) -#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | 0x25) -#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | 0x26) -#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | 0x27) -#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | 0x28) -#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | 0x2a) -#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | 0x2b) -#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | 0x2c) -#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | 0x2d) +#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_30K_PU) +#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_30K_PU) +#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_30K_PU) +#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_30K_PU) +#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_30K_PU) +#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | ADC7_GPIO1_30K_PU) +#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | ADC7_GPIO2_30K_PU) +#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | ADC7_GPIO3_30K_PU) +#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | ADC7_GPIO4_30K_PU) /* 100k pull-up2 */ -#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | 0x44) -#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | 0x45) -#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | 0x46) -#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | 0x47) -#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | 0x48) -#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | 0x4a) -#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | 0x4b) -#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | 0x4c) -#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | 0x4d) +#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_100K_PU) +#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_100K_PU) +#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_100K_PU) +#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_100K_PU) +#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_100K_PU) +#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | ADC7_GPIO1_100K_PU) +#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | ADC7_GPIO2_100K_PU) +#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | ADC7_GPIO3_100K_PU) +#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | ADC7_GPIO4_100K_PU) /* 400k pull-up3 */ -#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | 0x64) -#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | 0x65) -#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | 0x66) -#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | 0x67) -#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | 0x68) -#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | 0x6a) -#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | 0x6b) -#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | 0x6c) -#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | 0x6d) +#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_400K_PU) +#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_400K_PU) +#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_400K_PU) +#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_400K_PU) +#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_400K_PU) +#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | ADC7_GPIO1_400K_PU) +#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | ADC7_GPIO2_400K_PU) +#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | ADC7_GPIO3_400K_PU) +#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | ADC7_GPIO4_400K_PU) /* 1/3 Divider */ -#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | 0x8d) +#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | ADC7_GPIO4_DIV3) -#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | 0x8e) +#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | ADC7_VPH_PWR) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */ diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h index dc2497c27e16..57c7977666d3 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h @@ -10,79 +10,81 @@ #define PM8350B_SID 3 #endif +#include <dt-bindings/iio/qcom,spmi-vadc.h> + /* ADC channels for PM8350B_ADC for PMIC7 */ -#define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | 0x0) -#define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | 0x01) -#define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | 0x02) -#define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | 0x03) +#define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | ADC7_REF_GND) +#define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | ADC7_1P25VREF) +#define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | ADC7_VREF_VADC) +#define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | ADC7_DIE_TEMP) -#define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | 0x04) -#define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | 0x05) -#define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | 0x06) -#define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | 0x07) -#define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | 0x08) -#define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | 0x09) -#define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | 0x0a) -#define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | 0x0b) -#define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | 0x0c) -#define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | 0x0d) +#define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | ADC7_AMUX_THM1) +#define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | ADC7_AMUX_THM2) +#define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | ADC7_AMUX_THM3) +#define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | ADC7_AMUX_THM4) +#define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | ADC7_AMUX_THM5) +#define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | ADC7_AMUX_THM6) +#define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | ADC7_GPIO1) +#define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | ADC7_GPIO2) +#define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | ADC7_GPIO3) +#define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | ADC7_GPIO4) -#define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | 0x10) -#define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | 0x11) -#define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | 0x12) -#define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | 0x13) -#define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | 0x15) -#define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | 0x17) +#define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | ADC7_CHG_TEMP) +#define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | ADC7_USB_IN_V_16) +#define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | ADC7_VDC_16) +#define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | ADC7_CC1_ID) +#define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | ADC7_VREF_BAT_THERM) +#define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | ADC7_IIN_FB) /* 30k pull-up1 */ -#define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | 0x24) -#define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | 0x25) -#define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | 0x26) -#define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | 0x27) -#define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | 0x28) -#define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | 0x29) -#define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | 0x2a) -#define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | 0x2b) -#define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | 0x2c) -#define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | 0x2d) -#define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | 0x33) +#define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_30K_PU) +#define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_30K_PU) +#define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_30K_PU) +#define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_30K_PU) +#define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_30K_PU) +#define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_30K_PU) +#define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | ADC7_GPIO1_30K_PU) +#define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | ADC7_GPIO2_30K_PU) +#define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | ADC7_GPIO3_30K_PU) +#define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | ADC7_GPIO4_30K_PU) +#define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_30K_PU) /* 100k pull-up2 */ -#define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | 0x44) -#define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | 0x45) -#define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | 0x46) -#define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | 0x47) -#define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | 0x48) -#define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | 0x49) -#define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | 0x4a) -#define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | 0x4b) -#define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | 0x4c) -#define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | 0x4d) -#define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | 0x53) +#define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_100K_PU) +#define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_100K_PU) +#define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_100K_PU) +#define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_100K_PU) +#define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_100K_PU) +#define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_100K_PU) +#define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | ADC7_GPIO1_100K_PU) +#define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | ADC7_GPIO2_100K_PU) +#define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | ADC7_GPIO3_100K_PU) +#define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | ADC7_GPIO4_100K_PU) +#define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_100K_PU) /* 400k pull-up3 */ -#define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | 0x64) -#define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | 0x65) -#define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | 0x66) -#define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | 0x67) -#define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | 0x68) -#define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | 0x69) -#define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | 0x6a) -#define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | 0x6b) -#define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | 0x6c) -#define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | 0x6d) -#define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | 0x73) +#define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_400K_PU) +#define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_400K_PU) +#define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_400K_PU) +#define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_400K_PU) +#define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_400K_PU) +#define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_400K_PU) +#define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | ADC7_GPIO1_400K_PU) +#define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | ADC7_GPIO2_400K_PU) +#define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | ADC7_GPIO3_400K_PU) +#define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | ADC7_GPIO4_400K_PU) +#define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_400K_PU) /* 1/3 Divider */ -#define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | 0x8a) -#define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | 0x8b) -#define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | 0x8c) -#define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | 0x8d) +#define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | ADC7_GPIO1_DIV3) +#define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | ADC7_GPIO2_DIV3) +#define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | ADC7_GPIO3_DIV3) +#define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | ADC7_GPIO4_DIV3) -#define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | 0x8e) -#define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | 0x8f) +#define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | ADC7_VPH_PWR) +#define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | ADC7_VBAT_SNS) -#define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | 0x94) -#define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | 0x96) +#define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | ADC7_SBU) +#define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | ADC7_VBAT_2S_MID) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H */ diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h b/include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h index 6c296870e95b..3d1a41a22cef 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h @@ -10,37 +10,39 @@ #define PMK8350_SID 0 #endif +#include <dt-bindings/iio/qcom,spmi-vadc.h> + /* ADC channels for PMK8350_ADC for PMIC7 */ -#define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | 0x0) -#define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | 0x01) -#define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | 0x02) -#define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | 0x03) +#define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | ADC7_REF_GND) +#define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | ADC7_1P25VREF) +#define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | ADC7_VREF_VADC) +#define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | ADC7_DIE_TEMP) -#define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | 0x04) -#define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | 0x05) -#define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | 0x06) -#define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | 0x07) -#define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | 0x08) +#define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | ADC7_AMUX_THM1) +#define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | ADC7_AMUX_THM2) +#define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | ADC7_AMUX_THM3) +#define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | ADC7_AMUX_THM4) +#define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | ADC7_AMUX_THM5) /* 30k pull-up1 */ -#define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | 0x24) -#define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | 0x25) -#define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | 0x26) -#define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | 0x27) -#define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | 0x28) +#define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_30K_PU) +#define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_30K_PU) +#define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_30K_PU) +#define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_30K_PU) +#define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_30K_PU) /* 100k pull-up2 */ -#define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | 0x44) -#define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | 0x45) -#define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | 0x46) -#define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | 0x47) -#define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | 0x48) +#define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_100K_PU) +#define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_100K_PU) +#define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_100K_PU) +#define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_100K_PU) +#define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_100K_PU) /* 400k pull-up3 */ -#define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | 0x64) -#define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | 0x65) -#define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | 0x66) -#define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | 0x67) -#define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | 0x68) +#define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_400K_PU) +#define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_400K_PU) +#define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_400K_PU) +#define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_400K_PU) +#define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_400K_PU) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */ diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h b/include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h index d6df1b19e5ff..c5adfa82b20d 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h @@ -10,19 +10,21 @@ #define PMR735A_SID 4 #endif +#include <dt-bindings/iio/qcom,spmi-vadc.h> + /* ADC channels for PMR735A_ADC for PMIC7 */ -#define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | 0x0) -#define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | 0x01) -#define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | 0x02) -#define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | 0x03) +#define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | ADC7_REF_GND) +#define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | ADC7_1P25VREF) +#define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | ADC7_VREF_VADC) +#define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | ADC7_DIE_TEMP) -#define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | 0x0a) -#define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | 0x0b) -#define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | 0x0c) +#define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | ADC7_GPIO1) +#define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | ADC7_GPIO2) +#define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | ADC7_GPIO3) /* 100k pull-up2 */ -#define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | 0x4a) -#define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | 0x4b) -#define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | 0x4c) +#define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | ADC7_GPIO1_100K_PU) +#define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | ADC7_GPIO2_100K_PU) +#define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | ADC7_GPIO3_100K_PU) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H */ diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h b/include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h index 8da0e7dab315..fdb8dd9ae541 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h @@ -10,19 +10,21 @@ #define PMR735B_SID 5 #endif +#include <dt-bindings/iio/qcom,spmi-vadc.h> + /* ADC channels for PMR735B_ADC for PMIC7 */ -#define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | 0x0) -#define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | 0x01) -#define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | 0x02) -#define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | 0x03) +#define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | ADC7_REF_GND) +#define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | ADC7_1P25VREF) +#define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | ADC7_VREF_VADC) +#define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | ADC7_DIE_TEMP) -#define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | 0x0a) -#define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | 0x0b) -#define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | 0x0c) +#define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | ADC7_GPIO1) +#define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | ADC7_GPIO2) +#define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | ADC7_GPIO3) /* 100k pull-up2 */ -#define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | 0x4a) -#define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | 0x4b) -#define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | 0x4c) +#define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | ADC7_GPIO1_100K_PU) +#define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | ADC7_GPIO2_100K_PU) +#define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | ADC7_GPIO3_100K_PU) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H */ diff --git a/include/dt-bindings/interconnect/qcom,sm8250.h b/include/dt-bindings/interconnect/qcom,sm8250.h index a4af5cc19271..2a656c02df4b 100644 --- a/include/dt-bindings/interconnect/qcom,sm8250.h +++ b/include/dt-bindings/interconnect/qcom,sm8250.h @@ -166,4 +166,11 @@ #define SLAVE_QDSS_STM 17 #define SLAVE_TCU 18 +#define MASTER_QUP_CORE_0 0 +#define MASTER_QUP_CORE_1 1 +#define MASTER_QUP_CORE_2 2 +#define SLAVE_QUP_CORE_0 3 +#define SLAVE_QUP_CORE_1 4 +#define SLAVE_QUP_CORE_2 5 + #endif diff --git a/include/linux/coresight.h b/include/linux/coresight.h index bf70987240e4..a269fffaf991 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -6,6 +6,8 @@ #ifndef _LINUX_CORESIGHT_H #define _LINUX_CORESIGHT_H +#include <linux/amba/bus.h> +#include <linux/clk.h> #include <linux/device.h> #include <linux/io.h> #include <linux/perf_event.h> @@ -386,6 +388,63 @@ static inline u32 csdev_access_relaxed_read32(struct csdev_access *csa, return csa->read(offset, true, false); } +#define CORESIGHT_CIDRn(i) (0xFF0 + ((i) * 4)) + +static inline u32 coresight_get_cid(void __iomem *base) +{ + u32 i, cid = 0; + + for (i = 0; i < 4; i++) + cid |= readl(base + CORESIGHT_CIDRn(i)) << (i * 8); + + return cid; +} + +static inline bool is_coresight_device(void __iomem *base) +{ + u32 cid = coresight_get_cid(base); + + return cid == CORESIGHT_CID; +} + +/* + * Attempt to find and enable "APB clock" for the given device + * + * Returns: + * + * clk - Clock is found and enabled + * NULL - clock is not found + * ERROR - Clock is found but failed to enable + */ +static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev) +{ + struct clk *pclk; + int ret; + + pclk = clk_get(dev, "apb_pclk"); + if (IS_ERR(pclk)) + return NULL; + + ret = clk_prepare_enable(pclk); + if (ret) { + clk_put(pclk); + return ERR_PTR(ret); + } + return pclk; +} + +#define CORESIGHT_PIDRn(i) (0xFE0 + ((i) * 4)) + +static inline u32 coresight_get_pid(struct csdev_access *csa) +{ + u32 i, pid = 0; + + for (i = 0; i < 4; i++) + pid |= csdev_access_relaxed_read32(csa, CORESIGHT_PIDRn(i)) << (i * 8); + + return pid; +} + static inline u64 csdev_access_relaxed_read_pair(struct csdev_access *csa, u32 lo_offset, u32 hi_offset) { diff --git a/include/linux/counter.h b/include/linux/counter.h index b63746637de2..702e9108bbb4 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -399,7 +399,7 @@ struct counter_device { struct mutex ops_exist_lock; }; -void *counter_priv(const struct counter_device *const counter); +void *counter_priv(const struct counter_device *const counter) __attribute_const__; struct counter_device *counter_alloc(size_t sizeof_priv); void counter_put(struct counter_device *const counter); diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h index 061dd84d09f3..4fcbf4d4fd0a 100644 --- a/include/linux/dynamic_debug.h +++ b/include/linux/dynamic_debug.h @@ -37,10 +37,12 @@ struct _ddebug { #define _DPRINTK_FLAGS_INCL_FUNCNAME (1<<2) #define _DPRINTK_FLAGS_INCL_LINENO (1<<3) #define _DPRINTK_FLAGS_INCL_TID (1<<4) +#define _DPRINTK_FLAGS_INCL_SOURCENAME (1<<5) #define _DPRINTK_FLAGS_INCL_ANY \ (_DPRINTK_FLAGS_INCL_MODNAME | _DPRINTK_FLAGS_INCL_FUNCNAME |\ - _DPRINTK_FLAGS_INCL_LINENO | _DPRINTK_FLAGS_INCL_TID) + _DPRINTK_FLAGS_INCL_LINENO | _DPRINTK_FLAGS_INCL_TID |\ + _DPRINTK_FLAGS_INCL_SOURCENAME) #if defined DEBUG #define _DPRINTK_FLAGS_DEFAULT _DPRINTK_FLAGS_PRINT diff --git a/include/linux/extcon.h b/include/linux/extcon.h index 3c45c3846fe9..e596a0abcb27 100644 --- a/include/linux/extcon.h +++ b/include/linux/extcon.h @@ -328,16 +328,4 @@ struct extcon_specific_cable_nb { struct extcon_dev *edev; unsigned long previous_value; }; - -static inline int extcon_register_interest(struct extcon_specific_cable_nb *obj, - const char *extcon_name, const char *cable_name, - struct notifier_block *nb) -{ - return -EINVAL; -} - -static inline int extcon_unregister_interest(struct extcon_specific_cable_nb *obj) -{ - return -EINVAL; -} #endif /* __LINUX_EXTCON_H__ */ diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h index a718f853d457..ee80ca4bb0d0 100644 --- a/include/linux/firmware/intel/stratix10-smc.h +++ b/include/linux/firmware/intel/stratix10-smc.h @@ -467,6 +467,31 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE) INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FIRMWARE_VERSION) /** + * SMC call protocol for Mailbox, starting FUNCID from 60 + * + * Call register usage: + * a0 INTEL_SIP_SMC_MBOX_SEND_CMD + * a1 mailbox command code + * a2 physical address that contain mailbox command data (not include header) + * a3 mailbox command data size in word + * a4 set to 0 for CASUAL, set to 1 for URGENT + * a5 physical address for secure firmware to put response data + * (not include header) + * a6 maximum size in word of physical address to store response data + * a7 not used + * + * Return status + * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_REJECTED or + * INTEL_SIP_SMC_STATUS_ERROR + * a1 mailbox error code + * a2 response data length in word + * a3 not used + */ +#define INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD 60 + #define INTEL_SIP_SMC_MBOX_SEND_CMD \ + INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD) + +/** * Request INTEL_SIP_SMC_SVC_VERSION * * Sync call used to query the SIP SMC API Version diff --git a/include/linux/firmware/intel/stratix10-svc-client.h b/include/linux/firmware/intel/stratix10-svc-client.h index 0c16037fd08d..60ed82112680 100644 --- a/include/linux/firmware/intel/stratix10-svc-client.h +++ b/include/linux/firmware/intel/stratix10-svc-client.h @@ -118,6 +118,9 @@ struct stratix10_svc_chan; * @COMMAND_SMC_SVC_VERSION: Non-mailbox SMC SVC API Version, * return status is SVC_STATUS_OK * + * @COMMAND_MBOX_SEND_CMD: send generic mailbox command, return status is + * SVC_STATUS_OK or SVC_STATUS_ERROR + * * @COMMAND_RSU_DCMF_STATUS: query firmware for the DCMF status |
