diff options
| author | Mark Zhang <markzhang@nvidia.com> | 2025-01-19 14:39:46 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-03-07 18:25:24 +0100 |
| commit | ed3a682157ae7a3fdc8c1475ac6732f8bad6c282 (patch) | |
| tree | 21ff05718e6149a753355e006acd68912f94b664 /scripts/objdiff | |
| parent | 3e3bf255992cc02404e9d209b127c1c9944239cf (diff) | |
| download | linux-ed3a682157ae7a3fdc8c1475ac6732f8bad6c282.tar.gz linux-ed3a682157ae7a3fdc8c1475ac6732f8bad6c282.tar.bz2 linux-ed3a682157ae7a3fdc8c1475ac6732f8bad6c282.zip | |
IB/mlx5: Set and get correct qp_num for a DCT QP
[ Upstream commit 12d044770e12c4205fa69535b4fa8a9981fea98f ]
When a DCT QP is created on an active lag, it's dctc.port is assigned
in a round-robin way, which is from 1 to dev->lag_port. In this case
when querying this QP, we may get qp_attr.port_num > 2.
Fix this by setting qp->port when modifying a DCT QP, and read port_num
from qp->port instead of dctc.port when querying it.
Fixes: 7c4b1ab9f167 ("IB/mlx5: Add DCT RoCE LAG support")
Signed-off-by: Mark Zhang <markzhang@nvidia.com>
Reviewed-by: Maher Sanalla <msanalla@nvidia.com>
Link: https://patch.msgid.link/94c76bf0adbea997f87ffa27674e0a7118ad92a9.1737290358.git.leon@kernel.org
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'scripts/objdiff')
0 files changed, 0 insertions, 0 deletions