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| author | Vlad.Karpovich <vkarpovi@opensource.cirrus.com> | 2023-03-15 10:47:22 -0500 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2023-03-21 12:46:42 +0000 |
| commit | 6c07be8fe92c6b0c24ee1c599601dce3506b83c7 (patch) | |
| tree | fcf50455ab68733a03d3c49201826bf7c1b8337b /sound/soc/codecs/cs35l45-tables.c | |
| parent | 74b14e2850a34740c121cf2758d4181063d4c77c (diff) | |
| download | linux-6c07be8fe92c6b0c24ee1c599601dce3506b83c7.tar.gz linux-6c07be8fe92c6b0c24ee1c599601dce3506b83c7.tar.bz2 linux-6c07be8fe92c6b0c24ee1c599601dce3506b83c7.zip | |
ASoC: cs35l45: Hibernation support
Adds support for a low-power Hibernation State.
Add support for a low-power hibernation state for the DSP. In
this state the DSP RAM contents are maintained, such that
firmware does not need to be re-downloaded, but the rest of the
chip's register state is lost.
Entry to this state is achieved via the register interface
(either by an external driver using the control port, or the
programmable DSP). Exit from this state is triggered by activity
on device GPIO pins, intended SPI transaction, or I2C
transaction with intended slave address.
Signed-off-by: Vlad Karpovich <vkarpovi@opensource.cirrus.com>
Link: https://lore.kernel.org/r/167933511185.26.10641185496218226278@mailman-core.alsa-project.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/cs35l45-tables.c')
| -rw-r--r-- | sound/soc/codecs/cs35l45-tables.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sound/soc/codecs/cs35l45-tables.c b/sound/soc/codecs/cs35l45-tables.c index 434a6473070e..46610e64e818 100644 --- a/sound/soc/codecs/cs35l45-tables.c +++ b/sound/soc/codecs/cs35l45-tables.c @@ -47,6 +47,8 @@ static const struct reg_default cs35l45_defaults[] = { { CS35L45_INTB_GPIO2_MCLK_REF, 0x00000005 }, { CS35L45_GPIO3, 0x00000005 }, { CS35L45_PWRMGT_CTL, 0x00000000 }, + { CS35L45_WAKESRC_CTL, 0x00000008 }, + { CS35L45_WKI2C_CTL, 0x00000030 }, { CS35L45_REFCLK_INPUT, 0x00000510 }, { CS35L45_GLOBAL_SAMPLE_RATE, 0x00000003 }, { CS35L45_ASP_ENABLES1, 0x00000000 }, @@ -126,6 +128,9 @@ static bool cs35l45_readable_reg(struct device *dev, unsigned int reg) case CS35L45_INTB_GPIO2_MCLK_REF: case CS35L45_GPIO3: case CS35L45_PWRMGT_CTL: + case CS35L45_WAKESRC_CTL: + case CS35L45_WKI2C_CTL: + case CS35L45_PWRMGT_STS: case CS35L45_REFCLK_INPUT: case CS35L45_GLOBAL_SAMPLE_RATE: case CS35L45_ASP_ENABLES1: @@ -210,6 +215,7 @@ static bool cs35l45_volatile_reg(struct device *dev, unsigned int reg) case CS35L45_GLOBAL_ENABLES: case CS35L45_ERROR_RELEASE: case CS35L45_AMP_PCM_HPF_TST: /* not cachable */ + case CS35L45_PWRMGT_STS: case CS35L45_IRQ1_STATUS: case CS35L45_IRQ1_EINT_1 ... CS35L45_IRQ1_EINT_18: case CS35L45_IRQ1_STS_1 ... CS35L45_IRQ1_STS_18: |