Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64...

Pull more arm64 updates from Catalin Marinas:
 "The main 'feature' is a workaround for C1-Pro erratum 4193714
  requiring IPIs during TLB maintenance if a process is running in user
  space with SME enabled.

  The hardware acknowledges the DVMSync messages before completing
  in-flight SME accesses, with security implications. The workaround
  makes use of the mm_cpumask() to track the cores that need
  interrupting (arm64 hasn't used this mask before).

  The rest are fixes for MPAM, CCA and generated header that turned up
  during the merging window or shortly before.

  Summary:

  Core features:

   - Add workaround for C1-Pro erratum 4193714 - early CME (SME unit)
     DVMSync acknowledgement. The fix consists of sending IPIs on TLB
     maintenance to those CPUs running in user space with SME enabled

   - Include kernel-hwcap.h in list of generated files (missed in a
     recent commit generating the KERNEL_HWCAP_* macros)

  CCA:

   - Fix RSI_INCOMPLETE error check in arm-cca-guest

  MPAM:

   - Fix an unmount->remount problem with the CDP emulation,
     uninitialised variable and checker warnings"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm_mpam: resctrl: Make resctrl_mon_ctx_waiters static
  arm_mpam: resctrl: Fix the check for no monitor components found
  arm_mpam: resctrl: Fix MBA CDP alloc_capable handling on unmount
  virt: arm-cca-guest: fix error check for RSI_INCOMPLETE
  arm64/hwcap: Include kernel-hwcap.h in list of generated files
  arm64: errata: Work around early CME DVMSync acknowledgement
  arm64: cputype: Add C1-Pro definitions
  arm64: tlb: Pass the corresponding mm to __tlbi_sync_s1ish()
  arm64: tlb: Introduce __tlbi_sync_s1ish_{kernel,batch}() for TLB maintenance

diff --combined Documentation/arch/arm64/silicon-errata.rst
index 4e0e8898c5d4a8a1fcdee74e99566894efdcd9a9,8c7ef3a5629db3143bceee69135ab145d6c56fcd..211119ce7adc7c721c8f5fa3c42836ebc9f22413
--- 1/Documentation/arch/arm64/silicon-errata.rst
--- 2/Documentation/arch/arm64/silicon-errata.rst
+++ b/Documentation/arch/arm64/silicon-errata.rst
@@@ -202,19 -202,15 +202,21 @@@ stable kernels
  +----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Neoverse-V3AE   | #3312417        | ARM64_ERRATUM_3194386       |
  +----------------+-----------------+-----------------+-----------------------------+
+ | ARM            | C1-Pro          | #4193714        | ARM64_ERRATUM_4193714       |
+ +----------------+-----------------+-----------------+-----------------------------+
  | ARM            | MMU-500         | #841119,826419  | ARM_SMMU_MMU_500_CPRE_ERRATA|
  |                |                 | #562869,1047329 |                             |
  +----------------+-----------------+-----------------+-----------------------------+
  | ARM            | MMU-600         | #1076982,1209401| N/A                         |
  +----------------+-----------------+-----------------+-----------------------------+
 -| ARM            | MMU-700         | #2268618,2812531| N/A                         |
 +| ARM            | MMU-700         | #2133013,       | N/A                         |
 +|                |                 | #2268618,       |                             |
 +|                |                 | #2812531,       |                             |
 +|                |                 | #3777127        |                             |
  +----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | MMU L1          | #3878312        | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | MMU S3          | #3995052        | N/A                         |
  +----------------+-----------------+-----------------+-----------------------------+
  | ARM            | GIC-700         | #2941627        | ARM64_ERRATUM_2941627       |
  +----------------+-----------------+-----------------+-----------------------------+

diff --combined arch/arm64/Kconfig
index a0af483c048811eb86f4f49790f5d88678c7b527,f7632c3ff4d2e3260f5544e7981b5b706e3e19a3..fe60738e5943ba279e5571862423df4fed3db661
--- 1/arch/arm64/Kconfig
--- 2/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@@ -16,6 -16,7 +16,6 @@@ config ARM6
        select ARCH_BINFMT_ELF_STATE
        select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
        select ARCH_ENABLE_MEMORY_HOTPLUG
 -      select ARCH_ENABLE_MEMORY_HOTREMOVE
        select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
        select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
        select ARCH_HAS_CACHE_LINE_SIZE
@@@ -54,7 -55,6 +54,7 @@@
        select ARCH_HAS_STRICT_MODULE_RWX
        select ARCH_HAS_SYNC_DMA_FOR_DEVICE
        select ARCH_HAS_SYNC_DMA_FOR_CPU
 +      select ARCH_HAS_BATCHED_DMA_SYNC
        select ARCH_HAS_SYSCALL_WRAPPER
        select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
        select ARCH_HAS_ZONE_DMA_SET if EXPERT
@@@ -226,7 -226,6 +226,7 @@@
        select HAVE_RSEQ
        select HAVE_RUST if RUSTC_SUPPORTS_ARM64
        select HAVE_STACKPROTECTOR
 +      select HAVE_STATIC_CALL if CFI
        select HAVE_SYSCALL_TRACEPOINTS
        select HAVE_KPROBES
        select HAVE_KRETPROBES
@@@ -266,6 -265,14 +266,6 @@@
  config RUSTC_SUPPORTS_ARM64
        def_bool y
        depends on CPU_LITTLE_ENDIAN
 -      # Shadow call stack is only supported on certain rustc versions.
 -      #
 -      # When using the UNWIND_PATCH_PAC_INTO_SCS option, rustc version 1.80+ is
 -      # required due to use of the -Zfixed-x18 flag.
 -      #
 -      # Otherwise, rustc version 1.82+ is required due to use of the
 -      # -Zsanitizer=shadow-call-stack flag.
 -      depends on !SHADOW_CALL_STACK || RUSTC_VERSION >= 108200 || RUSTC_VERSION >= 108000 && UNWIND_PATCH_PAC_INTO_SCS
  
  config CLANG_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS
        def_bool CC_IS_CLANG
@@@ -1142,6 -1149,18 +1142,18 @@@ config ARM64_ERRATUM_431156
  
          If unsure, say Y.
  
+ config ARM64_ERRATUM_4193714
+       bool "C1-Pro: 4193714: SME DVMSync early acknowledgement"
+       depends on ARM64_SME
+       default y
+       help
+         Enable workaround for C1-Pro acknowledging the DVMSync before
+         the SME memory accesses are complete. This will cause TLB
+         maintenance for processes using SME to also issue an IPI to
+         the affected CPUs.
+ 
+         If unsure, say Y.
+ 
  config CAVIUM_ERRATUM_22375
        bool "Cavium erratum 22375, 24313"
        default y