diff options
49 files changed, 886 insertions, 1690 deletions
diff --git a/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.txt b/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.txt deleted file mode 100644 index bef353f370d8..000000000000 --- a/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.txt +++ /dev/null @@ -1,20 +0,0 @@ -Fujitsu MB86S7x GPIO Controller -------------------------------- - -Required properties: -- compatible: Should be "fujitsu,mb86s70-gpio" -- reg: Base address and length of register space -- clocks: Specify the clock -- gpio-controller: Marks the device node as a gpio controller. -- #gpio-cells: Should be <2>. The first cell is the pin number and the - second cell is used to specify optional parameters: - - bit 0 specifies polarity (0 for normal, 1 for inverted). - -Examples: - gpio0: gpio@31000000 { - compatible = "fujitsu,mb86s70-gpio"; - reg = <0 0x31000000 0x10000>; - gpio-controller; - #gpio-cells = <2>; - clocks = <&clk 0 2 1>; - }; diff --git a/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.yaml b/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.yaml new file mode 100644 index 000000000000..d18d95285465 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/fujitsu,mb86s70-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Fujitsu MB86S7x GPIO Controller + +maintainers: + - Jassi Brar <jaswinder.singh@linaro.org> + +properties: + compatible: + oneOf: + - items: + - const: socionext,synquacer-gpio + - const: fujitsu,mb86s70-gpio + - const: fujitsu,mb86s70-gpio + + reg: + maxItems: 1 + + '#gpio-cells': + const: 2 + + gpio-controller: true + gpio-line-names: true + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - '#gpio-cells' + - gpio-controller + - clocks + +additionalProperties: false + +examples: + - | + gpio@31000000 { + compatible = "fujitsu,mb86s70-gpio"; + reg = <0x31000000 0x10000>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clk 0 2 1>; + }; +... diff --git a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt deleted file mode 100644 index 54040a2bfe3a..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt +++ /dev/null @@ -1,97 +0,0 @@ -Spreadtrum EIC controller bindings - -The EIC is the abbreviation of external interrupt controller, which can -be used only in input mode. The Spreadtrum platform has 2 EIC controllers, -one is in digital chip, and another one is in PMIC. The digital chip EIC -controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and -EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- -module. - -The EIC-debounce sub-module provides up to 8 source input signal -connections. A debounce mechanism is used to capture the input signals' -stable status (millisecond resolution) and a single-trigger mechanism -is introduced into this sub-module to enhance the input event detection -reliability. In addition, this sub-module's clock can be shut off -automatically to reduce power dissipation. Moreover the debounce range -is from 1ms to 4s with a step size of 1ms. The input signal will be -ignored if it is asserted for less than 1 ms. - -The EIC-latch sub-module is used to latch some special power down signals -and generate interrupts, since the EIC-latch does not depend on the APB -clock to capture signals. - -The EIC-async sub-module uses a 32kHz clock to capture the short signals -(microsecond resolution) to generate interrupts by level or edge trigger. - -The EIC-sync is similar with GPIO's input function, which is a synchronized -signal input register. It can generate interrupts by level or edge trigger -when detecting input signals. - -Required properties: -- compatible: Should be one of the following: - "sprd,sc9860-eic-debounce", - "sprd,sc9860-eic-latch", - "sprd,sc9860-eic-async", - "sprd,sc9860-eic-sync", - "sprd,sc2731-eic". -- reg: Define the base and range of the I/O address space containing - the GPIO controller registers. -- gpio-controller: Marks the device node as a GPIO controller. -- #gpio-cells: Should be <2>. The first cell is the gpio number and - the second cell is used to specify optional parameters. -- interrupt-controller: Marks the device node as an interrupt controller. -- #interrupt-cells: Should be <2>. Specifies the number of cells needed - to encode interrupt source. -- interrupts: Should be the port interrupt shared by all the gpios. - -Example: - eic_debounce: gpio@40210000 { - compatible = "sprd,sc9860-eic-debounce"; - reg = <0 0x40210000 0 0x80>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - }; - - eic_latch: gpio@40210080 { - compatible = "sprd,sc9860-eic-latch"; - reg = <0 0x40210080 0 0x20>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - }; - - eic_async: gpio@402100a0 { - compatible = "sprd,sc9860-eic-async"; - reg = <0 0x402100a0 0 0x20>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - }; - - eic_sync: gpio@402100c0 { - compatible = "sprd,sc9860-eic-sync"; - reg = <0 0x402100c0 0 0x20>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - }; - - pmic_eic: gpio@300 { - compatible = "sprd,sc2731-eic"; - reg = <0x300>; - interrupt-parent = <&sc2731_pmic>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; diff --git a/Documentation/devicetree/bindings/gpio/gpio-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-sprd.txt deleted file mode 100644 index eca97d45388f..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-sprd.txt +++ /dev/null @@ -1,28 +0,0 @@ -Spreadtrum GPIO controller bindings - -The controller's registers are organized as sets of sixteen 16-bit -registers with each set controlling a bank of up to 16 pins. A single -interrupt is shared for all of the banks handled by the controller. - -Required properties: -- compatible: Should be "sprd,sc9860-gpio". -- reg: Define the base and range of the I/O address space containing -the GPIO controller registers. -- gpio-controller: Marks the device node as a GPIO controller. -- #gpio-cells: Should be <2>. The first cell is the gpio number and -the second cell is used to specify optional parameters. -- interrupt-controller: Marks the device node as an interrupt controller. -- #interrupt-cells: Should be <2>. Specifies the number of cells needed -to encode interrupt source. -- interrupts: Should be the port interrupt shared by all the gpios. - -Example: - ap_gpio: gpio@40280000 { - compatible = "sprd,sc9860-gpio"; - reg = <0 0x40280000 0 0x1000>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - }; diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml new file mode 100644 index 000000000000..99fcf970773a --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2022 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc EIC controller + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang7@gmail.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +description: | + The EIC is the abbreviation of external interrupt controller, which can + be used only in input mode. The Spreadtrum platform has 2 EIC controllers, + one is in digital chip, and another one is in PMIC. The digital chip EIC + controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and + EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- + module. + + The EIC-debounce sub-module provides up to 8 source input signal + connections. A debounce mechanism is used to capture the input signals' + stable status (millisecond resolution) and a single-trigger mechanism + is introduced into this sub-module to enhance the input event detection + reliability. In addition, this sub-module's clock can be shut off + automatically to reduce power dissipation. Moreover the debounce range + is from 1ms to 4s with a step size of 1ms. The input signal will be + ignored if it is asserted for less than 1 ms. + + The EIC-latch sub-module is used to latch some special power down signals + and generate interrupts, since the EIC-latch does not depend on the APB + clock to capture signals. + + The EIC-async sub-module uses a 32kHz clock to capture the short signals + (microsecond resolution) to generate interrupts by level or edge trigger. + + The EIC-sync is similar with GPIO's input function, which is a synchronized + signal input register. It can generate interrupts by level or edge trigger + when detecting input signals. + +properties: + compatible: + oneOf: + - enum: + - sprd,sc9860-eic-debounce + - sprd,sc9860-eic-latch + - sprd,sc9860-eic-async + - sprd,sc9860-eic-sync + - sprd,sc2731-eic + - items: + - enum: + - sprd,ums512-eic-debounce + - const: sprd,sc9860-eic-debounce + - items: + - enum: + - sprd,ums512-eic-latch + - const: sprd,sc9860-eic-latch + - items: + - enum: + - sprd,ums512-eic-async + - const: sprd,sc9860-eic-async + - items: + - enum: + - sprd,ums512-eic-sync + - const: sprd,sc9860-eic-sync + - items: + - enum: + - sprd,sc2730-eic + - const: sprd,sc2731-eic + + reg: + minItems: 1 + maxItems: 3 + description: + EIC controller can support maximum 3 banks which has its own + address base. + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + description: + The interrupt shared by all GPIO lines for this controller. + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - interrupt-controller + - "#interrupt-cells" + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + eic_debounce: gpio@40210000 { + compatible = "sprd,sc9860-eic-debounce"; + reg = <0 0x40210000 0 0x80>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml new file mode 100644 index 000000000000..483168838128 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2022 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/sprd,gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc GPIO controller + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang7@gmail.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +description: | + The controller's registers are organized as sets of sixteen 16-bit + registers with each set controlling a bank of up to 16 pins. A single + interrupt is shared for all of the banks handled by the controller. + +properties: + compatible: + oneOf: + - const: sprd,sc9860-gpio + - items: + - enum: + - sprd,ums512-gpio + - const: sprd,sc9860-gpio + + reg: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + description: The interrupt shared by all GPIO lines for this controller. + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - interrupt-controller + - "#interrupt-cells" + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + ap_gpio: gpio@40280000 { + compatible = "sprd,sc9860-gpio"; + reg = <0 0x40280000 0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + }; + }; +... diff --git a/Documentation/driver-api/gpio/legacy.rst b/Documentation/driver-api/gpio/legacy.rst index e17910cc3271..a0559d93efd1 100644 --- a/Documentation/driver-api/gpio/legacy.rst +++ b/Documentation/driver-api/gpio/legacy.rst @@ -387,9 +387,6 @@ map between them using calls like:: /* map GPIO numbers to IRQ numbers */ int gpio_to_irq(unsigned gpio); - /* map IRQ numbers to GPIO numbers (avoid using this) */ - int irq_to_gpio(unsigned irq); - Those return either the corresponding number in the other namespace, or else a negative errno code if the mapping can't be done. (For example, some GPIOs can't be used as IRQs.) It is an unchecked error to use a GPIO @@ -405,11 +402,6 @@ devices, by the board-specific initialization code. Note that IRQ trigger options are part of the IRQ interface, e.g. IRQF_TRIGGER_FALLING, as are system wakeup capabilities. -Non-error values returned from irq_to_gpio() would most commonly be used -with gpio_get_value(), for example to initialize or update driver state -when the IRQ is edge-triggered. Note that some platforms don't support -this reverse mapping, so you should avoid using it. - Emulating Open Drain Signals ---------------------------- @@ -735,10 +727,6 @@ requested using gpio_request():: /* reverse gpio_export() */ void gpio_unexport(); - /* create a sysfs link to an exported GPIO node */ - int gpio_export_link(struct device *dev, const char *name, - unsigned gpio) - After a kernel driver requests a GPIO, it may only be made available in the sysfs interface by gpio_export(). The driver can control whether the signal direction may change. This helps drivers prevent userspace code @@ -748,11 +736,6 @@ This explicit exporting can help with debugging (by making some kinds of experiments easier), or can provide an always-there interface that's suitable for documenting as part of a board support package. -After the GPIO has been exported, gpio_export_link() allows creating -symlinks from elsewhere in sysfs to the GPIO sysfs node. Drivers can -use this to provide the interface under their own device in sysfs with -a descriptive name. - API Reference ============= diff --git a/Documentation/translations/zh_CN/driver-api/gpio/legacy.rst b/Documentation/translations/zh_CN/driver-api/gpio/legacy.rst index 6399521d0548..74fa473bb504 100644 --- a/Documentation/translations/zh_CN/driver-api/gpio/legacy.rst +++ b/Documentation/translations/zh_CN/driver-api/gpio/legacy.rst @@ -358,9 +358,6 @@ GPIO 编号是无符号整数;IRQ 编号也是。这些构成了两个逻辑上 /* 映射 GPIO 编号到 IRQ 编号 */ int gpio_to_irq(unsigned gpio); - /* 映射 IRQ 编号到 GPIO 编号 (尽量避免使用) */ - int irq_to_gpio(unsigned irq); - 它们的返回值为对应命名空间的相关编号，或是负的错误代码(如果无法映射)。 (例如,某些 GPIO 无法做为 IRQ 使用。)以下的编号错误是未经检测的:使用一个 未通过 gpio_direction_input()配置为输入的 GPIO 编号，或者使用一个 @@ -373,10 +370,6 @@ gpio_to_irq()返回的非错误值可以传递给 request_irq()或者 free_irq() 触发选项是 IRQ 接口的一部分，如 IRQF_TRIGGER_FALLING，系统唤醒能力 也是如此。 -irq_to_gpio()返回的非错误值大多数通常可以被 gpio_get_value()所使用， -比如在 IRQ 是沿触发时初始化或更新驱动状态。注意某些平台不支持反映射,所以 -你应该尽量避免使用它。 - 模拟开漏信号 ------------ @@ -672,10 +665,6 @@ GPIO 控制器的路径类似 /sys/class/gpio/gpiochip42/ (对于从#42 GPIO /* gpio_export()的逆操作 */ void gpio_unexport(); - /* 创建一个 sysfs 连接到已导出的 GPIO 节点 */ - int gpio_export_link(struct device *dev, const char *name, - unsigned gpio) - 在一个内核驱动申请一个 GPIO 之后，它可以通过 gpio_export()使其在 sysfs 接口中可见。该驱动可以控制信号方向是否可修改。这有助于防止用户空间代码无意间 破坏重要的系统状态。 @@ -683,10 +672,6 @@ GPIO 控制器的路径类似 /sys/class/gpio/gpiochip42/ (对于从#42 GPIO 这个明确的导出有助于(通过使某些实验更容易来)调试，也可以提供一个始终存在的接口， 与文档配合作为板级支持包的一部分。 -在 GPIO 被导出之后，gpio_export_link()允许在 sysfs 文件系统的任何地方 -创建一个到这个 GPIO sysfs 节点的符号链接。这样驱动就可以通过一个描述性的 -名字，在 sysfs 中他们所拥有的设备下提供一个(到这个 GPIO sysfs 节点的)接口。 - API参考 ======= diff --git a/Documentation/translations/zh_TW/gpio.txt b/Documentation/translations/zh_TW/gpio.txt index e3c076dd75a5..1b986bbb0909 100644 --- a/Documentation/translations/zh_TW/gpio.txt +++ b/Documentation/translations/zh_TW/gpio.txt @@ -363,9 +363,6 @@ GPIO 編號是無符號整數;IRQ 編號也是。這些構成了兩個邏輯上 /* 映射 GPIO 編號到 IRQ 編號 */ int gpio_to_irq(unsigned gpio); - /* 映射 IRQ 編號到 GPIO 編號 (儘量避免使用) */ - int irq_to_gpio(unsigned irq); - 它們的返回值爲對應命名空間的相關編號，或是負的錯誤代碼(如果無法映射)。 (例如,某些 GPIO 無法做爲 IRQ 使用。)以下的編號錯誤是未經檢測的:使用一個 未通過 gpio_direction_input()配置爲輸入的 GPIO 編號，或者使用一個 @@ -378,10 +375,6 @@ gpio_to_irq()返回的非錯誤值可以傳遞給 request_irq()或者 free_irq() 觸發選項是 IRQ 接口的一部分，如 IRQF_TRIGGER_FALLING，系統喚醒能力 也是如此。 -irq_to_gpio()返回的非錯誤值大多數通常可以被 gpio_get_value()所使用， -比如在 IRQ 是沿觸發時初始化或更新驅動狀態。注意某些平台不支持反映射,所以 -你應該儘量避免使用它。 - 模擬開漏信號 ---------------------------- @@ -634,18 +627,9 @@ GPIO 控制器的路徑類似 /sys/class/gpio/gpiochip42/ (對於從#42 GPIO /* gpio_export()的逆操作 */ void gpio_unexport(); - /* 創建一個 sysfs 連接到已導出的 GPIO 節點 */ - int gpio_export_link(struct device *dev, const char *name, - unsigned gpio) - 在一個內核驅動申請一個 GPIO 之後，它可以通過 gpio_export()使其在 sysfs 接口中可見。該驅動可以控制信號方向是否可修改。這有助於防止用戶空間代碼無意間 破壞重要的系統狀態。 這個明確的導出有助於(通過使某些實驗更容易來)調試，也可以提供一個始終存在的接口， 與文檔配合作爲板級支持包的一部分。 - -在 GPIO 被導出之後，gpio_export_link()允許在 sysfs 文件系統的任何地方 -創建一個到這個 GPIO sysfs 節點的符號連結。這樣驅動就可以通過一個描述性的 -名字，在 sysfs 中他們所擁有的設備下提供一個(到這個 GPIO sysfs 節點的)接口。 - diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h index a50b27719a58..5cfc0996ba94 100644 --- a/arch/m68k/include/asm/gpio.h +++ b/arch/m68k/include/asm/gpio.h @@ -66,13 +66,6 @@ static inline int gpio_to_irq(unsigned gpio) return __gpio_to_irq(gpio); } -static inline int irq_to_gpio(unsigned irq) -{ - return (irq >= MCFGPIO_IRQ_VECBASE && - irq < (MCFGPIO_IRQ_VECBASE + MCFGPIO_IRQ_MAX)) ? - irq - MCFGPIO_IRQ_VECBASE : -ENXIO; -} - static inline int gpio_cansleep(unsigned gpio) { return gpio < MCFGPIO_PIN_MAX ? 0 : __gpio_cansleep(gpio); diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h index d643250f0a0f..588c1380e4cb 100644 --- a/arch/sh/include/asm/gpio.h +++ b/arch/sh/include/asm/gpio.h @@ -40,11 +40,6 @@ static inline int gpio_to_irq(unsigned gpio) return __gpio_to_irq(gpio); } -static inline int irq_to_gpio(unsigned int irq) -{ - return -ENOSYS; -} - #endif /* CONFIG_GPIOLIB */ #endif /* __ASM_SH_GPIO_H */ diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index c85726a6831f..13be729710f2 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -752,7 +752,7 @@ config GPIO_XTENSA config GPIO_ZEVIO bool "LSI ZEVIO SoC memory mapped GPIOs" - depends on ARM && OF_GPIO + depends on ARM help Say yes here to support the GPIO controller in LSI ZEVIO SoCs. @@ -821,6 +821,7 @@ menu "Port-mapped I/O GPIO drivers" config GPIO_I8255 tristate + select GPIO_REGMAP help Enables support for the i8255 interface library functions. The i8255 interface library provides functions to facilitate communication with @@ -835,6 +836,8 @@ config GPIO_104_DIO_48E tristate "ACCES 104-DIO-48E GPIO support" depends on PC104 select ISA_BUS_API + select REGMAP_MMIO + select REGMAP_IRQ select GPIOLIB_IRQCHIP select GPIO_I8255 help @@ -860,8 +863,10 @@ config GPIO_104_IDI_48 tristate "ACCES 104-IDI-48 GPIO support" depends on PC104 select ISA_BUS_API + select REGMAP_MMIO + select REGMAP_IRQ select GPIOLIB_IRQCHIP - select GPIO_I8255 + select GPIO_REGMAP help Enables GPIO support for the ACCES 104-IDI-48 family (104-IDI-48A, 104-IDI-48AC, 104-IDI-48B, 104-IDI-48BC). The base port addresses for @@ -883,6 +888,7 @@ config GPIO_GPIO_MM tristate "Diamond Systems GPIO-MM GPIO support" depends on PC104 select ISA_BUS_API + select REGMAP_MMIO select GPIO_I8255 help Enables GPIO support for the Diamond Systems GPIO-MM and GPIO-MM-12. diff --git a/drivers/gpio/TODO b/drivers/gpio/TODO index 76560744587a..68ada1066941 100644 --- a/ |