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-rw-r--r--drivers/media/i2c/ccs/ccs-core.c84
-rw-r--r--drivers/media/i2c/ccs/ccs-reg-access.c192
-rw-r--r--drivers/media/i2c/ccs/ccs-regs.h906
-rw-r--r--drivers/media/i2c/ccs/ccs.h2
-rw-r--r--drivers/media/i2c/ccs/smiapp-reg-defs.h951
5 files changed, 999 insertions, 1136 deletions
diff --git a/drivers/media/i2c/ccs/ccs-core.c b/drivers/media/i2c/ccs/ccs-core.c
index 6fd162fe394a..e21287d50c15 100644
--- a/drivers/media/i2c/ccs/ccs-core.c
+++ b/drivers/media/i2c/ccs/ccs-core.c
@@ -25,8 +25,9 @@
#include <linux/slab.h>
#include <linux/smiapp.h>
#include <linux/v4l2-mediabus.h>
-#include <media/v4l2-fwnode.h>
+#include <media/v4l2-cci.h>
#include <media/v4l2-device.h>
+#include <media/v4l2-fwnode.h>
#include <uapi/linux/ccs.h>
#include "ccs.h"
@@ -98,7 +99,7 @@ static int ccs_limit_ptr(struct ccs_sensor *sensor, unsigned int limit,
linfo = &ccs_limits[ccs_limit_offsets[limit].info];
if (WARN_ON(!sensor->ccs_limits) ||
- WARN_ON(offset + ccs_reg_width(linfo->reg) >
+ WARN_ON(offset + CCI_REG_WIDTH_BYTES(linfo->reg) >
ccs_limit_offsets[limit + 1].lim))
return -EINVAL;
@@ -124,7 +125,7 @@ void ccs_replace_limit(struct ccs_sensor *sensor,
dev_dbg(&client->dev, "quirk: 0x%8.8x \"%s\" %u = %u, 0x%x\n",
linfo->reg, linfo->name, offset, val, val);
- ccs_assign_limit(ptr, ccs_reg_width(linfo->reg), val);
+ ccs_assign_limit(ptr, CCI_REG_WIDTH_BYTES(linfo->reg), val);
}
u32 ccs_get_limit(struct ccs_sensor *sensor, unsigned int limit,
@@ -138,7 +139,7 @@ u32 ccs_get_limit(struct ccs_sensor *sensor, unsigned int limit,
if (ret)
return 0;
- switch (ccs_reg_width(ccs_limits[ccs_limit_offsets[limit].info].reg)) {
+ switch (CCI_REG_WIDTH_BYTES(ccs_limits[ccs_limit_offsets[limit].info].reg)) {
case sizeof(u8):
val = *(u8 *)ptr;
break;
@@ -176,7 +177,7 @@ static int ccs_read_all_limits(struct ccs_sensor *sensor)
for (i = 0, l = 0, ptr = alloc; ccs_limits[i].size; i++) {
u32 reg = ccs_limits[i].reg;
- unsigned int width = ccs_reg_width(reg);
+ unsigned int width = CCI_REG_WIDTH_BYTES(reg);
unsigned int j;
if (l == CCS_L_LAST) {
@@ -2725,66 +2726,54 @@ static int ccs_identify_module(struct ccs_sensor *sensor)
rval = ccs_read(sensor, MODULE_MANUFACTURER_ID,
&minfo->mipi_manufacturer_id);
if (!rval && !minfo->mipi_manufacturer_id)
- rval = ccs_read_addr_8only(sensor,
- SMIAPP_REG_U8_MANUFACTURER_ID,
- &minfo->smia_manufacturer_id);
+ rval = ccs_read_addr(sensor, SMIAPP_REG_U8_MANUFACTURER_ID,
+ &minfo->smia_manufacturer_id);
if (!rval)
- rval = ccs_read_addr_8only(sensor, CCS_R_MODULE_MODEL_ID,
- &minfo->model_id);
+ rval = ccs_read(sensor, MODULE_MODEL_ID, &minfo->model_id);
if (!rval)
- rval = ccs_read_addr_8only(sensor,
- CCS_R_MODULE_REVISION_NUMBER_MAJOR,
- &rev);
+ rval = ccs_read(sensor, MODULE_REVISION_NUMBER_MAJOR, &rev);
if (!rval) {
- rval = ccs_read_addr_8only(sensor,
- CCS_R_MODULE_REVISION_NUMBER_MINOR,
- &minfo->revision_number);
+ rval = ccs_read(sensor, MODULE_REVISION_NUMBER_MINOR,
+ &minfo->revision_number);
minfo->revision_number |= rev << 8;
}
if (!rval)
- rval = ccs_read_addr_8only(sensor, CCS_R_MODULE_DATE_YEAR,
- &minfo->module_year);
+ rval = ccs_read(sensor, MODULE_DATE_YEAR, &minfo->module_year);
if (!rval)
- rval = ccs_read_addr_8only(sensor, CCS_R_MODULE_DATE_MONTH,
- &minfo->module_month);
+ rval = ccs_read(sensor, MODULE_DATE_MONTH,
+ &minfo->module_month);
if (!rval)
- rval = ccs_read_addr_8only(sensor, CCS_R_MODULE_DATE_DAY,
- &minfo->module_day);
+ rval = ccs_read(sensor, MODULE_DATE_DAY, &minfo->module_day);
/* Sensor info */
if (!rval)
rval = ccs_read(sensor, SENSOR_MANUFACTURER_ID,
&minfo->sensor_mipi_manufacturer_id);
if (!rval && !minfo->sensor_mipi_manufacturer_id)
- rval = ccs_read_addr_8only(sensor,
- CCS_R_SENSOR_MANUFACTURER_ID,
- &minfo->sensor_smia_manufacturer_id);
+ rval = ccs_read(sensor, SENSOR_MANUFACTURER_ID,
+ &minfo->sensor_smia_manufacturer_id);
if (!rval)
- rval = ccs_read_addr_8only(sensor,
- CCS_R_SENSOR_MODEL_ID,
- &minfo->sensor_model_id);
+ rval = ccs_read(sensor, SENSOR_MODEL_ID,
+ &minfo->sensor_model_id);
if (!rval)
- rval = ccs_read_addr_8only(sensor,
- CCS_R_SENSOR_REVISION_NUMBER,
- &minfo->sensor_revision_number);
+ rval = ccs_read(sensor, SENSOR_REVISION_NUMBER,
+ &minfo->sensor_revision_number);
if (!rval && !minfo->sensor_revision_number)
- rval = ccs_read_addr_8only(sensor,
- CCS_R_SENSOR_REVISION_NUMBER_16,
- &minfo->sensor_revision_number);
+ rval = ccs_read(sensor, SENSOR_REVISION_NUMBER_16,
+ &minfo->sensor_revision_number);
if (!rval)
- rval = ccs_read_addr_8only(sensor,
- CCS_R_SENSOR_FIRMWARE_VERSION,
- &minfo->sensor_firmware_version);
+ rval = ccs_read(sensor, SENSOR_FIRMWARE_VERSION,
+ &minfo->sensor_firmware_version);
/* SMIA */
if (!rval)
rval = ccs_read(sensor, MIPI_CCS_VERSION, &minfo->ccs_version);
if (!rval && !minfo->ccs_version)
- rval = ccs_read_addr_8only(sensor, SMIAPP_REG_U8_SMIA_VERSION,
- &minfo->smia_version);
+ rval = ccs_read_addr(sensor, SMIAPP_REG_U8_SMIA_VERSION,
+ &minfo->smia_version);
if (!rval && !minfo->ccs_version)
- rval = ccs_read_addr_8only(sensor, SMIAPP_REG_U8_SMIAPP_VERSION,
- &minfo->smiapp_version);
+ rval = ccs_read_addr(sensor, SMIAPP_REG_U8_SMIAPP_VERSION,
+ &minfo->smiapp_version);
if (rval) {
dev_err(&client->dev, "sensor detection failed\n");
@@ -3318,6 +3307,13 @@ static int ccs_probe(struct i2c_client *client)
if (IS_ERR(sensor->xshutdown))
return PTR_ERR(sensor->xshutdown);
+ sensor->regmap = devm_cci_regmap_init_i2c(client, 16);
+ if (IS_ERR(sensor->regmap)) {
+ dev_err(&client->dev, "can't initialise CCI (%ld)\n",
+ PTR_ERR(sensor->regmap));
+ return PTR_ERR(sensor->regmap);
+ }
+
rval = ccs_power_on(&client->dev);
if (rval < 0)
return rval;
@@ -3648,12 +3644,16 @@ static int ccs_module_init(void)
{
unsigned int i, l;
+ CCS_BUILD_BUG;
+
for (i = 0, l = 0; ccs_limits[i].size && l < CCS_L_LAST; i++) {
if (!(ccs_limits[i].flags & CCS_L_FL_SAME_REG)) {
ccs_limit_offsets[l + 1].lim =
ALIGN(ccs_limit_offsets[l].lim +
ccs_limits[i].size,
- ccs_reg_width(ccs_limits[i + 1].reg));
+ ccs_limits[i + 1].reg ?
+ CCI_REG_WIDTH_BYTES(ccs_limits[i + 1].reg) :
+ 1U);
ccs_limit_offsets[l].info = i;
l++;
} else {
diff --git a/drivers/media/i2c/ccs/ccs-reg-access.c b/drivers/media/i2c/ccs/ccs-reg-access.c
index 03daaa8310a6..ed79075505e6 100644
--- a/drivers/media/i2c/ccs/ccs-reg-access.c
+++ b/drivers/media/i2c/ccs/ccs-reg-access.c
@@ -62,87 +62,6 @@ static u32 float_to_u32_mul_1000000(struct i2c_client *client, u32 phloat)
}
-/*
- * Read a 8/16/32-bit i2c register. The value is returned in 'val'.
- * Returns zero if successful, or non-zero otherwise.
- */
-static int ____ccs_read_addr(struct ccs_sensor *sensor, u16 reg, u16 len,
- u32 *val)
-{
- struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
- struct i2c_msg msg;
- unsigned char data_buf[sizeof(u32)] = { 0 };
- unsigned char offset_buf[sizeof(u16)];
- int r;
-
- if (len > sizeof(data_buf))
- return -EINVAL;
-
- msg.addr = client->addr;
- msg.flags = 0;
- msg.len = sizeof(offset_buf);
- msg.buf = offset_buf;
- put_unaligned_be16(reg, offset_buf);
-
- r = i2c_transfer(client->adapter, &msg, 1);
- if (r != 1) {
- if (r >= 0)
- r = -EBUSY;
- goto err;
- }
-
- msg.len = len;
- msg.flags = I2C_M_RD;
- msg.buf = &data_buf[sizeof(data_buf) - len];
-
- r = i2c_transfer(client->adapter, &msg, 1);
- if (r != 1) {
- if (r >= 0)
- r = -EBUSY;
- goto err;
- }
-
- *val = get_unaligned_be32(data_buf);
-
- return 0;
-
-err:
- dev_err(&client->dev, "read from offset 0x%x error %d\n", reg, r);
-
- return r;
-}
-
-/* Read a register using 8-bit access only. */
-static int ____ccs_read_addr_8only(struct ccs_sensor *sensor, u16 reg,
- u16 len, u32 *val)
-{
- unsigned int i;
- int rval;
-
- *val = 0;
-
- for (i = 0; i < len; i++) {
- u32 val8;
-
- rval = ____ccs_read_addr(sensor, reg + i, 1, &val8);
- if (rval < 0)
- return rval;
- *val |= val8 << ((len - i - 1) << 3);
- }
-
- return 0;
-}
-
-unsigned int ccs_reg_width(u32 reg)
-{
- if (reg & CCS_FL_16BIT)
- return sizeof(u16);
- if (reg & CCS_FL_32BIT)
- return sizeof(u32);
-
- return sizeof(u8);
-}
-
static u32 ireal32_to_u32_mul_1000000(struct i2c_client *client, u32 val)
{
if (val >> 10 > U32_MAX / 15625) {
@@ -178,21 +97,14 @@ u32 ccs_reg_conv(struct ccs_sensor *sensor, u32 reg, u32 val)
static int __ccs_read_addr(struct ccs_sensor *sensor, u32 reg, u32 *val,
bool only8, bool conv)
{
- unsigned int len = ccs_reg_width(reg);
+ u64 __val;
int rval;
- if (!only8)
- rval = ____ccs_read_addr(sensor, CCS_REG_ADDR(reg), len, val);
- else
- rval = ____ccs_read_addr_8only(sensor, CCS_REG_ADDR(reg), len,
- val);
+ rval = cci_read(sensor->regmap, reg, &__val, NULL);
if (rval < 0)
return rval;
- if (!conv)
- return 0;
-
- *val = ccs_reg_conv(sensor, reg, *val);
+ *val = conv ? ccs_reg_conv(sensor, reg, __val) : __val;
return 0;
}
@@ -200,7 +112,7 @@ static int __ccs_read_addr(struct ccs_sensor *sensor, u32 reg, u32 *val,
static int __ccs_static_data_read_ro_reg(struct ccs_reg *regs, size_t num_regs,
u32 reg, u32 *val)
{
- unsigned int width = ccs_reg_width(reg);
+ unsigned int width = CCI_REG_WIDTH_BYTES(reg);
size_t i;
for (i = 0; i < num_regs; i++, regs++) {
@@ -292,71 +204,13 @@ int ccs_read_addr_noconv(struct ccs_sensor *sensor, u32 reg, u32 *val)
return ccs_read_addr_raw(sensor, reg, val, false, true, false, true);
}
-static int ccs_write_retry(struct i2c_client *client, struct i2c_msg *msg)
-{
- unsigned int retries;
- int r;
-
- for (retries = 0; retries < 10; retries++) {
- /*
- * Due to unknown reason sensor stops responding. This
- * loop is a temporaty solution until the root cause
- * is found.
- */
- r = i2c_transfer(client->adapter, msg, 1);
- if (r != 1) {
- usleep_range(1000, 2000);
- continue;
- }
-
- if (retries)
- dev_err(&client->dev,
- "sensor i2c stall encountered. retries: %d\n",
- retries);
- return 0;
- }
-
- return r;
-}
-
-int ccs_write_addr_no_quirk(struct ccs_sensor *sensor, u32 reg, u32 val)
-{
- struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
- struct i2c_msg msg;
- unsigned char data[6];
- unsigned int len = ccs_reg_width(reg);
- int r;
-
- if (len > sizeof(data) - 2)
- return -EINVAL;
-
- msg.addr = client->addr;
- msg.flags = 0; /* Write */
- msg.len = 2 + len;
- msg.buf = data;
-
- put_unaligned_be16(CCS_REG_ADDR(reg), data);
- put_unaligned_be32(val << (8 * (sizeof(val) - len)), data + 2);
-
- dev_dbg(&client->dev, "writing reg 0x%4.4x value 0x%*.*x (%u)\n",
- CCS_REG_ADDR(reg), ccs_reg_width(reg) << 1,
- ccs_reg_width(reg) << 1, val, val);
-
- r = ccs_write_retry(client, &msg);
- if (r)
- dev_err(&client->dev,
- "wrote 0x%x to offset 0x%x error %d\n", val,
- CCS_REG_ADDR(reg), r);
-
- return r;
-}
-
/*
* Write to a 8/16-bit register.
* Returns zero if successful, or non-zero otherwise.
*/
int ccs_write_addr(struct ccs_sensor *sensor, u32 reg, u32 val)
{
+ unsigned int retries = 10;
int rval;
rval = ccs_call_quirk(sensor, reg_access, true, &reg, &val);
@@ -365,7 +219,13 @@ int ccs_write_addr(struct ccs_sensor *sensor, u32 reg, u32 val)
if (rval < 0)
return rval;
- return ccs_write_addr_no_quirk(sensor, reg, val);
+ rval = 0;
+ do {
+ if (cci_write(sensor->regmap, reg, val, &rval))
+ fsleep(1000);
+ } while (rval && --retries);
+
+ return rval;
}
#define MAX_WRITE_LEN 32U
@@ -374,40 +234,38 @@ int ccs_write_data_regs(struct ccs_sensor *sensor, struct ccs_reg *regs,
size_t num_regs)
{
struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
- unsigned char buf[2 + MAX_WRITE_LEN];
- struct i2c_msg msg = {
- .addr = client->addr,
- .buf = buf,
- };
size_t i;
for (i = 0; i < num_regs; i++, regs++) {
unsigned char *regdata = regs->value;
unsigned int j;
+ int len;
- for (j = 0; j < regs->len;
- j += msg.len - 2, regdata += msg.len - 2) {
+ for (j = 0; j < regs->len; j += len, regdata += len) {
char printbuf[(MAX_WRITE_LEN << 1) +
1 /* \0 */] = { 0 };
+ unsigned int retries = 10;
int rval;
- msg.len = min(regs->len - j, MAX_WRITE_LEN);
+ len = min(regs->len - j, MAX_WRITE_LEN);
- bin2hex(printbuf, regdata, msg.len);
+ bin2hex(printbuf, regdata, len);
dev_dbg(&client->dev,
"writing msr reg 0x%4.4x value 0x%s\n",
regs->addr + j, printbuf);
- put_unaligned_be16(regs->addr + j, buf);
- memcpy(buf + 2, regdata, msg.len);
-
- msg.len += 2;
+ do {
+ rval = regmap_bulk_write(sensor->regmap,
+ regs->addr + j,
+ regdata, len);
+ if (rval)
+ fsleep(1000);
+ } while (rval && --retries);
- rval = ccs_write_retry(client, &msg);
if (rval) {
dev_err(&client->dev,
"error writing %u octets to address 0x%4.4x\n",
- msg.len, regs->addr + j);
+ len, regs->addr + j);
return rval;
}
}
diff --git a/drivers/media/i2c/ccs/ccs-regs.h b/drivers/media/i2c/ccs/ccs-regs.h
index 6ce84c5ecf20..7b5dbc86e4cd 100644
--- a/drivers/media/i2c/ccs/ccs-regs.h
+++ b/drivers/media/i2c/ccs/ccs-regs.h
@@ -10,59 +10,59 @@
#include <linux/bits.h>
-#define CCS_FL_BASE 16
-#define CCS_FL_16BIT BIT(CCS_FL_BASE)
-#define CCS_FL_32BIT BIT(CCS_FL_BASE + 1)
-#define CCS_FL_FLOAT_IREAL BIT(CCS_FL_BASE + 2)
-#define CCS_FL_IREAL BIT(CCS_FL_BASE + 3)
-#define CCS_R_ADDR(r) ((r) & 0xffff)
+#include <media/v4l2-cci.h>
-#define CCS_R_MODULE_MODEL_ID (0x0000 | CCS_FL_16BIT)
-#define CCS_R_MODULE_REVISION_NUMBER_MAJOR 0x0002
-#define CCS_R_FRAME_COUNT 0x0005
-#define CCS_R_PIXEL_ORDER 0x0006
+#define CCS_FL_BASE CCI_REG_PRIVATE_SHIFT
+#define CCS_FL_FLOAT_IREAL BIT(CCS_FL_BASE)
+#define CCS_FL_IREAL BIT(CCS_FL_BASE + 1)
+#define CCS_BUILD_BUG \
+ BUILD_BUG_ON(~CCI_REG_PRIVATE_MASK & (BIT(CCS_FL_BASE) | BIT(CCS_FL_BASE + 1)))
+#define CCS_R_MODULE_MODEL_ID CCI_REG16(0x0000)
+#define CCS_R_MODULE_REVISION_NUMBER_MAJOR CCI_REG8(0x0002)
+#define CCS_R_FRAME_COUNT CCI_REG8(0x0005)
+#define CCS_R_PIXEL_ORDER CCI_REG8(0x0006)
#define CCS_PIXEL_ORDER_GRBG 0U
#define CCS_PIXEL_ORDER_RGGB 1U
#define CCS_PIXEL_ORDER_BGGR 2U
#define CCS_PIXEL_ORDER_GBRG 3U
-#define CCS_R_MIPI_CCS_VERSION 0x0007
+#define CCS_R_MIPI_CCS_VERSION CCI_REG8(0x0007)
#define CCS_MIPI_CCS_VERSION_V1_0 0x10
#define CCS_MIPI_CCS_VERSION_V1_1 0x11
#define CCS_MIPI_CCS_VERSION_MAJOR_SHIFT 4U
#define CCS_MIPI_CCS_VERSION_MAJOR_MASK 0xf0
#define CCS_MIPI_CCS_VERSION_MINOR_SHIFT 0U
#define CCS_MIPI_CCS_VERSION_MINOR_MASK 0xf
-#define CCS_R_DATA_PEDESTAL (0x0008 | CCS_FL_16BIT)
-#define CCS_R_MODULE_MANUFACTURER_ID (0x000e | CCS_FL_16BIT)
-#define CCS_R_MODULE_REVISION_NUMBER_MINOR 0x0010
-#define CCS_R_MODULE_DATE_YEAR 0x0012
-#define CCS_R_MODULE_DATE_MONTH 0x0013
-#define CCS_R_MODULE_DATE_DAY 0x0014
-#define CCS_R_MODULE_DATE_PHASE 0x0015
+#define CCS_R_DATA_PEDESTAL CCI_REG16(0x0008)
+#define CCS_R_MODULE_MANUFACTURER_ID CCI_REG16(0x000e)
+#define CCS_R_MODULE_REVISION_NUMBER_MINOR CCI_REG8(0x0010)
+#define CCS_R_MODULE_DATE_YEAR CCI_REG8(0x0012)
+#define CCS_R_MODULE_DATE_MONTH CCI_REG8(0x0013)
+#define CCS_R_MODULE_DATE_DAY CCI_REG8(0x0014)
+#define CCS_R_MODULE_DATE_PHASE CCI_REG8(0x0015)
#define CCS_MODULE_DATE_PHASE_SHIFT 0U
#define CCS_MODULE_DATE_PHASE_MASK 0x7
#define CCS_MODULE_DATE_PHASE_TS 0U
#define CCS_MODULE_DATE_PHASE_ES 1U
#define CCS_MODULE_DATE_PHASE_CS 2U
#define CCS_MODULE_DATE_PHASE_MP 3U
-#define CCS_R_SENSOR_MODEL_ID (0x0016 | CCS_FL_16BIT)
-#define CCS_R_SENSOR_REVISION_NUMBER 0x0018
-#define CCS_R_SENSOR_FIRMWARE_VERSION 0x001a
-#define CCS_R_SERIAL_NUMBER (0x001c | CCS_FL_32BIT)
-#define CCS_R_SENSOR_MANUFACTURER_ID (0x0020 | CCS_FL_16BIT)
-#define CCS_R_SENSOR_REVISION_NUMBER_16 (0x0022 | CCS_FL_16BIT)
-#define CCS_R_FRAME_FORMAT_MODEL_TYPE 0x0040
+#define CCS_R_SENSOR_MODEL_ID CCI_REG16(0x0016)
+#define CCS_R_SENSOR_REVISION_NUMBER CCI_REG8(0x0018)
+#define CCS_R_SENSOR_FIRMWARE_VERSION CCI_REG8(0x001a)
+#define CCS_R_SERIAL_NUMBER CCI_REG32(0x001c)
+#define CCS_R_SENSOR_MANUFACTURER_ID CCI_REG16(0x0020)
+#define CCS_R_SENSOR_REVISION_NUMBER_16 CCI_REG16(0x0022)
+#define CCS_R_FRAME_FORMAT_MODEL_TYPE CCI_REG8(0x0040)
#define CCS_FRAME_FORMAT_MODEL_TYPE_2_BYTE 1U
#define CCS_FRAME_FORMAT_MODEL_TYPE_4_BYTE 2U
-#define CCS_R_FRAME_FORMAT_MODEL_SUBTYPE 0x0041
+#define CCS_R_FRAME_FORMAT_MODEL_SUBTYPE CCI_REG8(0x0041)
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_ROWS_SHIFT 0U
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_ROWS_MASK 0xf
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_COLUMNS_SHIFT 4U
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_COLUMNS_MASK 0xf0
-#define CCS_R_FRAME_FORMAT_DESCRIPTOR(n) ((0x0042 | CCS_FL_16BIT) + (n) * 2)
+#define CCS_R_FRAME_FORMAT_DESCRIPTOR(n) CCI_REG16(0x0042 + (n) * 2)
#define CCS_LIM_FRAME_FORMAT_DESCRIPTOR_MIN_N 0U
#define CCS_LIM_FRAME_FORMAT_DESCRIPTOR_MAX_N 14U
-#define CCS_R_FRAME_FORMAT_DESCRIPTOR_4(n) ((0x0060 | CCS_FL_32BIT) + (n) * 4)
+#define CCS_R_FRAME_FORMAT_DESCRIPTOR_4(n) CCI_REG32(0x0060 + (n) * 4)
#define CCS_FRAME_FORMAT_DESCRIPTOR_PIXELS_SHIFT 0U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PIXELS_MASK 0xfff
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_SHIFT 12U
@@ -97,91 +97,91 @@
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_4 12U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_5 13U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_6 14U
-#define CCS_R_ANALOG_GAIN_CAPABILITY (0x0080 | CCS_FL_16BIT)
+#define CCS_R_ANALOG_GAIN_CAPABILITY CCI_REG16(0x0080)
#define CCS_ANALOG_GAIN_CAPABILITY_GLOBAL 0U
#define CCS_ANALOG_GAIN_CAPABILITY_ALTERNATE_GLOBAL 2U
-#define CCS_R_ANALOG_GAIN_CODE_MIN (0x0084 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_GAIN_CODE_MAX (0x0086 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_GAIN_CODE_STEP (0x0088 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_GAIN_TYPE (0x008a | CCS_FL_16BIT)
-#define CCS_R_ANALOG_GAIN_M0 (0x008c | CCS_FL_16BIT)
-#define CCS_R_ANALOG_GAIN_C0 (0x008e | CCS_FL_16BIT)
-#define CCS_R_ANALOG_GAIN_M1 (0x0090 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_GAIN_C1 (0x0092 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_LINEAR_GAIN_MIN (0x0094 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_LINEAR_GAIN_MAX (0x0096 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_LINEAR_GAIN_STEP_SIZE (0x0098 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_EXPONENTIAL_GAIN_MIN (0x009a | CCS_FL_16BIT)
-#define CCS_R_ANALOG_EXPONENTIAL_GAIN_MAX (0x009c | CCS_FL_16BIT)
-#define CCS_R_ANALOG_EXPONENTIAL_GAIN_STEP_SIZE (0x009e | CCS_FL_16BIT)
-#define CCS_R_DATA_FORMAT_MODEL_TYPE 0x00c0
+#define CCS_R_ANALOG_GAIN_CODE_MIN CCI_REG16(0x0084)
+#define CCS_R_ANALOG_GAIN_CODE_MAX CCI_REG16(0x0086)
+#define CCS_R_ANALOG_GAIN_CODE_STEP CCI_REG16(0x0088)
+#define CCS_R_ANALOG_GAIN_TYPE CCI_REG16(0x008a)
+#define CCS_R_ANALOG_GAIN_M0 CCI_REG16(0x008c)
+#define CCS_R_ANALOG_GAIN_C0 CCI_REG16(0x008e)
+#define CCS_R_ANALOG_GAIN_M1 CCI_REG16(0x0090)
+#define CCS_R_ANALOG_GAIN_C1 CCI_REG16(0x0092)
+#define CCS_R_ANALOG_LINEAR_GAIN_MIN CCI_REG16(0x0094)
+#define CCS_R_ANALOG_LINEAR_GAIN_MAX CCI_REG16(0x0096)
+#define CCS_R_ANALOG_LINEAR_GAIN_STEP_SIZE CCI_REG16(0x0098)
+#define CCS_R_ANALOG_EXPONENTIAL_GAIN_MIN CCI_REG16(0x009a)
+#define CCS_R_ANALOG_EXPONENTIAL_GAIN_MAX CCI_REG16(0x009c)
+#define CCS_R_ANALOG_EXPONENTIAL_GAIN_STEP_SIZE CCI_REG16(0x009e)
+#define CCS_R_DATA_FORMAT_MODEL_TYPE CCI_REG8(0x00c0)
#define CCS_DATA_FORMAT_MODEL_TYPE_NORMAL 1U
#define CCS_DATA_FORMAT_MODEL_TYPE_EXTENDED 2U
-#define CCS_R_DATA_FORMAT_MODEL_SUBTYPE 0x00c1
+#define CCS_R_DATA_FORMAT_MODEL_SUBTYPE CCI_REG8(0x00c1)
#define CCS_DATA_FORMAT_MODEL_SUBTYPE_ROWS_SHIFT 0U
#define CCS_DATA_FORMAT_MODEL_SUBTYPE_ROWS_MASK 0xf
#define CCS_DATA_FORMAT_MODEL_SUBTYPE_COLUMNS_SHIFT 4U
#define CCS_DATA_FORMAT_MODEL_SUBTYPE_COLUMNS_MASK 0xf0
-#define CCS_R_DATA_FORMAT_DESCRIPTOR(n) ((0x00c2 | CCS_FL_16BIT) + (n) * 2)
+#define CCS_R_DATA_FORMAT_DESCRIPTOR(n) CCI_REG16(0x00c2 + (n) * 2)
#define CCS_LIM_DATA_FORMAT_DESCRIPTOR_MIN_N 0U
#define CCS_LIM_DATA_FORMAT_DESCRIPTOR_MAX_N 15U
#define CCS_DATA_FORMAT_DESCRIPTOR_COMPRESSED_SHIFT 0U
#define CCS_DATA_FORMAT_DESCRIPTOR_COMPRESSED_MASK 0xff
#define CCS_DATA_FORMAT_DESCRIPTOR_UNCOMPRESSED_SHIFT 8U
#define CCS_DATA_FORMAT_DESCRIPTOR_UNCOMPRESSED_MASK 0xff00
-#define CCS_R_MODE_SELECT 0x0100
+#define CCS_R_MODE_SELECT CCI_REG8(0x0100)
#define CCS_MODE_SELECT_SOFTWARE_STANDBY 0U
#define CCS_MODE_SELECT_STREAMING 1U
-#define CCS_R_IMAGE_ORIENTATION 0x0101
+#define CCS_R_IMAGE_ORIENTATION CCI_REG8(0x0101)
#define CCS_IMAGE_ORIENTATION_HORIZONTAL_MIRROR BIT(0)
#define CCS_IMAGE_ORIENTATION_VERTICAL_FLIP BIT(1)
-#define CCS_R_SOFTWARE_RESET 0x0103
+#define CCS_R_SOFTWARE_RESET CCI_REG8(0x0103)
#define CCS_SOFTWARE_RESET_OFF 0U
#define CCS_SOFTWARE_RESET_ON 1U
-#define CCS_R_GROUPED_PARAMETER_HOLD 0x0104
-#define CCS_R_MASK_CORRUPTED_FRAMES 0x0105
+#define CCS_R_GROUPED_PARAMETER_HOLD CCI_REG8(0x0104)
+#define CCS_R_MASK_CORRUPTED_FRAMES CCI_REG8(0x0105)
#define CCS_MASK_CORRUPTED_FRAMES_ALLOW 0U
#define CCS_MASK_CORRUPTED_FRAMES_MASK 1U
-#define CCS_R_FAST_STANDBY_CTRL 0x0106
+#define CCS_R_FAST_STANDBY_CTRL CCI_REG8(0x0106)
#define CCS_FAST_STANDBY_CTRL_COMPLETE_FRAMES 0U
#define CCS_FAST_STANDBY_CTRL_FRAME_TRUNCATION 1U
-#define CCS_R_CCI_ADDRESS_CTRL 0x0107
-#define CCS_R_2ND_CCI_IF_CTRL 0x0108
+#define CCS_R_CCI_ADDRESS_CTRL CCI_REG8(0x0107)
+#define CCS_R_2ND_CCI_IF_CTRL CCI_REG8(0x0108)
#define CCS_2ND_CCI_IF_CTRL_ENABLE BIT(0)
#define CCS_2ND_CCI_IF_CTRL_ACK BIT(1)
-#define CCS_R_2ND_CCI_ADDRESS_CTRL 0x0109
-#define CCS_R_CSI_CHANNEL_IDENTIFIER 0x0110
-#define CCS_R_CSI_SIGNALING_MODE 0x0111
+#define CCS_R_2ND_CCI_ADDRESS_CTRL CCI_REG8(0x0109)
+#define CCS_R_CSI_CHANNEL_IDENTIFIER CCI_REG8(0x0110)
+#define CCS_R_CSI_SIGNALING_MODE CCI_REG8(0x0111)
#define CCS_CSI_SIGNALING_MODE_CSI_2_DPHY 2U
#define CCS_CSI_SIGNALING_MODE_CSI_2_CPHY 3U
-#define CCS_R_CSI_DATA_FORMAT (0x0112 | CCS_FL_16BIT)
-#define CCS_R_CSI_LANE_MODE 0x0114
-#define CCS_R_DPCM_FRAME_DT 0x011d
-#define CCS_R_BOTTOM_EMBEDDED_DATA_DT 0x011e
-#define CCS_R_BOTTOM_EMBEDDED_DATA_VC 0x011f
-#define CCS_R_GAIN_MODE 0x0120
+#define CCS_R_CSI_DATA_FORMAT CCI_REG16(0x0112)
+#define CCS_R_CSI_LANE_MODE CCI_REG8(0x0114)
+#define CCS_R_DPCM_FRAME_DT CCI_REG8(0x011d)
+#define CCS_R_BOTTOM_EMBEDDED_DATA_DT CCI_REG8(0x011e)
+#define CCS_R_BOTTOM_EMBEDDED_DATA_VC CCI_REG8(0x011f)
+#define CCS_R_GAIN_MODE CCI_REG8(0x0120)
#define CCS_GAIN_MODE_GLOBAL 0U
#define CCS_GAIN_MODE_ALTERNATE 1U
-#define CCS_R_ADC_BIT_DEPTH 0x0121
-#define CCS_R_EMB_DATA_CTRL 0x0122
+#define CCS_R_ADC_BIT_DEPTH CCI_REG8(0x0121)
+#define CCS_R_EMB_DATA_CTRL CCI_REG8(0x0122)
#define CCS_EMB_DATA_CTRL_RAW8_PACKING_FOR_RAW16 BIT(0)
#define CCS_EMB_DATA_CTRL_RAW10_PACKING_FOR_RAW20 BIT(1)
#define CCS_EMB_DATA_CTRL_RAW12_PACKING_FOR_RAW24 BIT(2)
-#define CCS_R_GPIO_TRIG_MODE 0x0130
-#define CCS_R_EXTCLK_FREQUENCY_MHZ (0x0136 | (CCS_FL_16BIT | CCS_FL_IREAL))
-#define CCS_R_TEMP_SENSOR_CTRL 0x0138
+#define CCS_R_GPIO_TRIG_MODE CCI_REG8(0x0130)
+#define CCS_R_EXTCLK_FREQUENCY_MHZ (CCI_REG16(0x0136) | CCS_FL_IREAL)
+#define CCS_R_TEMP_SENSOR_CTRL CCI_REG8(0x0138)
#define CCS_TEMP_SENSOR_CTRL_ENABLE BIT(0)
-#define CCS_R_TEMP_SENSOR_MODE 0x0139
-#define CCS_R_TEMP_SENSOR_OUTPUT 0x013a
-#define CCS_R_FINE_INTEGRATION_TIME (0x0200 | CCS_FL_16BIT)
-#define CCS_R_COARSE_INTEGRATION_TIME (0x0202 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_GAIN_CODE_GLOBAL (0x0204 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_LINEAR_GAIN_GLOBAL (0x0206 | CCS_FL_16BIT)
-#define CCS_R_ANALOG_EXPONENTIAL_GAIN_GLOBAL (0x0208 | CCS_FL_16BIT)
-#define CCS_R_DIGITAL_GAIN_GLOBAL (0x020e | CCS_FL_16BIT)
-#define CCS_R_SHORT_ANALOG_GAIN_GLOBAL (0x0216 | CCS_FL_16BIT)
-#define CCS_R_SHORT_DIGITAL_GAIN_GLOBAL (0x0218 | CCS_FL_16BIT)
-#define CCS_R_HDR_MODE 0x0220
+#define CCS_R_TEMP_SENSOR_MODE CCI_REG8(0x0139)
+#define CCS_R_TEMP_SENSOR_OUTPUT CCI_REG8(0x013a)
+#define CCS_R_FINE_INTEGRATION_TIME CCI_REG16(0x0200)
+#define CCS_R_COARSE_INTEGRATION_TIME CCI_REG16(0x0202)
+#define CCS_R_ANALOG_GAIN_CODE_GLOBAL CCI_REG16(0x0204)
+#define CCS_R_ANALOG_LINEAR_GAIN_GLOBAL CCI_REG16(0x0206)
+#define CCS_R_ANALOG_EXPONENTIAL_GAIN_GLOBAL CCI_REG16(0x0208)
+#define CCS_R_DIGITAL_GAIN_GLOBAL CCI_REG16(0x020e)
+#define CCS_R_SHORT_ANALOG_GAIN_GLOBAL CCI_REG16(0x0216)
+#define CCS_R_SHORT_DIGITAL_GAIN_GLOBAL CCI_REG16(0x0218)
+#define CCS_R_HDR_MODE CCI_REG8(0x0220)
#define CCS_HDR_MODE_ENABLED BIT(0)
#define CCS_HDR_MODE_SEPARATE_ANALOG_GAIN BIT(1)
#define CCS_HDR_MODE_UPSCALING BIT(2)
@@ -189,421 +189,421 @@
#define CCS_HDR_MODE_TIMING_MODE BIT(4)
#define CCS_HDR_MODE_EXPOSURE_CTRL_DIRECT BIT(5)
#define CCS_HDR_MODE_SEPARATE_DIGITAL_GAIN BIT(6)
-#define CCS_R_HDR_RESOLUTION_REDUCTION 0x0221
+#define CCS_R_HDR_RESOLUTION_REDUCTION CCI_REG8(0x0221)
#define CCS_HDR_RESOLUTION_REDUCTION_ROW_SHIFT 0U
#define CCS_HDR_RESOLUTION_REDUCTION_ROW_MASK 0xf
#define CCS_HDR_RESOLUTION_REDUCTION_COLUMN_SHIFT 4U
#define CCS_HDR_RESOLUTION_REDUCTION_COLUMN_MASK 0xf0
-#define CCS_R_EXPOSURE_RATIO 0x0222
-#define CCS_R_HDR_INTERNAL_BIT_DEPTH 0x0223
-#define CCS_R_DIRECT_SHORT_INTEGRATION_TIME (0x0224 | CCS_FL_16BIT)
-#define CCS_R_SHORT_ANALOG_LINEAR_GAIN_GLOBAL (0x0226 | CCS_FL_16BIT)
-#define CCS_R_SHORT_ANALOG_EXPONENTIAL_GAIN_GLOBAL (0x0228 | CCS_FL_16BIT)
-#define CCS_R_VT_PIX_CLK_DIV (0x0300 | CCS_FL_16BIT)
-#define CCS_R_VT_SYS_CLK_DIV (0x0302 | CCS_FL_16BIT)
-#define CCS_R_PRE_PLL_CLK_DIV (0x0304 | CCS_FL_16BIT)
-#define CCS_R_PLL_MULTIPLIER (0x0306 | CCS_FL_16BIT)
-#define CCS_R_OP_PIX_CLK_DIV (0x0308 | CCS_FL_16BIT)
-#define CCS_R_OP_SYS_CLK_DIV (0x030a | CCS_FL_16BIT)
-#define CCS_R_OP_PRE_PLL_CLK_DIV (0x030c | CCS_FL_16BIT)
-#define CCS_R_OP_PLL_MULTIPLIER (0x030e | CCS_FL_16BIT)
-#define CCS_R_PLL_MODE 0x0310
+#define CCS_R_EXPOSURE_RATIO CCI_REG8(0x0222)
+#define CCS_R_HDR_INTERNAL_BIT_DEPTH CCI_REG8(0x0223)
+#define CCS_R_DIRECT_SHORT_INTEGRATION_TIME CCI_REG16(0x0224)
+#define CCS_R_SHORT_ANALOG_LINEAR_GAIN_GLOBAL CCI_REG16(0x0226)
+#define CCS_R_SHORT_ANALOG_EXPONENTIAL_GAIN_GLOBAL CCI_REG16(0x0228)
+#define CCS_R_VT_PIX_CLK_DIV CCI_REG16(0x0300)
+#define CCS_R_VT_SYS_CLK_DIV CCI_REG16(0x0302)
+#define CCS_R_PRE_PLL_CLK_DIV CCI_REG16(0x0304)
+#define CCS_R_PLL_MULTIPLIER CCI_REG16(0x0306)
+#define CCS_R_OP_PIX_CLK_DIV CCI_REG16(0x0308)
+#define CCS_R_OP_SYS_CLK_DIV CCI_REG16(0x030a)
+#define CCS_R_OP_PRE_PLL_CLK_DIV CCI_REG16(0x030c)
+#define CCS_R_OP_PLL_MULTIPLIER CCI_REG16(0x030e)
+#define CCS_R_PLL_MODE CCI_REG8(0x0310)
#define CCS_PLL_MODE_SHIFT 0U
#define CCS_PLL_MODE_MASK 0x1
#define CCS_PLL_MODE_SINGLE 0U
#define CCS_PLL_MODE_DUAL 1U
-#define CCS_R_OP_PIX_CLK_DIV_REV (0x0312 | CCS_FL_16BIT)
-#define CCS_R_OP_SYS_CLK_DIV_REV (0x0314 | CCS_FL_16BIT)
-#define CCS_R_FRAME_LENGTH_LINES (0x0340 | CCS_FL_16BIT)
-#define CCS_R_LINE_LENGTH_PCK (0x0342 | CCS_FL_16BIT)
-#define CCS_R_X_ADDR_START (0x0344 | CCS_FL_16BIT)
-#define CCS_R_Y_ADDR_START (0x0346 | CCS_FL_16BIT)
-#define CCS_R_X_ADDR_END (0x0348 | CCS_FL_16BIT)
-#define CCS_R_Y_ADDR_END (0x034a | CCS_FL_16BIT)
-#define CCS_R_X_OUTPUT_SIZE (0x034c | CCS_FL_16BIT)
-#define CCS_R_Y_OUTPUT_SIZE (0x034e | CCS_FL_16BIT)
-#define CCS_R_FRAME_LENGTH_CTRL 0x0350
+#define CCS_R_OP_PIX_CLK_DIV_REV CCI_REG16(0x0312)
+#define CCS_R_OP_SYS_CLK_DIV_REV CCI_REG16(0x0314)
+#define CCS_R_FRAME_LENGTH_LINES CCI_REG16(0x0340)
+#define CCS_R_LINE_LENGTH_PCK CCI_REG16(0x0342)
+#define CCS_R_X_ADDR_START CCI_REG16(0x0344)
+#define CCS_R_Y_ADDR_START CCI_REG16(0x0346)
+#define CCS_R_X_ADDR_END CCI_REG16(0x0348)
+#define CCS_R_Y_ADDR_END CCI_REG16(0x034a)
+#define CCS_R_X_OUTPUT_SIZE CCI_REG16(0x034c)
+#define CCS_R_Y_OUTPUT_SIZE CCI_REG16(0x034e)
+#define CCS_R_FRAME_LENGTH_CTRL CCI_REG8(0x0350)
#define CCS_FRAME_LENGTH_CTRL_AUTOMATIC BIT(0)
-#define CCS_R_TIMING_MODE_CTRL 0x0352
+#define CCS_R_TIMING_MODE_CTRL CCI_REG8(0x0352)
#define CCS_TIMING_MODE_CTRL_MANUAL_READOUT BIT(0)
#define CCS_TIMING_MODE_CTRL_DELAYED_EXPOSURE BIT(1)
-#define CCS_R_START_READOUT_RS 0x0353
+#define CCS_R_START_READOUT_RS CCI_REG8(0x0353)
#define CCS_START_READOUT_RS_MANUAL_READOUT_START BIT(0)
-#define CCS_R_FRAME_MARGIN (0x0354 | CCS_FL_16BIT)
-#define CCS_R_X_EVEN_INC (0x0380 | CCS_FL_16BIT)
-#define CCS_R_X_ODD_INC (0x0382 | CCS_FL_16BIT)
-#define CCS_R_Y_EVEN_INC (0x0384 | CCS_FL_16BIT)
-#define CCS_R_Y_ODD_INC (0x0386 | CCS_FL_16BIT)
-#define CCS_R_MONOCHROME_EN 0x0390
+#define CCS_R_FRAME_MARGIN CCI_REG16(0x0354)
+#define CCS_R_X_EVEN_INC CCI_REG16(0x0380)
+#define CCS_R_X_ODD_INC CCI_REG16(0x0382)
+#define CCS_R_Y_EVEN_INC CCI_REG16(0x0384)
+#define CCS_R_Y_ODD_INC CCI_REG16(0x0386)
+#define CCS_R_MONOCHROME_EN CCI_REG8(0x0390)
#define CCS_MONOCHROME_EN_ENABLED 0U
-#define CCS_R_SCALING_MODE (0x0400 | CCS_FL_16BIT)
+#define CCS_R_SCALING_MODE CCI_REG16(0x0400)
#define CCS_SCALING_MODE_NO_SCALING 0U
#define CCS_SCALING_MODE_HORIZONTAL 1U
-#define CCS_R_SCALE_M (0x0404 | CCS_FL_16BIT)
-#define CCS_R_SCALE_N (0x0406 | CCS_FL_16BIT)
-#define CCS_R_DIGITAL_CROP_X_OFFSET (0x0408 | CCS_FL_16BIT)
-#define CCS_R_DIGITAL_CROP_Y_OFFSET (0x040a | CCS_FL_16BIT)
-#define CCS_R_DIGITAL_CROP_IMAGE_WIDTH (0x040c | CCS_FL_16BIT)
-#define CCS_R_DIGITAL_CROP_IMAGE_HEIGHT (0x040e | CCS_FL_16BIT)
-#define CCS_R_COMPRESSION_MODE (0x0500 | CCS_FL_16BIT)
+#define CCS_R_SCALE_M CCI_REG16(0x0404)
+#define CCS_R_SCALE_N CCI_REG16(0x0406)
+#define CCS_R_DIGITAL_CROP_X_OFFSET CCI_REG16(0x0408)
+#define CCS_R_DIGITAL_CROP_Y_OFFSET CCI_REG16(0x040a)
+#define CCS_R_DIGITAL_CROP_IMAGE_WIDTH CCI_REG16(0x040c)
+#define CCS_R_DIGITAL_CROP_IMAGE_HEIGHT CCI_REG16(0x040e)
+#define CCS_R_COMPRESSION_MODE CCI_REG16(0x0500)
#define CCS_COMPRESSION_MODE_NONE 0U
#define CCS_COMPRESSION_MODE_DPCM_PCM_SIMPLE 1U
-#define CCS_R_TEST_PATTERN_MODE (0x0600 | CCS_FL_16BIT)
+#define CCS_R_TEST_PATTERN_MODE CCI_REG16(0x0600)
#define CCS_TEST_PATTERN_MODE_NONE 0U
#define CCS_TEST_PATTERN_MODE_SOLID_COLOR 1U
#define CCS_TEST_PATTERN_MODE_COLOR_BARS 2U
#define CCS_TEST_PATTERN_MODE_FADE_TO_GREY 3U
#define CCS_TEST_PATTERN_MODE_PN9 4U
#define CCS_TEST_PATTERN_MODE_COLOR_TILE 5U
-#define CCS_R_TEST_DATA_RED (0x0602 | CCS_FL_16BIT)
-#define CCS_R_TEST_DATA_GREENR (0x0604 | CCS_FL_16BIT)
-#define CCS_R_TEST_DATA_BLUE (0x0606 | CCS_FL_16BIT)
-#define CCS_R_TEST_DATA_GREENB (0x0608 | CCS_FL_16BIT)
-#define CCS_R_VALUE_STEP_SIZE_SMOOTH 0x060a
-#define CCS_R_VALUE_STEP_SIZE_QUANTISED 0x060b
-#define CCS_R_TCLK_POST 0x0800
-#define CCS_R_THS_PREPARE 0x0801
-#define CCS_R_THS_ZERO_MIN 0x0802
-#define CCS_R_THS_TRAIL 0x0803
-#define CCS_R_TCLK_TRAIL_MIN 0x0804
-#define CCS_R_TCLK_PREPARE 0x0805
-#define CCS_R_TCLK_ZERO 0x0806
-#define CCS_R_TLPX 0x0807
-#define CCS_R_PHY_CTRL 0x0808
+#define CCS_R_TEST_DATA_RED CCI_REG16(0x0602)
+#define CCS_R_TEST_DATA_GREENR CCI_REG16(0x0604)
+#define CCS_R_TEST_DATA_BLUE CCI_REG16(0x0606)
+#define CCS_R_TEST_DATA_GREENB CCI_REG16(0x0608)
+#define CCS_R_VALUE_STEP_SIZE_SMOOTH CCI_REG8(0x060a)
+#define CCS_R_VALUE_STEP_SIZE_QUANTISED CCI_REG8(0x060b)
+#define CCS_R_TCLK_POST CCI_REG8(0x0800)
+#define CCS_R_THS_PREPARE CCI_REG8(0x0801)
+#define CCS_R_THS_ZERO_MIN CCI_REG8(0x0802)
+#define CCS_R_THS_TRAIL CCI_REG8(0x0803)
+#define CCS_R_TCLK_TRAIL_MIN CCI_REG8(0x0804)
+#define CCS_R_TCLK_PREPARE CCI_REG8(0x0805)
+#define CCS_R_TCLK_ZERO CCI_REG8(0x0806)
+#define CCS_R_TLPX CCI_REG8(0x0807)
+#define CCS_R_PHY_CTRL CCI_REG8(0x0808)
#define CCS_PHY_CTRL_AUTO 0U
#define CCS_PHY_CTRL_UI 1U
#define CCS_PHY_CTRL_MANUAL 2U
-#define CCS_R_TCLK_POST_EX (0x080a | CCS_FL_16BIT)
-#define CCS_R_THS_PREPARE_EX (0x080c | CCS_FL_16BIT)
-#define CCS_R_THS_ZERO_MIN_EX (0x080e | CCS_FL_16BIT)
-#define CCS_R_THS_TRAIL_EX (0x0810 | CCS_FL_16BIT)
-#define CCS_R_TCLK_TRAIL_MIN_EX (0x0812 | CCS_FL_16BIT)
-#define CCS_R_TCLK_PREPARE_EX (0x0814 | CCS_FL_16BIT)
-#define CCS_R_TCLK_ZERO_EX (0x0816 | CCS_FL_16BIT)
-#define CCS_R_TLPX_EX (0x0818 | CCS_FL_16BIT)
-#define CCS_R_REQUESTED_LINK_RATE (0x0820 | CCS_FL_32BIT)
-#define CCS_R_DPHY_EQUALIZATION_MODE 0x0824
+#define CCS_R_TCLK_POST_EX CCI_REG16(0x080a)
+#define CCS_R_THS_PREPARE_EX CCI_REG16(0x080c)
+#define CCS_R_THS_ZERO_MIN_EX CCI_REG16(0x080e)
+#define CCS_R_THS_TRAIL_EX CCI_REG16(0x0810)
+#define CCS_R_TCLK_TRAIL_MIN_EX CCI_REG16(0x0812)
+#define CCS_R_TCLK_PREPARE_EX CCI_REG16(0x0814)
+#define CCS_R_TCLK_ZERO_EX CCI_REG16(0x0816)
+#define CCS_R_TLPX_EX CCI_REG16(0x0818)
+#define CCS_R_REQUESTED_LINK_RATE CCI_REG32(0x0820)
+#define CCS_R_DPHY_EQUALIZATION_MODE CCI_REG8(0x0824)
#define CCS_DPHY_EQUALIZATION_MODE_EQ2 BIT(0)
-#define CCS_R_PHY_EQUALIZATION_CTRL 0x0825
+#define CCS_R_PHY_EQUALIZATION_CTRL CCI_REG8(0x0825)
#define CCS_PHY_EQUALIZATION_CTRL_ENABLE BIT(0)
-#define CCS_R_DPHY_PREAMBLE_CTRL 0x0826
+#define CCS_R_DPHY_PREAMBLE_CTRL CCI_REG8(0x0826)
#define CCS_DPHY_PREAMBLE_CTRL_ENABLE BIT(0)
-#define CCS_R_DPHY_PREAMBLE_LENGTH 0x0826
-#define CCS_R_PHY_SSC_CTRL 0x0828
+#define CCS_R_DPHY_PREAMBLE_LENGTH CCI_REG8(0x0826)
+#define CCS_R_PHY_SSC_CTRL CCI_REG8(0x0828)
#define CCS_PHY_SSC_CTRL_ENABLE BIT(0)
-#define CCS_R_MANUAL_LP_CTRL 0x0829
+#define CCS_R_MANUAL_LP_CTRL CCI_REG8(0x0829)
#define CCS_MANUAL_LP_CTRL_ENABLE BIT(0)
-#define CCS_R_TWAKEUP 0x082a
-#define CCS_R_TINIT 0x082b
-#define CCS_R_THS_EXIT 0x082c
-#define CCS_R_THS_EXIT_EX (0x082e | CCS_FL_16BIT)
-#define CCS_R_PHY_PERIODIC_CALIBRATION_CTRL 0x0830
+#define CCS_R_TWAKEUP CCI_REG8(0x082a)
+#define CCS_R_TINIT CCI_REG8(0x082b)
+#define CCS_R_THS_EXIT CCI_REG8(0x082c)
+#define CCS_R_THS_EXIT_EX CCI_REG16(0x082e)
+#define CCS_R_PHY_PERIODIC_CALIBRATION_CTRL CCI_REG8(0x0830)
#define CCS_PHY_PERIODIC_CALIBRATION_CTRL_FRAME_BLANKING BIT(0)
-#define CCS_R_PHY_PERIODIC_CALIBRATION_INTERVAL 0x0831
-#define CCS_R_PHY_INIT_CALIBRATION_CTRL 0x0832
+#define CCS_R_PHY_PERIODIC_CALIBRATION_INTERVAL CCI_REG8(0x0831)
+#define CCS_R_PHY_INIT_CALIBRATION_CTRL CCI_REG8(0x0832)
#define CCS_PHY_INIT_CALIBRATION_CTRL_STREAM_START BIT(0)
-#define CCS_R_DPHY_CALIBRATION_MODE 0x0833
+#define CCS_R_DPHY_CALIBRATION_MODE CCI_REG8(0x0833)
#define CCS_DPHY_CALIBRATION_MODE_ALSO_ALTERNATE BIT(0)
-#define CCS_R_CPHY_CALIBRATION_MODE 0x0834
+#define CCS_R_CPHY_CALIBRATION_MODE CCI_REG8(0x0834)
#define CCS_CPHY_CALIBRATION_MODE_FORMAT_1 0U
#define CCS_CPHY_CALIBRATION_MODE_FORMAT_2 1U
#define CCS_CPHY_CALIBRATION_MODE_FORMAT_3 2U
-#define CCS_R_T3_CALPREAMBLE_LENGTH 0x0835
-#define CCS_R_T3_CALPREAMBLE_LENGTH_PER 0x0836
-#define CCS_R_T3_CALALTSEQ_LENGTH 0x0837
-#define CCS_R_T3_CALALTSEQ_LENGTH_PER 0x0838
-#define CCS_R_FM2_INIT_SEED (0x083a | CCS_FL_16BIT)
-#define CCS_R_T3_CALUDEFSEQ_LENGTH (0x083c | CCS_FL_16BIT)
-#define CCS_R_T3_CALUDEFSEQ_LENGTH_PER (0x083e | CCS_FL_16BIT)
-#define CCS_R_TGR_PREAMBLE_LENGTH 0x0841
+#define CCS_R_T3_CALPREAMBLE_LENGTH CCI_REG8(0x0835)
+#define CCS_R_T3_CALPREAMBLE_LENGTH_PER CCI_REG8(0x0836)
+#define CCS_R_T3_CALALTSEQ_LENGTH CCI_REG8(0x0837)
+#define CCS_R_T3_CALALTSEQ_LENGTH_PER CCI_REG8(0x0838)
+#define CCS_R_FM2_INIT_SEED CCI_REG16(0x083a)
+#define CCS_R_T3_CALUDEFSEQ_LENGTH CCI_REG16(0x083c)
+#define CCS_R_T3_CALUDEFSEQ_LENGTH_PER CCI_REG16(0x083e)
+#define CCS_R_TGR_PREAMBLE_LENGTH CCI_REG8(0x0841)
#define CCS_TGR_PREAMBLE_LENGTH_PREAMABLE_PROG_SEQ BIT(7)
#define CCS_TGR_PREAMBLE_LENGTH_BEGIN_PREAMBLE_LENGTH_SHIFT 0U
#define CCS_TGR_PREAMBLE_LENGTH_BEGIN_PREAMBLE_LENGTH_MASK 0x3f
-#define CCS_R_TGR_POST_LENGTH 0x0842
+#define CCS_R_TGR_POST_LENGTH CCI_REG8(0x0842)
#define CCS_TGR_POST_LENGTH_POST_LENGTH_SHIFT 0U
#define CCS_TGR_POST_LENGTH_POST_LENGTH_MASK 0x1f
-#define CCS_R_TGR_PREAMBLE_PROG_SEQUENCE(n2) (0x0843 + (n2))
+#define CCS_