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-rw-r--r--drivers/pinctrl/intel/Kconfig49
-rw-r--r--drivers/pinctrl/intel/Kconfig.tng33
-rw-r--r--drivers/pinctrl/intel/Makefile1
-rw-r--r--drivers/pinctrl/intel/pinctrl-alderlake.c1
-rw-r--r--drivers/pinctrl/intel/pinctrl-baytrail.c135
-rw-r--r--drivers/pinctrl/intel/pinctrl-broxton.c1
-rw-r--r--drivers/pinctrl/intel/pinctrl-cannonlake.c2
-rw-r--r--drivers/pinctrl/intel/pinctrl-cedarfork.c1
-rw-r--r--drivers/pinctrl/intel/pinctrl-cherryview.c84
-rw-r--r--drivers/pinctrl/intel/pinctrl-denverton.c1
-rw-r--r--drivers/pinctrl/intel/pinctrl-elkhartlake.c2
-rw-r--r--drivers/pinctrl/intel/pinctrl-emmitsburg.c2
-rw-r--r--drivers/pinctrl/intel/pinctrl-geminilake.c1
-rw-r--r--drivers/pinctrl/intel/pinctrl-icelake.c2
-rw-r--r--drivers/pinctrl/intel/pinctrl-intel.c36
-rw-r--r--drivers/pinctrl/intel/pinctrl-intel.h12
-rw-r--r--drivers/pinctrl/intel/pinctrl-jasperlake.c1
-rw-r--r--drivers/pinctrl/intel/pinctrl-lakefield.c1
-rw-r--r--drivers/pinctrl/intel/pinctrl-lewisburg.c2
-rw-r--r--drivers/pinctrl/intel/pinctrl-lynxpoint.c93
-rw-r--r--drivers/pinctrl/intel/pinctrl-merrifield.c677
-rw-r--r--drivers/pinctrl/intel/pinctrl-meteorlake.c1
-rw-r--r--drivers/pinctrl/intel/pinctrl-moorefield.c640
-rw-r--r--drivers/pinctrl/intel/pinctrl-sunrisepoint.c1
-rw-r--r--drivers/pinctrl/intel/pinctrl-tangier.c589
-rw-r--r--drivers/pinctrl/intel/pinctrl-tangier.h92
-rw-r--r--drivers/pinctrl/intel/pinctrl-tigerlake.c2
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-armada-37xx.c14
-rw-r--r--drivers/pinctrl/pinctrl-at91.c10
-rw-r--r--drivers/pinctrl/renesas/core.c16
-rw-r--r--drivers/pinctrl/tegra/pinctrl-tegra.c5
-rw-r--r--drivers/pinctrl/tegra/pinctrl-tegra210.c2
-rw-r--r--include/linux/pm.h9
33 files changed, 905 insertions, 1613 deletions
diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig
index b3ec00624416..d66f4f6932d8 100644
--- a/drivers/pinctrl/intel/Kconfig
+++ b/drivers/pinctrl/intel/Kconfig
@@ -1,11 +1,10 @@
# SPDX-License-Identifier: GPL-2.0
# Intel pin control drivers
menu "Intel pinctrl drivers"
- depends on X86 || COMPILE_TEST
+ depends on ACPI && (X86 || COMPILE_TEST)
config PINCTRL_BAYTRAIL
bool "Intel Baytrail GPIO pin control"
- depends on ACPI
select PINCTRL_INTEL
help
driver for memory mapped GPIO functionality on Intel Baytrail
@@ -17,7 +16,6 @@ config PINCTRL_BAYTRAIL
config PINCTRL_CHERRYVIEW
tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
Cherryview/Braswell pinctrl driver provides an interface that
@@ -25,39 +23,12 @@ config PINCTRL_CHERRYVIEW
config PINCTRL_LYNXPOINT
tristate "Intel Lynxpoint pinctrl and GPIO driver"
- depends on ACPI
- select PINMUX
- select PINCONF
- select GENERIC_PINCONF
- select GPIOLIB
- select GPIOLIB_IRQCHIP
+ select PINCTRL_INTEL
help
Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
provides an interface that allows configuring of PCH pins and
using them as GPIOs.
-config PINCTRL_MERRIFIELD
- tristate "Intel Merrifield pinctrl driver"
- depends on X86_INTEL_MID
- select PINMUX
- select PINCONF
- select GENERIC_PINCONF
- help
- Merrifield Family-Level Interface Shim (FLIS) driver provides an
- interface that allows configuring of SoC pins and using them as
- GPIOs.
-
-config PINCTRL_MOOREFIELD
- tristate "Intel Moorefield pinctrl driver"
- depends on X86_INTEL_MID
- select PINMUX
- select PINCONF
- select GENERIC_PINCONF
- help
- Moorefield Family-Level Interface Shim (FLIS) driver provides an
- interface that allows configuring of SoC pins and using them as
- GPIOs.
-
config PINCTRL_INTEL
tristate
select PINMUX
@@ -68,7 +39,6 @@ config PINCTRL_INTEL
config PINCTRL_ALDERLAKE
tristate "Intel Alder Lake pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -76,7 +46,6 @@ config PINCTRL_ALDERLAKE
config PINCTRL_BROXTON
tristate "Intel Broxton pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
Broxton pinctrl driver provides an interface that allows
@@ -84,7 +53,6 @@ config PINCTRL_BROXTON
config PINCTRL_CANNONLAKE
tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -92,7 +60,6 @@ config PINCTRL_CANNONLAKE
config PINCTRL_CEDARFORK
tristate "Intel Cedar Fork pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -100,7 +67,6 @@ config PINCTRL_CEDARFORK
config PINCTRL_DENVERTON
tristate "Intel Denverton pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -108,7 +74,6 @@ config PINCTRL_DENVERTON
config PINCTRL_ELKHARTLAKE
tristate "Intel Elkhart Lake SoC pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -116,7 +81,6 @@ config PINCTRL_ELKHARTLAKE
config PINCTRL_EMMITSBURG
tristate "Intel Emmitsburg pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -124,7 +88,6 @@ config PINCTRL_EMMITSBURG
config PINCTRL_GEMINILAKE
tristate "Intel Gemini Lake SoC pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -132,7 +95,6 @@ config PINCTRL_GEMINILAKE
config PINCTRL_ICELAKE
tristate "Intel Ice Lake PCH pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -140,7 +102,6 @@ config PINCTRL_ICELAKE
config PINCTRL_JASPERLAKE
tristate "Intel Jasper Lake PCH pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -148,7 +109,6 @@ config PINCTRL_JASPERLAKE
config PINCTRL_LAKEFIELD
tristate "Intel Lakefield SoC pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -156,7 +116,6 @@ config PINCTRL_LAKEFIELD
config PINCTRL_LEWISBURG
tristate "Intel Lewisburg pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -164,7 +123,6 @@ config PINCTRL_LEWISBURG
config PINCTRL_METEORLAKE
tristate "Intel Meteor Lake pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
@@ -172,7 +130,6 @@ config PINCTRL_METEORLAKE
config PINCTRL_SUNRISEPOINT
tristate "Intel Sunrisepoint pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
@@ -181,10 +138,10 @@ config PINCTRL_SUNRISEPOINT
config PINCTRL_TIGERLAKE
tristate "Intel Tiger Lake pinctrl and GPIO driver"
- depends on ACPI
select PINCTRL_INTEL
help
This pinctrl driver provides an interface that allows configuring
of Intel Tiger Lake PCH pins and using them as GPIOs.
+source "drivers/pinctrl/intel/Kconfig.tng"
endmenu
diff --git a/drivers/pinctrl/intel/Kconfig.tng b/drivers/pinctrl/intel/Kconfig.tng
new file mode 100644
index 000000000000..6f88a64d260c
--- /dev/null
+++ b/drivers/pinctrl/intel/Kconfig.tng
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: GPL-2.0-only
+# Intel Tangier and compatible pin control drivers
+
+if X86_INTEL_MID || COMPILE_TEST
+
+config PINCTRL_TANGIER
+ tristate
+ select PINMUX
+ select PINCONF
+ select GENERIC_PINCONF
+ help
+ This is a library driver for Intel Tangier pin controller and to
+ be selected and used by respective compatible platform drivers.
+
+ If built as a module its name will be pinctrl-tangier.
+
+config PINCTRL_MERRIFIELD
+ tristate "Intel Merrifield pinctrl driver"
+ select PINCTRL_TANGIER
+ help
+ Intel Merrifield Family-Level Interface Shim (FLIS) driver provides
+ an interface that allows configuring of SoC pins and using them as
+ GPIOs.
+
+config PINCTRL_MOOREFIELD
+ tristate "Intel Moorefield pinctrl driver"
+ select PINCTRL_TANGIER
+ help
+ Intel Moorefield Family-Level Interface Shim (FLIS) driver provides
+ an interface that allows configuring of SoC pins and using them as
+ GPIOs.
+
+endif
diff --git a/drivers/pinctrl/intel/Makefile b/drivers/pinctrl/intel/Makefile
index 906dd6c8d837..f6d30f2d973a 100644
--- a/drivers/pinctrl/intel/Makefile
+++ b/drivers/pinctrl/intel/Makefile
@@ -4,6 +4,7 @@
obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o
obj-$(CONFIG_PINCTRL_CHERRYVIEW) += pinctrl-cherryview.o
obj-$(CONFIG_PINCTRL_LYNXPOINT) += pinctrl-lynxpoint.o
+obj-$(CONFIG_PINCTRL_TANGIER) += pinctrl-tangier.o
obj-$(CONFIG_PINCTRL_MERRIFIELD) += pinctrl-merrifield.o
obj-$(CONFIG_PINCTRL_MOOREFIELD) += pinctrl-moorefield.o
obj-$(CONFIG_PINCTRL_INTEL) += pinctrl-intel.o
diff --git a/drivers/pinctrl/intel/pinctrl-alderlake.c b/drivers/pinctrl/intel/pinctrl-alderlake.c
index 55bbfd647ba4..4a37dc273d63 100644
--- a/drivers/pinctrl/intel/pinctrl-alderlake.c
+++ b/drivers/pinctrl/intel/pinctrl-alderlake.c
@@ -748,3 +748,4 @@ module_platform_driver(adl_pinctrl_driver);
MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
MODULE_DESCRIPTION("Intel Alder Lake PCH pinctrl/GPIO driver");
MODULE_LICENSE("GPL v2");
+MODULE_IMPORT_NS(PINCTRL_INTEL);
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 27aef62fc7c0..faa8b7ff5bcf 100644
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -13,6 +13,7 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
+#include <linux/module.h>
#include <linux/types.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
@@ -551,25 +552,10 @@ static const struct intel_pinctrl_soc_data *byt_soc_data[] = {
static DEFINE_RAW_SPINLOCK(byt_lock);
-static struct intel_community *byt_get_community(struct intel_pinctrl *vg,
- unsigned int pin)
-{
- struct intel_community *comm;
- int i;
-
- for (i = 0; i < vg->ncommunities; i++) {
- comm = vg->communities + i;
- if (pin < comm->pin_base + comm->npins && pin >= comm->pin_base)
- return comm;
- }
-
- return NULL;
-}
-
static void __iomem *byt_gpio_reg(struct intel_pinctrl *vg, unsigned int offset,
int reg)
{
- struct intel_community *comm = byt_get_community(vg, offset);
+ struct intel_community *comm = intel_get_community(vg, offset);
u32 reg_offset;
if (!comm)
@@ -591,68 +577,12 @@ static void __iomem *byt_gpio_reg(struct intel_pinctrl *vg, unsigned int offset,
return comm->pad_regs + reg_offset + reg;
}
-static int byt_get_groups_count(struct pinctrl_dev *pctldev)
-{
- struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
-
- return vg->soc->ngroups;
-}
-
-static const char *byt_get_group_name(struct pinctrl_dev *pctldev,
- unsigned int selector)
-{
- struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
-
- return vg->soc->groups[selector].grp.name;
-}
-
-static int byt_get_group_pins(struct pinctrl_dev *pctldev,
- unsigned int selector,
- const unsigned int **pins,
- unsigned int *num_pins)
-{
- struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
-
- *pins = vg->soc->groups[selector].grp.pins;
- *num_pins = vg->soc->groups[selector].grp.npins;
-
- return 0;
-}
-
static const struct pinctrl_ops byt_pinctrl_ops = {
- .get_groups_count = byt_get_groups_count,
- .get_group_name = byt_get_group_name,
- .get_group_pins = byt_get_group_pins,
+ .get_groups_count = intel_get_groups_count,
+ .get_group_name = intel_get_group_name,
+ .get_group_pins = intel_get_group_pins,
};
-static int byt_get_functions_count(struct pinctrl_dev *pctldev)
-{
- struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
-
- return vg->soc->nfunctions;
-}
-
-static const char *byt_get_function_name(struct pinctrl_dev *pctldev,
- unsigned int selector)
-{
- struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
-
- return vg->soc->functions[selector].func.name;
-}
-
-static int byt_get_function_groups(struct pinctrl_dev *pctldev,
- unsigned int selector,
- const char * const **groups,
- unsigned int *ngroups)
-{
- struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
-
- *groups = vg->soc->functions[selector].func.groups;
- *ngroups = vg->soc->functions[selector].func.ngroups;
-
- return 0;
-}
-
static void byt_set_group_simple_mux(struct intel_pinctrl *vg,
const struct intel_pingroup group,
unsigned int func)
@@ -851,9 +781,9 @@ static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev,
}
static const struct pinmux_ops byt_pinmux_ops = {
- .get_functions_count = byt_get_functions_count,
- .get_function_name = byt_get_function_name,
- .get_function_groups = byt_get_function_groups,
+ .get_functions_count = intel_get_functions_count,
+ .get_function_name = intel_get_function_name,
+ .get_function_groups = intel_get_function_groups,
.set_mux = byt_set_mux,
.gpio_request_enable = byt_gpio_request_enable,
.gpio_disable_free = byt_gpio_disable_free,
@@ -995,8 +925,8 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev,
void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
void __iomem *db_reg = byt_gpio_reg(vg, offset, BYT_DEBOUNCE_REG);
+ u32 conf, val, db_pulse, debounce;
unsigned long flags;
- u32 conf, val, debounce;
int i, ret = 0;
raw_spin_lock_irqsave(&byt_lock, flags);
@@ -1053,8 +983,6 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev,
break;
case PIN_CONFIG_INPUT_DEBOUNCE:
- debounce = readl(db_reg);
-
if (arg)
conf |= BYT_DEBOUNCE_EN;
else
@@ -1062,32 +990,25 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev,
switch (arg) {
case 375:
- debounce &= ~BYT_DEBOUNCE_PULSE_MASK;
- debounce |= BYT_DEBOUNCE_PULSE_375US;
+ db_pulse = BYT_DEBOUNCE_PULSE_375US;
break;
case 750:
- debounce &= ~BYT_DEBOUNCE_PULSE_MASK;
- debounce |= BYT_DEBOUNCE_PULSE_750US;
+ db_pulse = BYT_DEBOUNCE_PULSE_750US;
break;
case 1500:
- debounce &= ~BYT_DEBOUNCE_PULSE_MASK;
- debounce |= BYT_DEBOUNCE_PULSE_1500US;
+ db_pulse = BYT_DEBOUNCE_PULSE_1500US;
break;
case 3000:
- debounce &= ~BYT_DEBOUNCE_PULSE_MASK;
- debounce |= BYT_DEBOUNCE_PULSE_3MS;
+ db_pulse = BYT_DEBOUNCE_PULSE_3MS;
break;
case 6000:
- debounce &= ~BYT_DEBOUNCE_PULSE_MASK;
- debounce |= BYT_DEBOUNCE_PULSE_6MS;
+ db_pulse = BYT_DEBOUNCE_PULSE_6MS;
break;
case 12000:
- debounce &= ~BYT_DEBOUNCE_PULSE_MASK;
- debounce |= BYT_DEBOUNCE_PULSE_12MS;
+ db_pulse = BYT_DEBOUNCE_PULSE_12MS;
break;
case 24000:
- debounce &= ~BYT_DEBOUNCE_PULSE_MASK;
- debounce |= BYT_DEBOUNCE_PULSE_24MS;
+ db_pulse = BYT_DEBOUNCE_PULSE_24MS;
break;
default:
if (arg)
@@ -1095,8 +1016,13 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev,
break;
}
- if (!ret)
- writel(debounce, db_reg);
+ if (ret)
+ break;
+
+ debounce = readl(db_reg);
+ debounce = (debounce & ~BYT_DEBOUNCE_PULSE_MASK) | db_pulse;
+ writel(debounce, db_reg);
+
break;
default:
ret = -ENOTSUPP;
@@ -1265,7 +1191,7 @@ static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
val = readl(val_reg);
raw_spin_unlock_irqrestore(&byt_lock, flags);
- comm = byt_get_community(vg, pin);
+ comm = intel_get_community(vg, pin);
if (!comm) {
seq_printf(s, "Pin %i: can't retrieve community\n", pin);
continue;
@@ -1733,7 +1659,6 @@ static int byt_pinctrl_probe(struct platform_device *pdev)
return 0;
}
-#ifdef CONFIG_PM_SLEEP
static int byt_gpio_suspend(struct device *dev)
{
struct intel_pinctrl *vg = dev_get_drvdata(dev);
@@ -1817,9 +1742,7 @@ static int byt_gpio_resume(struct device *dev)
raw_spin_unlock_irqrestore(&byt_lock, flags);
return 0;
}
-#endif
-#ifdef CONFIG_PM
static int byt_gpio_runtime_suspend(struct device *dev)
{
return 0;
@@ -1829,19 +1752,17 @@ static int byt_gpio_runtime_resume(struct device *dev)
{
return 0;
}
-#endif
static const struct dev_pm_ops byt_gpio_pm_ops = {
- SET_LATE_SYSTEM_SLEEP_PM_OPS(byt_gpio_suspend, byt_gpio_resume)
- SET_RUNTIME_PM_OPS(byt_gpio_runtime_suspend, byt_gpio_runtime_resume,
- NULL)
+ LATE_SYSTEM_SLEEP_PM_OPS(byt_gpio_suspend, byt_gpio_resume)
+ RUNTIME_PM_OPS(byt_gpio_runtime_suspend, byt_gpio_runtime_resume, NULL)
};
static struct platform_driver byt_gpio_driver = {
.probe = byt_pinctrl_probe,
.driver = {
.name = "byt_gpio",
- .pm = &byt_gpio_pm_ops,
+ .pm = pm_ptr(&byt_gpio_pm_ops),
.acpi_match_table = byt_gpio_acpi_match,
.suppress_bind_attrs = true,
},
@@ -1852,3 +1773,5 @@ static int __init byt_gpio_init(void)
return platform_driver_register(&byt_gpio_driver);
}
subsys_initcall(byt_gpio_init);
+
+MODULE_IMPORT_NS(PINCTRL_INTEL);
diff --git a/drivers/pinctrl/intel/pinctrl-broxton.c b/drivers/pinctrl/intel/pinctrl-broxton.c
index 77e921b2178d..4d5ddb297909 100644
--- a/drivers/pinctrl/intel/pinctrl-broxton.c
+++ b/drivers/pinctrl/intel/pinctrl-broxton.c
@@ -1028,3 +1028,4 @@ MODULE_DESCRIPTION("Intel Broxton SoC pinctrl/GPIO driver");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:apollolake-pinctrl");
MODULE_ALIAS("platform:broxton-pinctrl");
+MODULE_IMPORT_NS(PINCTRL_INTEL);
diff --git a/drivers/pinctrl/intel/pinctrl-cannonlake.c b/drivers/pinctrl/intel/pinctrl-cannonlake.c
index 88142ec57b25..95976abfb785 100644
--- a/drivers/pinctrl/intel/pinctrl-cannonlake.c
+++ b/drivers/pinctrl/intel/pinctrl-cannonlake.c
@@ -834,9 +834,9 @@ static struct platform_driver cnl_pinctrl_driver = {
.pm = &cnl_pinctrl_pm_ops,
},
};
-
module_platform_driver(cnl_pinctrl_driver);
MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
MODULE_DESCRIPTION("Intel Cannon Lake PCH pinctrl/GPIO driver");
MODULE_LICENSE("GPL v2");
+MODULE_IMPORT_NS(PINCTRL_INTEL);
diff --git a/drivers/pinctrl/intel/pinctrl-cedarfork.c b/drivers/pinctrl/intel/pinctrl-cedarfork.c
index 2ab52b1fbc59..a20465eb2dc6 100644
--- a/drivers/pinctrl/intel/pinctrl-cedarfork.c
+++ b/drivers/pinctrl/intel/pinctrl-cedarfork.c
@@ -351,3 +351,4 @@ module_exit(cdf_pinctrl_exit);
MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
MODULE_DESCRIPTION("Intel Cedar Fork PCH pinctrl/GPIO driver");
MODULE_LICENSE("GPL v2");
+MODULE_IMPORT_NS(PINCTRL_INTEL);
diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c
index eee0f9bc3d32..81ee949b946d 100644
--- a/drivers/pinctrl/intel/pinctrl-cherryview.c
+++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
@@ -617,31 +617,6 @@ static bool chv_pad_locked(struct intel_pinctrl *pctrl, unsigned int offset)
return chv_readl(pctrl, offset, CHV_PADCTRL1) & CHV_PADCTRL1_CFGLOCK;
}
-static int chv_get_groups_count(struct pinctrl_dev *pctldev)
-{
- struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
- return pctrl->soc->ngroups;
-}
-
-static const char *chv_get_group_name(struct pinctrl_dev *pctldev,
- unsigned int group)
-{
- struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
- return pctrl->soc->groups[group].grp.name;
-}
-
-static int chv_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,
- const unsigned int **pins, unsigned int *npins)
-{
- struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
- *pins = pctrl->soc->groups[group].grp.pins;
- *npins = pctrl->soc->groups[group].grp.npins;
- return 0;
-}
-
static void chv_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
unsigned int offset)
{
@@ -676,39 +651,12 @@ static void chv_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
}
static const struct pinctrl_ops chv_pinctrl_ops = {
- .get_groups_count = chv_get_groups_count,
- .get_group_name = chv_get_group_name,
- .get_group_pins = chv_get_group_pins,
+ .get_groups_count = intel_get_groups_count,
+ .get_group_name = intel_get_group_name,
+ .get_group_pins = intel_get_group_pins,
.pin_dbg_show = chv_pin_dbg_show,
};
-static int chv_get_functions_count(struct pinctrl_dev *pctldev)
-{
- struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
- return pctrl->soc->nfunctions;
-}
-
-static const char *chv_get_function_name(struct pinctrl_dev *pctldev,
- unsigned int function)
-{
- struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
- return pctrl->soc->functions[function].func.name;
-}
-
-static int chv_get_function_groups(struct pinctrl_dev *pctldev,
- unsigned int function,
- const char * const **groups,
- unsigned int * const ngroups)
-{
- struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
- *groups = pctrl->soc->functions[function].func.groups;
- *ngroups = pctrl->soc->functions[function].func.ngroups;
- return 0;
-}
-
static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev,
unsigned int function, unsigned int group)
{
@@ -884,9 +832,9 @@ static int chv_gpio_set_direction(struct pinctrl_dev *pctldev,
}
static const struct pinmux_ops chv_pinmux_ops = {
- .get_functions_count = chv_get_functions_count,
- .get_function_name = chv_get_function_name,
- .get_function_groups = chv_get_function_groups,
+ .get_functions_count = intel_get_functions_count,
+ .get_function_name = intel_get_function_name,
+ .get_function_groups = intel_get_function_groups,
.set_mux = chv_pinmux_set_mux,
.gpio_request_enable = chv_gpio_request_enable,
.gpio_disable_free = chv_gpio_disable_free,
@@ -1118,7 +1066,7 @@ static int chv_config_group_get(struct pinctrl_dev *pctldev,
unsigned int npins;
int ret;
- ret = chv_get_group_pins(pctldev, group, &pins, &npins);
+ ret = intel_get_group_pins(pctldev, group, &pins, &npins);
if (ret)
return ret;
@@ -1137,7 +1085,7 @@ static int chv_config_group_set(struct pinctrl_dev *pctldev,
unsigned int npins;
int i, ret;
- ret = chv_get_group_pins(pctldev, group, &pins, &npins);
+ ret = intel_get_group_pins(pctldev, group, &pins, &npins);
if (ret)
return ret;
@@ -1701,7 +1649,6 @@ static int chv_pinctrl_probe(struct platform_device *pdev)
struct intel_community_context *cctx;
struct intel_community *community;
struct device *dev = &pdev->dev;
- struct acpi_device *adev = ACPI_COMPANION(dev);
struct intel_pinctrl *pctrl;
acpi_status status;
unsigned int i;
@@ -1769,7 +1716,7 @@ static int chv_pinctrl_probe(struct platform_device *pdev)
if (ret)
return ret;
- status = acpi_install_address_space_handler(adev->handle,
+ status = acpi_install_address_space_handler(ACPI_HANDLE(dev),
community->acpi_space_id,
chv_pinctrl_mmio_access_handler,
NULL, pctrl);
@@ -1786,14 +1733,13 @@ static int chv_pinctrl_remove(struct platform_device *pdev)
struct intel_pinctrl *pctrl = platform_get_drvdata(pdev);
const struct intel_community *community = &pctrl->communities[0];
- acpi_remove_address_space_handler(ACPI_COMPANION(&pdev->dev),
+ acpi_remove_address_space_handler(ACPI_HANDLE(&pdev->dev),
community->acpi_space_id,
chv_pinctrl_mmio_access_handler);
return 0;
}
-#ifdef CONFIG_PM_SLEEP
static int chv_pinctrl_suspend_noirq(struct device *dev)
{
struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
@@ -1877,12 +1823,9 @@ static int chv_pinctrl_resume_noirq(struct device *dev)
return 0;
}
-#endif
-static const struct dev_pm_ops chv_pinctrl_pm_ops = {
- SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(chv_pinctrl_suspend_noirq,
- chv_pinctrl_resume_noirq)
-};
+static DEFINE_NOIRQ_DEV_PM_OPS(chv_pinctrl_pm_ops,
+ chv_pinctrl_suspend_noirq, chv_pinctrl_resume_noirq);
static const struct acpi_device_id chv_pinctrl_acpi_match[] = {
{ "INT33FF", (kernel_ulong_t)chv_soc_data },
@@ -1895,7 +1838,7 @@ static struct platform_driver chv_pinctrl_driver = {
.remove = chv_pinctrl_remove,
.driver = {
.name = "cherryview-pinctrl",
- .pm = &chv_pinctrl_pm_ops,
+ .pm = pm_sleep_ptr(&chv_pinctrl_pm_ops),
.acpi_match_table = chv_pinctrl_acpi_match,
},
};
@@ -1915,3 +1858,4 @@ module_exit(chv_pinctrl_exit);
MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
MODULE_DESCRIPTION("Intel Cherryview/Braswell pinctrl driver");
MODULE_LICENSE("GPL v2");
+MODULE_IMPORT_NS(PINCTRL_INTEL);
diff --git a/drivers/pinctrl/intel/pinctrl-denverton.c b/drivers/pinctrl/intel/pinctrl-denverton.c
index c1a9db091c6e..0c4694cfa594 100644
--- a/drivers/pinctrl/intel/pinctrl-denverton.c
+++ b/drivers/pinctrl/intel/pinctrl-denverton.c
@@ -281,3 +281,4 @@ module_exit(dnv_pinctrl_exit);
MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
MODULE_DESCRIPTION("Intel Denverton SoC pinctrl/GPIO driver");
MODULE_LICENSE("GPL v2");
+MODULE_IMPORT_NS(PINCTRL_INTEL);
diff --git a/drivers/pinctrl/intel/pinctrl-elkhartlake.c b/drivers/pinctrl/intel/pinctrl-elkhartlake.c
index 64b1997df0be..81581ab85316 100644
--- a/drivers/pinctrl/intel/pinctrl-elkhartlake.c
+++ b/drivers/pinctrl/intel/pinctrl-elkhartlake.c
@@ -495,9 +495,9 @@ static struct platform_driver ehl_pinctrl_driver = {
.pm = &ehl_pinctrl_pm_ops,
},
};
-
module_platform_driver(ehl_pinctrl_driver);
MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
MODULE_DESCRIPTION("Intel Elkhart Lake PCH pinctrl/GPIO driver");
MODULE_LICENSE("GPL v2");
+MODULE_IMPORT_NS(PINCTRL_INTEL);
diff --git a/drivers/pinctrl/intel/pinctrl-emmitsburg.c b/drivers/pinctrl/intel/pinctrl-emmitsburg.c
index cc8f0baabc91..099ec8351d5f 100644
--- a/drivers/pinctrl/intel/pinctrl-emmitsburg.c
+++ b/drivers/pinctrl/intel/pinctrl-emmitsburg.c
@@ -368,9 +368,9 @@ static struct platform_driver ebg_pinctrl_driver = {
.pm = &ebg_pinctrl_pm_ops,
},
};
-
module_platform_driver(ebg_pinctrl_driver);
MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
MODULE_DESCRIPTION("Intel Emmitsburg PCH pinctrl/GPIO driver");
MODULE_LICENSE("GPL v2");
+MODULE_IMPORT_NS(PINCTRL_INTEL);
diff --git a/drivers/pinctrl/intel/pinctrl-geminilake.c b/drivers/pinctrl/intel/pinctrl-geminilake.c
index 918cc9f261cf..9effa06b61e9 100644
--- a/drivers/pinctrl/intel/pinctrl-geminilake.c
+++ b/drivers/pinctrl/intel/pinctrl-geminilake.c
@@ -473,3 +473,4 @@ module_exit(glk_pinctrl_exit);
MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
MODULE_DESCRIPTION("Intel Gemini Lake SoC pinctrl/GPIO driver");
MODULE_LICENSE("GPL v2");
+MODULE_IMPORT_NS(PINCTRL_INTEL);
diff --git a/drivers/pinctrl/intel/pinctrl-icelake.c b/drivers/pinctrl/intel/pinctrl-icelake.c
index 1c64b4a1c491..300e1538c8d0 100644
--- a/drivers/pinctrl/intel/pinctrl-icelake.c
+++ b/drivers/pinctrl/intel/pinctrl-icelake.c
@@ -685,10 +685,10 @@ static struct platform_driver icl_pinctrl_driver = {
.pm = &icl_pinctrl_pm_ops,
},
};
-
module_platform_driver(icl_pinctrl_driver);
MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
MODULE_DESCRIPTION(