diff options
26 files changed, 2604 insertions, 559 deletions
diff --git a/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml b/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml index 20afdb4568a2..3d5bede98cf1 100644 --- a/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml +++ b/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml @@ -17,6 +17,7 @@ properties: items: - enum: - chongzhou,cz101b4001 + - kingdisplay,kd101ne3-40ti - radxa,display-10hd-ad001 - radxa,display-8hd-ad002 - const: jadard,jd9365da-h3 diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 2ffb2c2e84f9..8a87e0100dcb 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -51,6 +51,8 @@ properties: - auo,g101evn010 # AU Optronics Corporation 10.4" (800x600) color TFT LCD panel - auo,g104sn02 + # AU Optronics Corporation 10.4" (800x600) color TFT LCD panel + - auo,g104stn01 # AU Optronics Corporation 12.1" (1280x800) TFT LCD panel - auo,g121ean01 # AU Optronics Corporation 15.6" (1366x768) TFT LCD panel diff --git a/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml b/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml new file mode 100644 index 000000000000..6736f93256b5 --- /dev/null +++ b/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/st,stm32mp25-lvds.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 LVDS Display Interface Transmitter + +maintainers: + - Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> + - Yannick Fertre <yannick.fertre@foss.st.com> + +description: | + The STMicroelectronics STM32 LVDS Display Interface Transmitter handles the + LVDS protocol: it maps the pixels received from the upstream Pixel-DMA (LTDC) + onto the LVDS PHY. + + It is composed of three sub blocks: + - LVDS host: handles the LVDS protocol (FPD / OpenLDI) and maps its input + pixels onto the data lanes of the PHY + - LVDS PHY: parallelize the data and drives the LVDS data lanes + - LVDS wrapper: handles top-level settings + + The LVDS controller driver supports the following high-level features: + - FDP-Link-I and OpenLDI (v0.95) protocols + - Single-Link or Dual-Link operation + - Single-Display or Double-Display (with the same content duplicated on both) + - Flexible Bit-Mapping, including JEIDA and VESA + - RGB888 or RGB666 output + - Synchronous design, with one input pixel per clock cycle + +properties: + compatible: + const: st,stm32mp25-lvds + + "#clock-cells": + const: 0 + description: + Provides the internal LVDS PHY clock to the framework. + + reg: + maxItems: 1 + + clocks: + items: + - description: APB peripheral clock + - description: Reference clock for the internal PLL + + clock-names: + items: + - const: pclk + - const: ref + + resets: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + LVDS input port node, connected to the LTDC RGB output port. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + LVDS output port node, connected to a panel or bridge input port. + + required: + - port@0 + - port@1 + +required: + - compatible + - "#clock-cells" + - reg + - clocks + - clock-names + - resets + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/st,stm32mp25-rcc.h> + #include <dt-bindings/reset/st,stm32mp25-rcc.h> + + lvds: lvds@48060000 { + compatible = "st,stm32mp25-lvds"; + reg = <0x48060000 0x2000>; + #clock-cells = <0>; + clocks = <&rcc CK_BUS_LVDS>, <&rcc CK_KER_LVDSPHY>; + clock-names = "pclk", "ref"; + resets = <&rcc LVDS_R>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds_in: endpoint { + remote-endpoint = <<dc_ep1_out>; + }; + }; + + port@1 { + reg = <1>; + lvds_out0: endpoint { + remote-endpoint = <&lvds_panel_in>; + }; + }; + }; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 146ba9fd6a92..ec342e44c926 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7484,6 +7484,7 @@ L: dri-devel@lists.freedesktop.org S: Maintained T: git https://gitlab.freedesktop.org/drm/misc/kernel.git F: Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml +F: Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml F: drivers/gpu/drm/stm DRM DRIVERS FOR TI KEYSTONE diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c index 2fd9c78eab73..dc8f639e82fd 100644 --- a/drivers/gpu/drm/ast/ast_mode.c +++ b/drivers/gpu/drm/ast/ast_mode.c @@ -303,7 +303,7 @@ static void ast_set_std_reg(struct ast_device *ast, /* Set SEQ; except Screen Disable field */ ast_set_index_reg(ast, AST_IO_VGASRI, 0x00, 0x03); - ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, stdtable->seq[0]); + ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0x20, stdtable->seq[0]); for (i = 1; i < 4; i++) { jreg = stdtable->seq[i]; ast_set_index_reg(ast, AST_IO_VGASRI, (i + 1), jreg); @@ -649,12 +649,12 @@ static void ast_primary_plane_helper_atomic_update(struct drm_plane *plane, struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); struct drm_framebuffer *old_fb = old_plane_state->fb; struct ast_plane *ast_plane = to_ast_plane(plane); + struct drm_crtc *crtc = plane_state->crtc; + struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); struct drm_rect damage; struct drm_atomic_helper_damage_iter iter; - if (!old_fb || (fb->format != old_fb->format)) { - struct drm_crtc *crtc = plane_state->crtc; - struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); + if (!old_fb || (fb->format != old_fb->format) || crtc_state->mode_changed) { struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info; @@ -690,15 +690,15 @@ static void ast_primary_plane_helper_atomic_enable(struct drm_plane *plane, * Therefore only reprogram the address after enabling the plane. */ ast_set_start_address_crt1(ast, (u32)ast_plane->offset); - ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x1, 0xdf, 0x00); } static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *state) { - struct ast_device *ast = to_ast_device(plane->dev); - - ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x1, 0xdf, 0x20); + /* + * Keep this empty function to avoid calling + * atomic_update when disabling the plane. + */ } static int ast_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane, @@ -1019,62 +1019,6 @@ static int ast_cursor_plane_init(struct ast_device *ast) * CRTC */ -static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) -{ - struct ast_device *ast = to_ast_device(crtc->dev); - u8 ch = AST_DPMS_VSYNC_OFF | AST_DPMS_HSYNC_OFF; - struct ast_crtc_state *ast_state; - const struct drm_format_info *format; - struct ast_vbios_mode_info *vbios_mode_info; - - /* TODO: Maybe control display signal generation with - * Sync Enable (bit CR17.7). - */ - switch (mode) { - case DRM_MODE_DPMS_ON: - ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0); - ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, 0); - if (ast->tx_chip_types & AST_TX_DP501_BIT) - ast_set_dp501_video_output(crtc->dev, 1); - - if (ast->tx_chip_types & AST_TX_ASTDP_BIT) { - ast_dp_power_on_off(crtc->dev, AST_DP_POWER_ON); - ast_wait_for_vretrace(ast); - ast_dp_set_on_off(crtc->dev, 1); - } - - ast_state = to_ast_crtc_state(crtc->state); - format = ast_state->format; - - if (format) { - vbios_mode_info = &ast_state->vbios_mode_info; - - ast_set_color_reg(ast, format); - ast_set_vbios_color_reg(ast, format, vbios_mode_info); - if (crtc->state->gamma_lut) - ast_crtc_set_gamma(ast, format, crtc->state->gamma_lut->data); - else - ast_crtc_set_gamma_linear(ast, format); - } - break; - case DRM_MODE_DPMS_STANDBY: - case DRM_MODE_DPMS_SUSPEND: - case DRM_MODE_DPMS_OFF: - ch = mode; - if (ast->tx_chip_types & AST_TX_DP501_BIT) - ast_set_dp501_video_output(crtc->dev, 0); - - if (ast->tx_chip_types & AST_TX_ASTDP_BIT) { - ast_dp_set_on_off(crtc->dev, 0); - ast_dp_power_on_off(crtc->dev, AST_DP_POWER_OFF); - } - - ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0x20); - ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, ch); - break; - } -} - static enum drm_mode_status ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) { @@ -1147,6 +1091,33 @@ ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode return status; } +static void ast_crtc_helper_mode_set_nofb(struct drm_crtc *crtc) +{ + struct drm_device *dev = crtc->dev; + struct ast_device *ast = to_ast_device(dev); + struct drm_crtc_state *crtc_state = crtc->state; + struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); + struct ast_vbios_mode_info *vbios_mode_info = + &ast_crtc_state->vbios_mode_info; + struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; + + /* + * Ensure that no scanout takes place before reprogramming mode + * and format registers. + * + * TODO: Get vblank interrupts working and remove this line. + */ + ast_wait_for_vretrace(ast); + + ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info); + ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06); + ast_set_std_reg(ast, adjusted_mode, vbios_mode_info); + ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info); + ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info); + ast_set_crtthd_reg(ast); + ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info); +} + static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state) { @@ -1206,7 +1177,6 @@ ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, struct drm_device *dev = crtc->dev; struct ast_device *ast = to_ast_device(dev); struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); - struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info; /* * The gamma LUT has to be reloaded after changing the primary @@ -1220,40 +1190,27 @@ ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, else ast_crtc_set_gamma_linear(ast, ast_crtc_state->format); } - - //Set Aspeed Display-Port - if (ast->tx_chip_types & AST_TX_ASTDP_BIT) - ast_dp_set_mode(crtc, vbios_mode_info); } static void ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) { - struct drm_device *dev = crtc->dev; - struct ast_device *ast = to_ast_device(dev); - struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); - struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); - struct ast_vbios_mode_info *vbios_mode_info = - &ast_crtc_state->vbios_mode_info; - struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; - - ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info); - ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06); - ast_set_std_reg(ast, adjusted_mode, vbios_mode_info); - ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info); - ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info); - ast_set_crtthd_reg(ast); - ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info); + struct ast_device *ast = to_ast_device(crtc->dev); - ast_crtc_dpms(crtc, DRM_MODE_DPMS_ON); + ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, 0x00); + ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0x00); } static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) { struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); - struct drm_device *dev = crtc->dev; - struct ast_device *ast = to_ast_device(dev); + struct ast_device *ast = to_ast_device(crtc->dev); + u8 vgacrb6; + + ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, AST_IO_VGASR1_SD); - ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); + vgacrb6 = AST_IO_VGACRB6_VSYNC_OFF | + AST_IO_VGACRB6_HSYNC_OFF; + ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, vgacrb6); /* * HW cursors require the underlying primary plane and CRTC to @@ -1266,16 +1223,11 @@ static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_ato * simple pageflips on the planes. */ drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false); - - /* - * Ensure that no scanout takes place before reprogramming mode - * and format registers. - */ - ast_wait_for_vretrace(ast); } static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { .mode_valid = ast_crtc_helper_mode_valid, + .mode_set_nofb = ast_crtc_helper_mode_set_nofb, .atomic_check = ast_crtc_helper_atomic_check, .atomic_flush = ast_crtc_helper_atomic_flush, .atomic_enable = ast_crtc_helper_atomic_enable, @@ -1521,6 +1473,27 @@ static const struct drm_encoder_funcs ast_dp501_encoder_funcs = { .destroy = drm_encoder_cleanup, }; +static void ast_dp501_encoder_helper_atomic_enable(struct drm_encoder *encoder, + struct drm_atomic_state *state) +{ + struct drm_device *dev = encoder->dev; + + ast_set_dp501_video_output(dev, 1); +} + +static void ast_dp501_encoder_helper_atomic_disable(struct drm_encoder *encoder, + struct drm_atomic_state *state) +{ + struct drm_device *dev = encoder->dev; + + ast_set_dp501_video_output(dev, 0); +} + +static const struct drm_encoder_helper_funcs ast_dp501_encoder_helper_funcs = { + .atomic_enable = ast_dp501_encoder_helper_atomic_enable, + .atomic_disable = ast_dp501_encoder_helper_atomic_disable, +}; + /* * DP501 Connector */ @@ -1607,6 +1580,8 @@ static int ast_dp501_output_init(struct ast_device *ast) DRM_MODE_ENCODER_TMDS, NULL); if (ret) return ret; + drm_encoder_helper_add(encoder, &ast_dp501_encoder_helper_funcs); + encoder->possible_crtcs = drm_crtc_mask(crtc); ret = ast_dp501_connector_init(dev, connector); @@ -1628,6 +1603,43 @@ static const struct drm_encoder_funcs ast_astdp_encoder_funcs = { .destroy = drm_encoder_cleanup, }; +static void ast_astdp_encoder_helper_atomic_mode_set(struct drm_encoder *encoder, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct drm_crtc *crtc = crtc_state->crtc; + struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); + struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info; + + ast_dp_set_mode(crtc, vbios_mode_info); +} + +static void ast_astdp_encoder_helper_atomic_enable(struct drm_encoder *encoder, + struct drm_atomic_state *state) +{ + struct drm_device *dev = encoder->dev; + struct ast_device *ast = to_ast_device(dev); + + ast_dp_power_on_off(dev, AST_DP_POWER_ON); + ast_wait_for_vretrace(ast); + ast_dp_set_on_off(dev, 1); +} + +static void ast_astdp_encoder_helper_atomic_disable(struct drm_encoder *encoder, + struct drm_atomic_state *state) +{ + struct drm_device *dev = encoder->dev; + + ast_dp_set_on_off(dev, 0); + ast_dp_power_on_off(dev, AST_DP_POWER_OFF); +} + +static const struct drm_encoder_helper_funcs ast_astdp_encoder_helper_funcs = { + .atomic_mode_set = ast_astdp_encoder_helper_atomic_mode_set, + .atomic_enable = ast_astdp_encoder_helper_atomic_enable, + .atomic_disable = ast_astdp_encoder_helper_atomic_disable, +}; + /* * ASPEED Display-Port Connector */ @@ -1726,6 +1738,8 @@ static int ast_astdp_output_init(struct ast_device *ast) DRM_MODE_ENCODER_TMDS, NULL); if (ret) return ret; + drm_encoder_helper_add(encoder, &ast_astdp_encoder_helper_funcs); + encoder->possible_crtcs = drm_crtc_mask(crtc); ret = ast_astdp_connector_init(dev, connector); @@ -1851,7 +1865,7 @@ static void ast_mode_config_helper_atomic_commit_tail(struct drm_atomic_state *s * the I/O-register lock. Released in atomic_flush(). */ mutex_lock(&ast->modeset_lock); - drm_atomic_helper_commit_tail_rpm(state); + drm_atomic_helper_commit_tail(state); mutex_unlock(&ast->modeset_lock); } diff --git a/drivers/gpu/drm/ast/ast_reg.h b/drivers/gpu/drm/ast/ast_reg.h index 62dddbf3fe56..75671d345057 100644 --- a/drivers/gpu/drm/ast/ast_reg.h +++ b/drivers/gpu/drm/ast/ast_reg.h @@ -22,6 +22,7 @@ #define AST_IO_VGAER_VGA_ENABLE BIT(0) #define AST_IO_VGASRI (0x44) +#define AST_IO_VGASR1_SD BIT(5) #define AST_IO_VGADRR (0x47) #define AST_IO_VGADWR (0x48) #define AST_IO_VGAPDR (0x49) @@ -31,6 +32,8 @@ #define AST_IO_VGACR80_PASSWORD (0xa8) #define AST_IO_VGACRA1_VGAIO_DISABLED BIT(1) #define AST_IO_VGACRA1_MMIO_ENABLED BIT(2) +#define AST_IO_VGACRB6_HSYNC_OFF BIT(0) +#define AST_IO_VGACRB6_VSYNC_OFF BIT(1) #define AST_IO_VGACRCB_HWC_16BPP BIT(0) /* set: ARGB4444, cleared: 2bpp palette */ #define AST_IO_VGACRCB_HWC_ENABLED BIT(1) @@ -76,13 +79,6 @@ #define ASTDP_HOST_EDID_READ_DONE_MASK GENMASK(0, 0) /* - * CRB8[b1]: Enable VSYNC off - * CRB8[b0]: Enable HSYNC off - */ -#define AST_DPMS_VSYNC_OFF BIT(1) -#define AST_DPMS_HSYNC_OFF BIT(0) - -/* * CRDF[b4]: Mirror of AST_DP_VIDEO_ENABLE * Precondition: A. ~AST_DP_PHY_SLEEP && * B. DP_HPD && diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c index 79a615667aab..d4c34f364140 100644 --- a/drivers/gpu/drm/display/drm_dp_helper.c +++ b/drivers/gpu/drm/display/drm_dp_helper.c @@ -35,6 +35,7 @@ #include <drm/display/drm_dp_helper.h> #include <drm/display/drm_dp_mst_helper.h> #include <drm/drm_edid.h> +#include <drm/drm_fixed.h> #include <drm/drm_print.h> #include <drm/drm_vblank.h> #include <drm/drm_panel.h> @@ -4151,9 +4152,9 @@ int drm_dp_bw_overhead(int lane_count, int hactive, int symbol_cycles; if (lane_count == 0 || hactive == 0 || bpp_x16 == 0) { - DRM_DEBUG_KMS("Invalid BW overhead params: lane_count %d, hactive %d, bpp_x16 %d.%04d\n", + DRM_DEBUG_KMS("Invalid BW overhead params: lane_count %d, hactive %d, bpp_x16 " FXP_Q4_FMT "\n", lane_count, hactive, - bpp_x16 >> 4, (bpp_x16 & 0xf) * 625); + FXP_Q4_ARGS(bpp_x16)); return 0; } diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c index 7f8e1cfbe19d..fc2ceae61db2 100644 --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c @@ -2929,7 +2929,7 @@ static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr, /* FIXME: Actually do some real error handling here */ ret = drm_dp_mst_wait_tx_reply(mstb, txmsg); - if (ret <= 0) { + if (ret < 0) { drm_err(mgr->dev, "Sending link address failed with %d\n", ret); goto out; } @@ -2981,7 +2981,7 @@ static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr, mutex_unlock(&mgr->lock); out: - if (ret <= 0) + if (ret < 0) mstb->link_address_sent = false; kfree(txmsg); return ret < 0 ? ret : changed; @@ -4069,6 +4069,7 @@ static int drm_dp_mst_handle_up_req(struct drm_dp_mst_topology_mgr *mgr) if (up_req->msg.req_type == DP_CONNECTION_STATUS_NOTIFY) { const struct drm_dp_connection_status_notify *conn_stat = &up_req->msg.u.conn_stat; + bool handle_csn; drm_dbg_kms(mgr->dev, "Got CSN: pn: %d ldps:%d ddps: %d mcs: %d ip: %d pdt: %d\n", conn_stat->port_number, @@ -4077,6 +4078,16 @@ static int drm_dp_mst_handle_up_req(struct drm_dp_mst_topology_mgr *mgr) conn_stat->message_capability_status, conn_stat->input_port, conn_stat->peer_device_type); + + mutex_lock(&mgr->probe_lock); + handle_csn = mgr->mst_primary->link_address_sent; + mutex_unlock(&mgr->probe_lock); + + if (!handle_csn) { + drm_dbg_kms(mgr->dev, "Got CSN before finish topology probing. Skip it."); + kfree(up_req); + goto out; + } } else if (up_req->msg.req_type == DP_RESOURCE_STATUS_NOTIFY) { const struct drm_dp_resource_status_notify *res_stat = &up_req->msg.u.resource_stat; diff --git a/drivers/gpu/drm/display/drm_dsc_helper.c b/drivers/gpu/drm/display/drm_dsc_helper.c index 4424380c6cb6..6900f4dac520 100644 --- a/drivers/gpu/drm/display/drm_dsc_helper.c +++ b/drivers/gpu/drm/display/drm_dsc_helper.c @@ -14,6 +14,7 @@ #include <drm/display/drm_dp_helper.h> #include <drm/display/drm_dsc_helper.h> +#include <drm/drm_fixed.h> #include <drm/drm_print.h> /** @@ -1472,3 +1473,93 @@ u32 drm_dsc_flatness_det_thresh(const struct drm_dsc_config *dsc) return 2 << (dsc->bits_per_component - 8); } EXPORT_SYMBOL(drm_dsc_flatness_det_thresh); + +static void drm_dsc_dump_config_main_params(struct drm_printer *p, int indent, + const struct drm_dsc_config *cfg) +{ + drm_printf_indent(p, indent, + "dsc-cfg: version: %d.%d, picture: w=%d, h=%d, slice: count=%d, w=%d, h=%d, size=%d\n", + cfg->dsc_version_major, cfg->dsc_version_minor, + cfg->pic_width, cfg->pic_height, + cfg->slice_count, cfg->slice_width, cfg->slice_height, cfg->slice_chunk_size); + drm_printf_indent(p, indent, + "dsc-cfg: mode: block-pred=%s, vbr=%s, rgb=%s, simple-422=%s, native-422=%s, native-420=%s\n", + str_yes_no(cfg->block_pred_enable), str_yes_no(cfg->vbr_enable), + str_yes_no(cfg->convert_rgb), + str_yes_no(cfg->simple_422), str_yes_no(cfg->native_422), str_yes_no(cfg->native_420)); + drm_printf_indent(p, indent, + "dsc-cfg: color-depth: uncompressed-bpc=%d, compressed-bpp=" FXP_Q4_FMT " line-buf-bpp=%d\n", + cfg->bits_per_component, FXP_Q4_ARGS(cfg->bits_per_pixel), cfg->line_buf_depth); + drm_printf_indent(p, indent, + "dsc-cfg: rc-model: size=%d, bits=%d, mux-word-size: %d, initial-delays: xmit=%d, dec=%d\n", + cfg->rc_model_size, cfg->rc_bits, cfg->mux_word_size, + cfg->initial_xmit_delay, cfg->initial_dec_delay); + drm_printf_indent(p, indent, + "dsc-cfg: offsets: initial=%d, final=%d, slice-bpg=%d\n", + cfg->initial_offset, cfg->final_offset, cfg->slice_bpg_offset); + drm_printf_indent(p, indent, + "dsc-cfg: line-bpg-offsets: first=%d, non-first=%d, second=%d, non-second=%d, second-adj=%d\n", + cfg->first_line_bpg_offset, cfg->nfl_bpg_offset, + cfg->second_line_bpg_offset, cfg->nsl_bpg_offset, cfg->second_line_offset_adj); + drm_printf_indent(p, indent, + "dsc-cfg: rc-tgt-offsets: low=%d, high=%d, rc-edge-factor: %d, rc-quant-incr-limits: [0]=%d, [1]=%d\n", + cfg->rc_tgt_offset_low, cfg->rc_tgt_offset_high, + cfg->rc_edge_factor, cfg->rc_quant_incr_limit0, cfg->rc_quant_incr_limit1); + drm_printf_indent(p, indent, + "dsc-cfg: initial-scale: %d, scale-intervals: increment=%d, decrement=%d\n", + cfg->initial_scale_value, cfg->scale_increment_interval, cfg->scale_decrement_interval); + drm_printf_indent(p, indent, + "dsc-cfg: flatness: min-qp=%d, max-qp=%d\n", + cfg->flatness_min_qp, cfg->flatness_max_qp); +} + +static void drm_dsc_dump_config_rc_params(struct drm_printer *p, int indent, + const struct drm_dsc_config *cfg) +{ + const u16 *bt = cfg->rc_buf_thresh; + const struct drm_dsc_rc_range_parameters *rp = cfg->rc_range_params; + + BUILD_BUG_ON(ARRAY_SIZE(cfg->rc_buf_thresh) != 14); + BUILD_BUG_ON(ARRAY_SIZE(cfg->rc_range_params) != 15); + + drm_printf_indent(p, indent, + "dsc-cfg: rc-level: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14\n"); + drm_printf_indent(p, indent, + "dsc-cfg: rc-buf-thresh: %3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d\n", + bt[0], bt[1], bt[2], bt[3], bt[4], bt[5], bt[6], bt[7], + bt[8], bt[9], bt[10], bt[11], bt[12], bt[13]); + drm_printf_indent(p, indent, + "dsc-cfg: rc-min-qp: %3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d\n", + rp[0].range_min_qp, rp[1].range_min_qp, rp[2].range_min_qp, rp[3].range_min_qp, + rp[4].range_min_qp, rp[5].range_min_qp, rp[6].range_min_qp, rp[7].range_min_qp, + rp[8].range_min_qp, rp[9].range_min_qp, rp[10].range_min_qp, rp[11].range_min_qp, + rp[12].range_min_qp, rp[13].range_min_qp, rp[14].range_min_qp); + drm_printf_indent(p, indent, + "dsc-cfg: rc-max-qp: %3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d\n", + rp[0].range_max_qp, rp[1].range_max_qp, rp[2].range_max_qp, rp[3].range_max_qp, + rp[4].range_max_qp, rp[5].range_max_qp, rp[6].range_max_qp, rp[7].range_max_qp, + rp[8].range_max_qp, rp[9].range_max_qp, rp[10].range_max_qp, rp[11].range_max_qp, + rp[12].range_max_qp, rp[13].range_max_qp, rp[14].range_max_qp); + drm_printf_indent(p, indent, + "dsc-cfg: rc-bpg-offset: %3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d\n", + rp[0].range_bpg_offset, rp[1].range_bpg_offset, rp[2].range_bpg_offset, rp[3].range_bpg_offset, + rp[4].range_bpg_offset, rp[5].range_bpg_offset, rp[6].range_bpg_offset, rp[7].range_bpg_offset, + rp[8].range_bpg_offset, rp[9].range_bpg_offset, rp[10].range_bpg_offset, rp[11].range_bpg_offset, + rp[12].range_bpg_offset, rp[13].range_bpg_offset, rp[14].range_bpg_offset); +} + +/** + * drm_dsc_dump_config - Dump the provided DSC configuration + * @p: The printer used for output + * @indent: Tab indentation level (max 5) + * @cfg: DSC configuration to print + * + * Print the provided DSC configuration in @cfg. + */ +void drm_dsc_dump_config(struct drm_printer *p, int indent, + const struct drm_dsc_config *cfg) +{ + drm_dsc_dump_config_main_params(p, indent, cfg); + drm_dsc_dump_config_rc_params(p, indent, cfg); +} +EXPORT_SYMBOL(drm_dsc_dump_config); diff --git a/drivers/gpu/drm/drm_managed.c b/drivers/gpu/drm/drm_managed.c index 7646f67bda4e..79ce86a5bd67 100644 --- a/drivers/gpu/drm/drm_managed.c +++ b/drivers/gpu/drm/drm_managed.c @@ -197,7 +197,7 @@ void drmm_release_action(struct drm_device *dev, spin_lock_irqsave(&dev->managed.lock, flags); list_for_each_entry_reverse(dr, &dev->managed.resources, node.entry) { if (dr->node.release == action) { - if (!data || (data && *(void **)dr->data == data)) { + if (!data || *(void **)dr->data == data) { dr_match = dr; del_dr(dev, dr_match); break; diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c index 739c865b556f..10bce18b7c31 100644 --- a/drivers/gpu/drm/lima/lima_drv.c +++ b/drivers/gpu/drm/lima/lima_drv.c @@ -501,3 +501,4 @@ module_platform_driver(lima_platform_driver); MODULE_AUTHOR("Lima Project Developers"); MODULE_DESCRIPTION("Lima DRM Driver"); MODULE_LICENSE("GPL v2"); +MODULE_SOFTDEP("pre: governor_simpleondemand"); diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index bb6204002cb3..d4550e4b3b01 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -111,12 +111,12 @@ static inline void mga_wait_vsync(struct mga_device *mdev) unsigned int status = 0; do { - status = RREG32(MGAREG_Status); + status = RREG32(MGAREG_STATUS); } while ((status & 0x08) && time_before(jiffies, timeout)); timeout = jiffies + HZ/10; status = 0; do { - status = RREG32(MGAREG_Status); + status = RREG32(MGAREG_STATUS); } while (!(status & 0x08) && time_before(jiffies, timeout)); } @@ -125,7 +125,7 @@ static inline void mga_wait_busy(struct mga_device *mdev) unsigned long timeout = jiffies + HZ; unsigned int status = 0; do { - status = RREG8(MGAREG_Status + 2); + status = RREG8(MGAREG_STATUS + 2); } while ((status & 0x01) && time_before(jiffies, timeout)); } diff --git a/drivers/gpu/drm/mgag200/mgag200_reg.h b/drivers/gpu/drm/mgag200/mgag200_reg.h index 1019ffd6c260..aa73463674e4 100644 --- a/drivers/gpu/drm/mgag200/mgag200_reg.h +++ b/drivers/gpu/drm/mgag200/mgag200_reg.h @@ -102,7 +102,7 @@ #define MGAREG_EXEC 0x0100 #define MGAREG_FIFOSTATUS 0x1e10 -#define MGAREG_Status 0x1e14 +#define MGAREG_STATUS 0x1e14 #define MGAREG_CACHEFLUSH 0x1fff #define MGAREG_ICLEAR 0x1e18 #define MGAREG_IEN 0x1e1c diff --git a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c index 4879835fe101..c6b669866fed 100644 --- a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c +++ b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c @@ -19,25 +19,30 @@ #include <linux/of.h> #include <l |