diff options
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
69 files changed, 559 insertions, 270 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml index 3cb996b2c9d5..ffae037779a1 100644 --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml @@ -40,31 +40,19 @@ properties: - description: DSI 1 PLL byte clock - description: DSI 1 PLL DSI clock - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - power-domains: items: - description: MMCX power domain required: - compatible - - reg - clocks - - '#clock-cells' - - '#reset-cells' - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml index 8efac3fb159f..a584b4953e68 100644 --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml @@ -37,28 +37,16 @@ properties: - const: dp_phy_pll_link_clk - const: dp_phy_pll_vco_div_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - required: - compatible - - reg - clocks - clock-names - - '#clock-cells' - - '#reset-cells' - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml index 59cc88a52f6b..53a5ab319159 100644 --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml @@ -27,6 +27,7 @@ properties: - qcom,sm8350-dispcc clocks: + minItems: 7 items: - description: Board XO source - description: Byte clock from DSI PHY0 @@ -35,8 +36,15 @@ properties: - description: Pixel clock from DSI PHY1 - description: Link clock from DP PHY - description: VCO DIV clock from DP PHY + - description: Link clock from eDP PHY + - description: VCO DIV clock from eDP PHY + - description: Link clock from DP1 PHY + - description: VCO DIV clock from DP1 PHY + - description: Link clock from DP2 PHY + - description: VCO DIV clock from DP2 PHY clock-names: + minItems: 7 items: - const: bi_tcxo - const: dsi0_phy_pll_out_byteclk @@ -45,18 +53,12 @@ properties: - const: dsi1_phy_pll_out_dsiclk - const: dp_phy_pll_link_clk - const: dp_phy_pll_vco_div_clk - - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 + - const: edp_phy_pll_link_clk + - const: edp_phy_pll_vco_div_clk + - const: dptx1_phy_pll_link_clk + - const: dptx1_phy_pll_vco_div_clk + - const: dptx2_phy_pll_link_clk + - const: dptx2_phy_pll_vco_div_clk power-domains: description: @@ -70,14 +72,26 @@ properties: required: - compatible - - reg - clocks - clock-names - - '#clock-cells' - - '#reset-cells' - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + - if: + not: + properties: + compatible: + contains: + const: qcom,sc8180x-dispcc + then: + properties: + clocks: + maxItems: 7 + clock-names: + maxItems: 7 + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml index 19211176ee0b..27df7e3e5bf3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml @@ -69,6 +69,8 @@ properties: const: 1 deprecated: true + '#power-domain-cells': false + required: - compatible @@ -81,7 +83,6 @@ examples: reg = <0x00900000 0x4000>; #clock-cells = <1>; #reset-cells = <1>; - #power-domain-cells = <1>; thermal-sensor { compatible = "qcom,msm8960-tsens"; diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml index d84608269080..0a0a26d9beab 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml @@ -51,6 +51,7 @@ properties: required: - compatible + - '#power-domain-cells' unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml index fb3957d485f9..012048921f92 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml @@ -34,6 +34,8 @@ properties: - const: xo - const: sleep_clk + '#power-domain-cells': false + required: - compatible @@ -45,7 +47,6 @@ examples: compatible = "qcom,gcc-ipq4019"; reg = <0x1800000 0x60000>; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; clocks = <&xo>, <&sleep_clk>; clock-names = "xo", "sleep_clk"; diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml index af5d883cfdc8..4d2614d4f368 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml @@ -36,6 +36,8 @@ properties: - const: xo - const: sleep_clk + '#power-domain-cells': false + required: - compatible - clocks @@ -51,7 +53,6 @@ examples: clocks = <&xo>, <&sleep_clk>; clock-names = "xo", "sleep_clk"; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; }; ... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml index 93f3084b97c1..a71557395c01 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml @@ -46,6 +46,8 @@ properties: allOf: - $ref: /schemas/thermal/qcom-tsens.yaml# + '#power-domain-cells': false + required: - compatible - clocks @@ -65,7 +67,6 @@ examples: clock-names = "pxo", "cxo", "pll4"; #clock-cells = <1>; #reset-cells = <1>; - #power-domain-cells = <1>; tsens: thermal-sensor { compatible = "qcom,ipq8064-tsens"; diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml index 2d44ddc45aab..38b9e4283900 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml @@ -39,6 +39,7 @@ properties: required: - compatible + - '#power-domain-cells' unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9607.yaml index 7d05f0f63cef..d7da30b0e7ee 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9607.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only %YAML 1.2 --- -$id: http://devicetree.org/schemas/clock/qcom,gcc-other.yaml# +$id: http://devicetree.org/schemas/clock/qcom,gcc-mdm9607.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Global Clock & Reset Controller @@ -15,7 +15,6 @@ description: | domains. See also:: - include/dt-bindings/clock/qcom,gcc-msm8953.h include/dt-bindings/clock/qcom,gcc-mdm9607.h allOf: @@ -28,6 +27,7 @@ properties: required: - compatible + - '#power-domain-cells' unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml new file mode 100644 index 000000000000..418dea31eb62 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-mdm9615.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller + +maintainers: + - Stephen Boyd <sboyd@kernel.org> + - Taniya Das <quic_tdas@quicinc.com> + +description: | + Qualcomm global clock control module provides the clocks, resets and power + domains. + + See also:: + include/dt-bindings/clock/qcom,gcc-mdm9615.h + +allOf: + - $ref: qcom,gcc.yaml# + +properties: + compatible: + enum: + - qcom,gcc-mdm9615 + + clocks: + items: + - description: CXO clock + - description: PLL4 from LLC + + '#power-domain-cells': false + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + clock-controller@900000 { + compatible = "qcom,gcc-mdm9615"; + reg = <0x900000 0x4000>; + #clock-cells = <1>; + #reset-cells = <1>; + clocks = <&cxo_board>, + <&lcc_pll4>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml index c9e985548621..e03b6d0acdb6 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml @@ -34,6 +34,8 @@ properties: - const: pxo - const: cxo + '#power-domain-cells': false + required: - compatible @@ -47,7 +49,6 @@ examples: reg = <0x900000 0x4000>; #clock-cells = <1>; #reset-cells = <1>; - #power-domain-cells = <1>; clocks = <&pxo_board>, <&cxo_board>; clock-names = "pxo", "cxo"; }; diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml index b91462587df5..ce1f5a60bd8c 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml @@ -42,6 +42,7 @@ required: - compatible - clocks - clock-names + - '#power-domain-cells' allOf: - $ref: qcom,gcc.yaml# diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml index ad84c0f7680b..258b6b93deca 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml @@ -48,6 +48,7 @@ properties: required: - compatible + - '#power-domain-cells' allOf: - $ref: qcom,gcc.yaml# diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml index fe9fd4cb185f..fe1f5f3ed992 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml @@ -42,6 +42,7 @@ required: - compatible - clocks - clock-names + - '#power-domain-cells' allOf: - $ref: qcom,gcc.yaml# diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml index 1927aecc86bc..929fafc84c19 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml @@ -41,6 +41,7 @@ properties: required: - compatible + - '#power-domain-cells' unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml index 62d6f1fe1228..cd49704dcb95 |