diff options
Diffstat (limited to 'arch/mips/include/asm/netlogic')
21 files changed, 0 insertions, 3392 deletions
diff --git a/arch/mips/include/asm/netlogic/common.h b/arch/mips/include/asm/netlogic/common.h deleted file mode 100644 index 57616649b4f3..000000000000 --- a/arch/mips/include/asm/netlogic/common.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights - * reserved. - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the NetLogic - * license below: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _NETLOGIC_COMMON_H_ -#define _NETLOGIC_COMMON_H_ - -/* - * Common SMP definitions - */ -#define RESET_VEC_PHYS 0x1fc00000 -#define RESET_VEC_SIZE 8192 /* 8KB reset code and data */ -#define RESET_DATA_PHYS (RESET_VEC_PHYS + (1<<10)) - -/* Offsets of parameters in the RESET_DATA_PHYS area */ -#define BOOT_THREAD_MODE 0 -#define BOOT_NMI_LOCK 4 -#define BOOT_NMI_HANDLER 8 - -/* CPU ready flags for each CPU */ -#define BOOT_CPU_READY 2048 - -#ifndef __ASSEMBLY__ -#include <linux/cpumask.h> -#include <linux/spinlock.h> -#include <asm/irq.h> -#include <asm/mach-netlogic/multi-node.h> - -struct irq_desc; -void nlm_smp_function_ipi_handler(struct irq_desc *desc); -void nlm_smp_resched_ipi_handler(struct irq_desc *desc); -void nlm_smp_irq_init(int hwcpuid); -void nlm_boot_secondary_cpus(void); -int nlm_wakeup_secondary_cpus(void); -void nlm_rmiboot_preboot(void); -void nlm_percpu_init(int hwcpuid); - -static inline void * -nlm_get_boot_data(int offset) -{ - return (void *)(CKSEG1ADDR(RESET_DATA_PHYS) + offset); -} - -static inline void -nlm_set_nmi_handler(void *handler) -{ - void *nmih = nlm_get_boot_data(BOOT_NMI_HANDLER); - - *(int64_t *)nmih = (long)handler; -} - -/* - * Misc. - */ -void nlm_init_boot_cpu(void); -unsigned int nlm_get_cpu_frequency(void); -extern const struct plat_smp_ops nlm_smp_ops; -extern char nlm_reset_entry[], nlm_reset_entry_end[]; - -extern unsigned int nlm_threads_per_core; -extern cpumask_t nlm_cpumask; - -struct irq_data; -uint64_t nlm_pci_irqmask(int node); -void nlm_setup_pic_irq(int node, int picirq, int irq, int irt); -void nlm_set_pic_extra_ack(int node, int irq, void (*xack)(struct irq_data *)); - -#ifdef CONFIG_PCI_MSI -void nlm_dispatch_msi(int node, int lirq); -void nlm_dispatch_msix(int node, int msixirq); -#endif - -/* - * The NR_IRQs is divided between nodes, each of them has a separate irq space - */ -static inline int nlm_irq_to_xirq(int node, int irq) -{ - return node * NR_IRQS / NLM_NR_NODES + irq; -} - -#ifdef CONFIG_CPU_XLR -#define nlm_cores_per_node() 8 -#else -static inline int nlm_cores_per_node(void) -{ - return ((read_c0_prid() & PRID_IMP_MASK) - == PRID_IMP_NETLOGIC_XLP9XX) ? 32 : 8; -} -#endif -static inline int nlm_threads_per_node(void) -{ - return nlm_cores_per_node() * NLM_THREADS_PER_CORE; -} - -static inline int nlm_hwtid_to_node(int hwtid) -{ - return hwtid / nlm_threads_per_node(); -} - -extern int nlm_cpu_ready[]; -#endif /* __ASSEMBLY__ */ -#endif /* _NETLOGIC_COMMON_H_ */ diff --git a/arch/mips/include/asm/netlogic/haldefs.h b/arch/mips/include/asm/netlogic/haldefs.h deleted file mode 100644 index 79c7cccdc22c..000000000000 --- a/arch/mips/include/asm/netlogic/haldefs.h +++ /dev/null @@ -1,171 +0,0 @@ -/* - * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights - * reserved. - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the NetLogic - * license below: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __NLM_HAL_HALDEFS_H__ -#define __NLM_HAL_HALDEFS_H__ - -#include <linux/irqflags.h> /* for local_irq_disable */ - -/* - * This file contains platform specific memory mapped IO implementation - * and will provide a way to read 32/64 bit memory mapped registers in - * all ABIs - */ -static inline uint32_t -nlm_read_reg(uint64_t base, uint32_t reg) -{ - volatile uint32_t *addr = (volatile uint32_t *)(long)base + reg; - - return *addr; -} - -static inline void -nlm_write_reg(uint64_t base, uint32_t reg, uint32_t val) -{ - volatile uint32_t *addr = (volatile uint32_t *)(long)base + reg; - - *addr = val; -} - -/* - * For o32 compilation, we have to disable interrupts to access 64 bit - * registers - * - * We need to disable interrupts because we save just the lower 32 bits of - * registers in interrupt handling. So if we get hit by an interrupt while - * using the upper 32 bits of a register, we lose. - */ - -static inline uint64_t -nlm_read_reg64(uint64_t base, uint32_t reg) -{ - uint64_t addr = base + (reg >> 1) * sizeof(uint64_t); - volatile uint64_t *ptr = (volatile uint64_t *)(long)addr; - uint64_t val; - - if (sizeof(unsigned long) == 4) { - unsigned long flags; - - local_irq_save(flags); - __asm__ __volatile__( - ".set push" "\n\t" - ".set mips64" "\n\t" - "ld %L0, %1" "\n\t" - "dsra32 %M0, %L0, 0" "\n\t" - "sll %L0, %L0, 0" "\n\t" - ".set pop" "\n" - : "=r" (val) - : "m" (*ptr)); - local_irq_restore(flags); - } else - val = *ptr; - - return val; -} - -static inline void -nlm_write_reg64(uint64_t base, uint32_t reg, uint64_t val) -{ - uint64_t addr = base + (reg >> 1) * sizeof(uint64_t); - volatile uint64_t *ptr = (volatile uint64_t *)(long)addr; - - if (sizeof(unsigned long) == 4) { - unsigned long flags; - uint64_t tmp; - - local_irq_save(flags); - __asm__ __volatile__( - ".set push" "\n\t" - ".set mips64" "\n\t" - "dsll32 %L0, %L0, 0" "\n\t" - "dsrl32 %L0, %L0, 0" "\n\t" - "dsll32 %M0, %M0, 0" "\n\t" - "or %L0, %L0, %M0" "\n\t" - "sd %L0, %2" "\n\t" - ".set pop" "\n" - : "=r" (tmp) - : "0" (val), "m" (*ptr)); - local_irq_restore(flags); - } else - *ptr = val; -} - -/* - * Routines to store 32/64 bit values to 64 bit addresses, - * used when going thru XKPHYS to access registers - */ -static inline uint32_t -nlm_read_reg_xkphys(uint64_t base, uint32_t reg) -{ - return nlm_read_reg(base, reg); -} - -static inline void -nlm_write_reg_xkphys(uint64_t base, uint32_t reg, uint32_t val) -{ - nlm_write_reg(base, reg, val); -} - -static inline uint64_t -nlm_read_reg64_xkphys(uint64_t base, uint32_t reg) -{ - return nlm_read_reg64(base, reg); -} - -static inline void -nlm_write_reg64_xkphys(uint64_t base, uint32_t reg, uint64_t val) -{ - nlm_write_reg64(base, reg, val); -} - -/* Location where IO base is mapped */ -extern uint64_t nlm_io_base; - -#if defined(CONFIG_CPU_XLP) -static inline uint64_t -nlm_pcicfg_base(uint32_t devoffset) -{ - return nlm_io_base + devoffset; -} - -#elif defined(CONFIG_CPU_XLR) - -static inline uint64_t -nlm_mmio_base(uint32_t devoffset) -{ - return nlm_io_base + devoffset; -} -#endif - -#endif diff --git a/arch/mips/include/asm/netlogic/interrupt.h b/arch/mips/include/asm/netlogic/interrupt.h deleted file mode 100644 index ed5993d9b7b8..000000000000 --- a/arch/mips/include/asm/netlogic/interrupt.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights - * reserved. - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the NetLogic - * license below: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _ASM_NLM_INTERRUPT_H -#define _ASM_NLM_INTERRUPT_H - -/* Defines for the IRQ numbers */ - -#define IRQ_IPI_SMP_FUNCTION 3 -#define IRQ_IPI_SMP_RESCHEDULE 4 -#define IRQ_FMN 5 -#define IRQ_TIMER 7 - -#endif diff --git a/arch/mips/include/asm/netlogic/mips-extns.h b/arch/mips/include/asm/netlogic/mips-extns.h deleted file mode 100644 index 788baf399e69..000000000000 --- a/arch/mips/include/asm/netlogic/mips-extns.h +++ /dev/null @@ -1,301 +0,0 @@ -/* - * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights - * reserved. - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the NetLogic - * license below: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _ASM_NLM_MIPS_EXTS_H -#define _ASM_NLM_MIPS_EXTS_H - -/* - * XLR and XLP interrupt request and interrupt mask registers - */ -/* - * NOTE: Do not save/restore flags around write_c0_eimr(). - * On non-R2 platforms the flags has part of EIMR that is shadowed in STATUS - * register. Restoring flags will overwrite the lower 8 bits of EIMR. - * - * Call with interrupts disabled. - */ -#define write_c0_eimr(val) \ -do { \ - if (sizeof(unsigned long) == 4) { \ - __asm__ __volatile__( \ - ".set\tmips64\n\t" \ - "dsll\t%L0, %L0, 32\n\t" \ - "dsrl\t%L0, %L0, 32\n\t" \ - "dsll\t%M0, %M0, 32\n\t" \ - "or\t%L0, %L0, %M0\n\t" \ - "dmtc0\t%L0, $9, 7\n\t" \ - ".set\tmips0" \ - : : "r" (val)); \ - } else \ - __write_64bit_c0_register($9, 7, (val)); \ -} while (0) - -/* - * Handling the 64 bit EIMR and EIRR registers in 32-bit mode with - * standard functions will be very inefficient. This provides - * optimized functions for the normal operations on the registers. - * - * Call with interrupts disabled. - */ -static inline void ack_c0_eirr(int irq) -{ - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - ".set noat\n\t" - "li $1, 1\n\t" - "dsllv $1, $1, %0\n\t" - "dmtc0 $1, $9, 6\n\t" - ".set pop" - : : "r" (irq)); -} - -static inline void set_c0_eimr(int irq) -{ - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - ".set noat\n\t" - "li $1, 1\n\t" - "dsllv %0, $1, %0\n\t" - "dmfc0 $1, $9, 7\n\t" - "or $1, %0\n\t" - "dmtc0 $1, $9, 7\n\t" - ".set pop" - : "+r" (irq)); -} - -static inline void clear_c0_eimr(int irq) -{ - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - ".set noat\n\t" - "li $1, 1\n\t" - "dsllv %0, $1, %0\n\t" - "dmfc0 $1, $9, 7\n\t" - "or $1, %0\n\t" - "xor $1, %0\n\t" - "dmtc0 $1, $9, 7\n\t" - ".set pop" - : "+r" (irq)); -} - -/* - * Read c0 eimr and c0 eirr, do AND of the two values, the result is - * the interrupts which are raised and are not masked. - */ -static inline uint64_t read_c0_eirr_and_eimr(void) -{ - uint64_t val; - -#ifdef CONFIG_64BIT - val = __read_64bit_c0_register($9, 6) & __read_64bit_c0_register($9, 7); -#else - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - ".set noat\n\t" - "dmfc0 %M0, $9, 6\n\t" - "dmfc0 %L0, $9, 7\n\t" - "and %M0, %L0\n\t" - "dsll %L0, %M0, 32\n\t" - "dsra %M0, %M0, 32\n\t" - "dsra %L0, %L0, 32\n\t" - ".set pop" - : "=r" (val)); -#endif - return val; -} - -static inline int hard_smp_processor_id(void) -{ - return __read_32bit_c0_register($15, 1) & 0x3ff; -} - -static inline int nlm_nodeid(void) -{ - uint32_t prid = read_c0_prid() & PRID_IMP_MASK; - - if ((prid == PRID_IMP_NETLOGIC_XLP9XX) || - (prid == PRID_IMP_NETLOGIC_XLP5XX)) - return (__read_32bit_c0_register($15, 1) >> 7) & 0x7; - else - return (__read_32bit_c0_register($15, 1) >> 5) & 0x3; -} - -static inline unsigned int nlm_core_id(void) -{ - uint32_t prid = read_c0_prid() & PRID_IMP_MASK; - - if ((prid == PRID_IMP_NETLOGIC_XLP9XX) || - (prid == PRID_IMP_NETLOGIC_XLP5XX)) - return (read_c0_ebase() & 0x7c) >> 2; - else - return (read_c0_ebase() & 0x1c) >> 2; -} - -static inline unsigned int nlm_thread_id(void) -{ - return read_c0_ebase() & 0x3; -} - -#define __read_64bit_c2_split(source, sel) \ -({ \ - unsigned long long __val; \ - unsigned long __flags; \ - \ - local_irq_save(__flags); \ - if (sel == 0) \ - __asm__ __volatile__( \ - ".set\tmips64\n\t" \ - "dmfc2\t%M0, " #source "\n\t" \ - "dsll\t%L0, %M0, 32\n\t" \ - "dsra\t%M0, %M0, 32\n\t" \ - "dsra\t%L0, %L0, 32\n\t" \ - ".set\tmips0\n\t" \ - : "=r" (__val)); \ - else \ - __asm__ __volatile__( \ - ".set\tmips64\n\t" \ - "dmfc2\t%M0, " #source ", " #sel "\n\t" \ - "dsll\t%L0, %M0, 32\n\t" \ - "dsra\t%M0, %M0, 32\n\t" \ - "dsra\t%L0, %L0, 32\n\t" \ - ".set\tmips0\n\t" \ - : "=r" (__val)); \ - local_irq_restore(__flags); \ - \ - __val; \ -}) - -#define __write_64bit_c2_split(source, sel, val) \ -do { \ - unsigned long __flags; \ - \ - local_irq_save(__flags); \ - if (sel == 0) \ - __asm__ __volatile__( \ - ".set\tmips64\n\t" \ - "dsll\t%L0, %L0, 32\n\t" \ - "dsrl\t%L0, %L0, 32\n\t" \ - "dsll\t%M0, %M0, 32\n\t" \ - "or\t%L0, %L0, %M0\n\t" \ - "dmtc2\t%L0, " #source "\n\t" \ - ".set\tmips0\n\t" \ - : : "r" (val)); \ - else \ - __asm__ __volatile__( \ - ".set\tmips64\n\t" \ - "dsll\t%L0, %L0, 32\n\t" \ - "dsrl\t%L0, %L0, 32\n\t" \ - "dsll\t%M0, %M0, 32\n\t" \ - "or\t%L0, %L0, %M0\n\t" \ - "dmtc2\t%L0, " #source ", " #sel "\n\t" \ - ".set\tmips0\n\t" \ - : : "r" (val)); \ - local_irq_restore(__flags); \ -} while (0) - -#define __read_32bit_c2_register(source, sel) \ -({ uint32_t __res; \ - if (sel == 0) \ - __asm__ __volatile__( \ - ".set\tmips32\n\t" \ - "mfc2\t%0, " #source "\n\t" \ - ".set\tmips0\n\t" \ - : "=r" (__res)); \ - else \ - __asm__ __volatile__( \ - ".set\tmips32\n\t" \ - "mfc2\t%0, " #source ", " #sel "\n\t" \ - ".set\tmips0\n\t" \ - : "=r" (__res)); \ - __res; \ -}) - -#define __read_64bit_c2_register(source, sel) \ -({ unsigned long long __res; \ - if (sizeof(unsigned long) == 4) \ - __res = __read_64bit_c2_split(source, sel); \ - else if (sel == 0) \ - __asm__ __volatile__( \ - ".set\tmips64\n\t" \ - "dmfc2\t%0, " #source "\n\t" \ - ".set\tmips0\n\t" \ - : "=r" (__res)); \ - else \ - __asm__ __volatile__( \ - ".set\tmips64\n\t" \ - "dmfc2\t%0, " #source ", " #sel "\n\t" \ - ".set\tmips0\n\t" \ - : "=r" (__res)); \ - __res; \ -}) - -#define __write_64bit_c2_register(register, sel, value) \ -do { \ - if (sizeof(unsigned long) == 4) \ - __write_64bit_c2_split(register, sel, value); \ - else if (sel == 0) \ - __asm__ __volatile__( \ - ".set\tmips64\n\t" \ - "dmtc2\t%z0, " #register "\n\t" \ - ".set\tmips0\n\t" \ - : : "Jr" (value)); \ - else \ - __asm__ __volatile__( \ - ".set\tmips64\n\t" \ - "dmtc2\t%z0, " #register ", " #sel "\n\t" \ - ".set\tmips0\n\t" \ - : : "Jr" (value)); \ -} while (0) - -#define __write_32bit_c2_register(reg, sel, value) \ -({ \ - if (sel == 0) \ - __asm__ __volatile__( \ - ".set\tmips32\n\t" \ - "mtc2\t%z0, " #reg "\n\t" \ - ".set\tmips0\n\t" \ - : : "Jr" (value)); \ - else \ - __asm__ __volatile__( \ - ".set\tmips32\n\t" \ - "mtc2\t%z0, " #reg ", " #sel "\n\t" \ - ".set\tmips0\n\t" \ - : : "Jr" (value)); \ -}) - -#endif /*_ASM_NLM_MIPS_EXTS_H */ diff --git a/arch/mips/include/asm/netlogic/psb-bootinfo.h b/arch/mips/include/asm/netlogic/psb-bootinfo.h deleted file mode 100644 index c716e9397113..000000000000 --- a/arch/mips/include/asm/netlogic/psb-bootinfo.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights - * reserved. - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the NetLogic - * license below: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _ASM_NETLOGIC_BOOTINFO_H -#define _ASM_NETLOGIC_BOOTINFO_H - -struct psb_info { - uint64_t boot_level; - uint64_t io_base; - uint64_t output_device; - uint64_t uart_print; - uint64_t led_output; - uint64_t init; - uint64_t exit; - uint64_t warm_reset; - uint64_t wakeup; - uint64_t online_cpu_map; - uint64_t master_reentry_sp; - uint64_t master_reentry_gp; - uint64_t master_reentry_fn; - uint64_t slave_reentry_fn; - uint64_t magic_dword; - uint64_t uart_putchar; - uint64_t size; - uint64_t uart_getchar; - uint64_t nmi_handler; - uint64_t psb_version; - uint64_t mac_addr; - uint64_t cpu_frequency; - uint64_t board_version; - uint64_t malloc; - uint64_t free; - uint64_t global_shmem_addr; - uint64_t global_shmem_size; - uint64_t psb_os_cpu_map; - uint64_t userapp_cpu_map; - uint64_t wakeup_os; - uint64_t psb_mem_map; - uint64_t board_major_version; - uint64_t board_minor_version; - uint64_t board_manf_revision; - uint64_t board_serial_number; - uint64_t psb_physaddr_map; - uint64_t xlr_loaderip_config; - uint64_t bldr_envp; - uint64_t avail_mem_map; -}; - -/* This is what netlboot passes and linux boot_mem_map is subtly different */ -#define NLM_BOOT_MEM_MAP_MAX 32 -struct nlm_boot_mem_map { - int nr_map; - struct nlm_boot_mem_map_entry { - uint64_t addr; /* start of memory segment */ - uint64_t size; /* size of memory segment */ - uint32_t type; /* type of memory segment */ - } map[NLM_BOOT_MEM_MAP_MAX]; -}; -#define NLM_BOOT_MEM_RAM 1 - -/* Pointer to saved boot loader info */ -extern struct psb_info nlm_prom_info; - -#endif diff --git a/arch/mips/include/asm/netlogic/xlp-hal/bridge.h b/arch/mips/include/asm/netlogic/xlp-hal/bridge.h deleted file mode 100644 index 3067f983495d..000000000000 --- a/arch/mips/include/asm/netlogic/xlp-hal/bridge.h +++ /dev/null @@ -1,186 +0,0 @@ -/* - * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights - * reserved. - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the NetLogic - * license below: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __NLM_HAL_BRIDGE_H__ -#define __NLM_HAL_BRIDGE_H__ - -/** -* @file_name mio.h -* @author Netlogic Microsystems -* @brief Basic definitions of XLP memory and io subsystem -*/ - -/* - * BRIDGE specific registers - * - * These registers start after the PCIe header, which has 0x40 - * standard entries - */ -#define BRIDGE_MODE 0x00 -#define BRIDGE_PCI_CFG_BASE 0x01 -#define BRIDGE_PCI_CFG_LIMIT 0x02 -#define BRIDGE_PCIE_CFG_BASE 0x03 -#define BRIDGE_PCIE_CFG_LIMIT 0x04 -#define BRIDGE_BUSNUM_BAR0 0x05 -#define BRIDGE_BUSNUM_BAR1 0x06 -#define BRIDGE_BUSNUM_BAR2 0x07 -#define BRIDGE_BUSNUM_BAR3 0x08 -#define BRIDGE_BUSNUM_BAR4 0x09 -#define BRIDGE_BUSNUM_BAR5 0x0a -#define BRIDGE_BUSNUM_BAR6 0x0b -#define BRIDGE_FLASH_BAR0 0x0c -#define BRIDGE_FLASH_BAR1 0x0d -#define BRIDGE_FLASH_BAR2 0x0e -#define BRIDGE_FLASH_BAR3 0x0f -#define BRIDGE_FLASH_LIMIT0 0x10 -#define BRIDGE_FLASH_LIMIT1 0x11 -#define BRIDGE_FLASH_LIMIT2 0x12 -#define BRIDGE_FLASH_LIMIT3 0x13 - -#define BRIDGE_DRAM_BAR(i) (0x14 + (i)) -#define BRIDGE_DRAM_LIMIT(i) (0x1c + (i)) -#define BRIDGE_DRAM_NODE_TRANSLN(i) (0x24 + (i)) -#define BRIDGE_DRAM_CHNL_TRANSLN(i) (0x2c + (i)) - -#define BRIDGE_PCIEMEM_BASE0 0x34 -#define BRIDGE_PCIEMEM_BASE1 0x35 -#define BRIDGE_PCIEMEM_BASE2 0x36 -#define BRIDGE_PCIEMEM_BASE3 0x37 -#define BRIDGE_PCIEMEM_LIMIT0 0x38 -#define BRIDGE_PCIEMEM_LIMIT1 0x39 -#define BRIDGE_PCIEMEM_LIMIT2 0x3a -#define BRIDGE_PCIEMEM_LIMIT3 0x3b -#define BRIDGE_PCIEIO_BASE0 0x3c -#define BRIDGE_PCIEIO_BASE1 0x3d -#define BRIDGE_PCIEIO_BASE2 0x3e -#define BRIDGE_PCIEIO_BASE3 0x3f -#define BRIDGE_PCIEIO_LIMIT0 0x40 -#define BRIDGE_PCIEIO_LIMIT1 0x41 -#define BRIDGE_PCIEIO_LIMIT2 0x42 -#define BRIDGE_PCIEIO_LIMIT3 0x43 -#define BRIDGE_PCIEMEM_BASE4 0x44 -#define BRIDGE_PCIEMEM_BASE5 0x45 -#define BRIDGE_PCIEMEM_BASE6 0x46 -#define BRIDGE_PCIEMEM_LIMIT4 0x47 -#define BRIDGE_PCIEMEM_LIMIT5 0x48 -#define BRIDGE_PCIEMEM_LIMIT6 0x49 -#define BRIDGE_PCIEIO_BASE4 0x4a -#define BRIDGE_PCIEIO_BASE5 0x4b -#define BRIDGE_PCIEIO_BASE6 0x4c -#define BRIDGE_PCIEIO_LIMIT4 0x4d -#define BRIDGE_PCIEIO_LIMIT5 0x4e -#define BRIDGE_PCIEIO_LIMIT6 0x4f -#define BRIDGE_NBU_EVENT_CNT_CTL 0x50 -#define BRIDGE_EVNTCTR1_LOW 0x51 -#define BRIDGE_EVNTCTR1_HI 0x52 -#define BRIDGE_EVNT_CNT_CTL2 0x53 -#define BRIDGE_EVNTCTR2_LOW 0x54 -#define BRIDGE_EVNTCTR2_HI 0x55 -#define BRIDGE_TRACEBUF_MATCH0 0x56 -#define BRIDGE_TRACEBUF_MATCH1 0x57 -#define BRIDGE_TRACEBUF_MATCH_LOW 0x58 -#define BRIDGE_TRACEBUF_MATCH_HI 0x59 -#define BRIDGE_TRACEBUF_CTRL 0x5a -#define BRIDGE_TRACEBUF_INIT 0x5b -#define BRIDGE_TRACEBUF_ACCESS 0x5c -#define BRIDGE_TRACEBUF_READ_DATA0 0x5d -#define BRIDGE_TRACEBUF_READ_DATA1 0x5d -#define BRIDGE_TRACEBUF_READ_DATA2 0x5f -#define BRIDGE_TRACEBUF_READ_DATA3 0x60 -#define BRIDGE_TRACEBUF_STATUS 0x61 -#define BRIDGE_ADDRESS_ERROR0 0x62 -#define BRIDGE_ADDRESS_ERROR1 0x63 -#define BRIDGE_ADDRESS_ERROR2 0x64 -#define BRIDGE_TAG_ECC_ADDR_ERROR0 0x65 -#define BRIDGE_TAG_ECC_ADDR_ERROR1 0x66 -#define BRIDGE_TAG_ECC_ADDR_ERROR2 0x67 -#define BRIDGE_LINE_FLUSH0 0x68 -#define BRIDGE_LINE_FLUSH1 0x69 -#define BRIDGE_NODE_ID 0x6a -#define BRIDGE_ERROR_INTERRUPT_EN 0x6b -#define BRIDGE_PCIE0_WEIGHT 0x2c0 -#define BRIDGE_PCIE1_WEIGHT 0x2c1 -#define BRIDGE_PCIE2_WEIGHT 0x2c2 |